component
DP83TG720SWRHATQ1
Public Made by Adomby adom
Texas Instruments Ethernet ICs, VQFN-36(6x6). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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{
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"version": "0.1.0",
"type": "component",
"description": "Texas Instruments Ethernet ICs, VQFN-36(6x6). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
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"dp83tg720swrhatq1",
"factory-2.0.0",
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"component": {
"mpn": "DP83TG720SWRHATQ1",
"manufacturer": "Texas Instruments",
"package": "VQFN-36(6x6)",
"pin_count": 37,
"category": "Communication Interface Chip/UART/485/232",
"subcategory": "Ethernet ICs",
"datasheet": "https://www.ti.com/lit/ds/symlink/dp83tg720swrhatq1.pdf",
"parts": {
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"distributor_links": {
"lcsc": "C3225809"
},
"distributor_check": {
"checked_at": "2026-10-23T21:20:36Z",
"source": "Component Ocean /api/assign-pns",
"digikey": {
"pn": null,
"status": "deferred",
"error": "shared DigiKey quota guard: 800 calls left today"
},
"mouser": {
"pn": null,
"status": "quota"
}
},
"pins": [
{
"number": "1",
"name": "MDC",
"type": "input",
"description": "Management data clock: synchronous clock for MDIO serial management input and output data."
},
{
"number": "2",
"name": "INT_N",
"type": "output",
"description": "Active-low open-drain interrupt output with a weak internal pull-up; can be configured active-high via register 0x0011."
},
{
"number": "3",
"name": "RESET_N",
"type": "input",
"description": "Active-low reset input with internal pull-up; hold low at least 10 µs to force reset, and strap pins are resampled on deassertion."
},
{
"number": "4",
"name": "XO",
"type": "output",
"description": "Reference clock output used only with a crystal; leave floating when a CMOS oscillator drives XI."
},
{
"number": "5",
"name": "XI",
"type": "input",
"description": "Reference clock input for a 25 MHz ±100 ppm crystal or CMOS oscillator (oscillator on XI only with XO floating)."
},
{
"number": "6",
"name": "LED_1/GPIO_1",
"type": "bidirectional",
"description": "LED_1 shows link status, blinking on TX/RX activity; also the AUTO (autonomous/managed) strap pin with internal pull-down."
},
{
"number": "7",
"name": "VSLEEP",
"type": "power_in",
"description": "3.3 V sleep supply (2.97 to 3.63 V); connect to VDDA3P3 if the sleep function is not used."
},
{
"number": "8",
"name": "WAKE",
"type": "input",
"description": "Active-high wake pulse input in the VSLEEP domain with internal pull-down that wakes the PHY from sleep; may be tied to VSLEEP if unused."
},
{
"number": "9",
"name": "VDD1P0",
"type": "power_in",
"description": "1.0 V core supply (0.95 to 1.1 V); see decoupling network in power recommendations."
},
{
"number": "10",
"name": "INH",
"type": "output",
"description": "Active-high PMOS open-drain output that drives VSLEEP rail level in all states except sleep, when it is released to an external pull-down (10 kΩ recommended)."
},
{
"number": "11",
"name": "VDDA3P3",
"type": "power_in",
"description": "3.3 V core supply (2.97 to 3.63 V); see decoupling network in power recommendations."
},
{
"number": "12",
"name": "TRD_P",
"type": "bidirectional",
"description": "Positive differential transmit/receive MDI signal for IEEE 802.3bp 1000BASE-T1 operation."
},
{
"number": "13",
"name": "TRD_M",
"type": "bidirectional",
"description": "Negative differential transmit/receive MDI signal for IEEE 802.3bp 1000BASE-T1 operation."
},
{
"number": "14",
"name": "STRP_1",
"type": "input",
"description": "Strap 1 pin (3-level, internal 6.3 kΩ pull-down) used to strap PHY_AD address bits."
},
{
"number": "15",
"name": "RX_CTRL",
"type": "bidirectional",
"description": "RGMII receive control combining RX_DV (rising RX_CLK edge) and RX_ER (falling edge); a PHY_AD strap pin at reset and strap-only in SGMII mode."
},
{
"number": "16",
"name": "CLKOUT/GPIO_2",
"type": "bidirectional",
"description": "Clock output, 25 MHz buffered copy of XI by default; can be disabled by writing register 0x0453 = 0x0006."
},
{
"number": "17",
"name": "DNC",
"type": "unconnected",
"description": "Do not connect; leave floating to avoid damage or entering a wrong PHY mode."
},
{
"number": "18",
"name": "DNC",
"type": "unconnected",
"description": "Do not connect; leave floating to avoid damage or entering a wrong PHY mode."
},
{
"number": "19",
"name": "DNC",
"type": "unconnected",
"description": "Do not connect; leave floating to avoid damage or entering a wrong PHY mode."
},
{
"number": "20",
"name": "DNC",
"type": "unconnected",
"description": "Do not connect; leave floating to avoid damage or entering a wrong PHY mode."
},
{
"number": "21",
"name": "VDD1P0",
"type": "power_in",
"description": "1.0 V core supply (0.95 to 1.1 V); see decoupling network in power recommendations."
},
{
"number": "22",
"name": "VDDIO",
"type": "power_in",
"description": "IO supply of 1.8 V, 2.5 V or 3.3 V; see decoupling network in power recommendations."
},
{
"number": "23",
"name": "RX_D3/RX_M",
"type": "output",
"description": "RGMII receive data bit 3 synchronous to RX_CLK, or SGMII differential data output RX_M to the MAC."
},
{
"number": "24",
"name": "RX_D2/RX_P",
"type": "output",
"description": "RGMII receive data bit 2 synchronous to RX_CLK (also MAC[2] strap), or SGMII differential data output RX_P to the MAC."
},
{
"number": "25",
"name": "RX_D1",
"type": "output",
"description": "RGMII receive data bit 1 synchronous to RX_CLK; also MAC[1] interface-select strap."
},
{
"number": "26",
"name": "RX_D0",
"type": "output",
"description": "RGMII receive data bit 0 synchronous to RX_CLK; also MAC[0] interface-select strap."
},
{
"number": "27",
"name": "RX_CLK",
"type": "output",
"description": "RGMII 125 MHz receive clock from PHY to MAC; unused in SGMII mode."
},
{
"number": "28",
"name": "TX_CLK",
"type": "input",
"description": "RGMII 125 MHz transmit clock from MAC to PHY; unused in SGMII mode."
},
{
"number": "29",
"name": "TX_CTRL",
"type": "input",
"description": "RGMII transmit control combining TX_EN (rising TX_CLK edge) and TX_ER (falling edge); unused in SGMII mode."
},
{
"number": "30",
"name": "TX_D3",
"type": "input",
"description": "RGMII transmit data bit 3 received from the MAC."
},
{
"number": "31",
"name": "TX_D2",
"type": "input",
"description": "RGMII transmit data bit 2 received from the MAC."
},
{
"number": "32",
"name": "TX_D1/TX_P",
"type": "input",
"description": "RGMII transmit data bit 1 from the MAC, or SGMII differential data input TX_P."
},
{
"number": "33",
"name": "TX_D0/TX_M",
"type": "input",
"description": "RGMII transmit data bit 0 from the MAC, or SGMII differential data input TX_M."
},
{
"number": "34",
"name": "VDDIO",
"type": "power_in",
"description": "IO supply of 1.8 V, 2.5 V or 3.3 V; see decoupling network in power recommendations."
},
{
"number": "35",
"name": "LED_0/GPIO_0",
"type": "bidirectional",
"description": "LED_0 shows link status; also the MS strap (internal pull-down gives slave, external pull-up gives MDI master)."
},
{
"number": "36",
"name": "MDIO",
"type": "bidirectional",
"description": "Open-drain bidirectional management data signal requiring an external pull-up (2.2 kΩ recommended)."
},
{
"number": "37",
"name": "GND",
"type": "power_in",
"description": "Exposed die attach pad (DAP) ground; must be soldered to the PCB for thermal and mechanical performance."
}
],
"provenance": {
"extractor": "extract_pins 0.3",
"factory_chain": {
"factory": "2.0.0",
"extractor": "extract_pins 0.3",
"primary_model": "claude-sonnet-5-5",
"primary_mode": "text",
"consensus_model": "claude-sonnet-5-5",
"consensus": "agreed",
"guards": "pin_guards 0.1: passed",
"guard_notes": [
"extractor flagged: Ground exposed pad is labelled 'DAP' in the pin table; the number 37 comes from the package drawing ; Pin types for strap-shared pins (RX_CTRL, LED_0, LED_1) are set to bidirectional or output by judgem; The pin table lists the VDDIO name for pin 34 and VDDA3P3 for pin 11 without pin-by-pin descriptions",
"2/37 pins cited to the wrong page (name found elsewhere): ['4:XO@p5', '37:GND@p5']"
],
"pages_sent": 70,
"cost_usd": 0.5744,
"at": "2026-10-23T21:19:41"
},
"datasheet": {
"url": "https://www.ti.com/lit/ds/symlink/dp83tg720swrhatq1.pdf",
"pages": 221,
"sha256": "da75069c2504ff7c",
"source_tier": "mfr"
},
"cad": "KiCad official (CC-BY-SA 4.0)",
"pins": {
"total": 37,
"described": 37,
"cites_pages": true,
"refuses_to_fabricate": true
}
},
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"role": "plain",
"up": "Z",
"units": "mm",
"origin": "footprint origin = pad-pattern centre",
"seat": "z = 0",
"extents_mm": [
6.0,
6.0,
0.77
],
"zmin_mm": 0.0,
"centre_offset_mm": 0.0,
"footprint_binding": "identity",
"sha256": "6212c4fd2463ccb7c6ae2c35f5e24c80884153fcaeaf8e86549c0e49087bc8bb",
"checked": "2026-10-23",
"checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
},
{
"file": "dp83tg720swrhatq1-etched.step",
"role": "eda",
"up": "Z",
"units": "mm",
"origin": "footprint origin = pad-pattern centre",
"seat": "z = 0",
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"sha256": "1dab403bb5865a859011679f7089fe07f833b969891580f8189136b954ebedb7",
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}
}