DP83TC813SRHFRQ1

{
  "slug": "dp83tc813srhfrq1",
  "version": "0.1.0",
  "type": "component",
  "description": "Texas Instruments Ethernet Transceivers, VQFN-28(4x5). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
  "tags": [
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    "interface",
    "dp83tc813srhfrq1",
    "factory-2.0.0",
    "extractor-text"
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  "component": {
    "mpn": "DP83TC813SRHFRQ1",
    "manufacturer": "Texas Instruments",
    "package": "VQFN-28(4x5)",
    "pin_count": 29,
    "category": "Interface",
    "subcategory": "Ethernet Transceivers",
    "datasheet": "https://www.ti.com/cn/lit/gpn/dp83tc813s-q1",
    "parts": {
      "symbol": "dp83tc813srhfrq1.kicad_sym",
      "footprint": "dp83tc813srhfrq1.kicad_mod",
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      "model_3d_plain": "dp83tc813srhfrq1.glb",
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      "model_3d_step_plain": "dp83tc813srhfrq1.step",
      "lbr": "dp83tc813srhfrq1.lbr"
    },
    "distributor_links": {
      "lcsc": "C5216243",
      "digikey": "296-DP83TC813SRHFRQ1TR-ND",
      "mouser": "595-DP83TC813SRHFRQ1"
    },
    "distributor_check": {
      "checked_at": "2026-10-10T22:00:01Z",
      "source": "Component Ocean /api/assign-pns",
      "digikey": {
        "pn": "296-DP83TC813SRHFRQ1TR-ND",
        "status": "found",
        "lifecycle": "Active"
      },
      "mouser": {
        "pn": "595-DP83TC813SRHFRQ1",
        "status": "found"
      }
    },
    "pins": [
      {
        "number": "1",
        "name": "TX_CLK",
        "type": "bidirectional",
        "description": "MII mode: 25 MHz output (50 Ω driver) with constant phase referenced to the reference clock; RGMII mode: 25 MHz clock input from the MAC that must be provided; not used in RMII and SGMII modes."
      },
      {
        "number": "2",
        "name": "TX_EN/TX_CTRL",
        "type": "input",
        "description": "Transmit enable input: in MII it precedes the TX_CLK rising edge and indicates valid TX_D[3:0] data; in RGMII it is the transmit control input combining TX_EN and TX_ER; not used in SGMII mode."
      },
      {
        "number": "3",
        "name": "TX_D3",
        "type": "input",
        "description": "Transmit data nibble bit 3 from the MAC, latched before the TX_CLK rising edge in MII/RGMII mode; not used in RMII slave mode."
      },
      {
        "number": "4",
        "name": "TX_D2",
        "type": "input",
        "description": "Transmit data nibble bit 2 from the MAC, latched before the TX_CLK rising edge in MII/RGMII mode; not used in RMII slave mode."
      },
      {
        "number": "5",
        "name": "TX_D1/TX_P",
        "type": "input",
        "description": "Transmit data bit 1 in MII/RGMII/RMII modes; in SGMII mode this pin is the TX_P differential data input receiving data from the MAC."
      },
      {
        "number": "6",
        "name": "TX_D0/TX_M",
        "type": "input",
        "description": "Transmit data bit 0 in MII/RGMII/RMII modes; in SGMII mode this pin is the TX_M differential data input receiving data from the MAC."
      },
      {
        "number": "7",
        "name": "VDDIO",
        "type": "power_in",
        "description": "I/O supply selectable at 1.8 V, 2.5 V or 3.3 V (recommended 1.62-1.98 V, 2.25-2.75 V or 2.97-3.63 V); decouple with ferrite bead, 0.47 µF and 0.01 µF capacitors."
      },
      {
        "number": "8",
        "name": "MDIO",
        "type": "bidirectional",
        "description": "Open-drain management data input/output for the SMI bus; requires a pull-up to VDDIO, with 2.2 kΩ to 9 kΩ recommended."
      },
      {
        "number": "9",
        "name": "MDC",
        "type": "input",
        "description": "Management data clock input that synchronizes MDIO transfers; MDC frequency range is 2.5 MHz to 20 MHz per the timing table and may be asynchronous to the MAC clocks."
      },
      {
        "number": "10",
        "name": "INT_N",
        "type": "bidirectional",
        "description": "Active-low open-drain interrupt output with weak internal pull-up (9 kΩ typ.); can alternatively be configured as a power-down input."
      },
      {
        "number": "11",
        "name": "RESET_N",
        "type": "input",
        "description": "Active-low reset input with internal pull-up (9 kΩ typ.) that reinitializes the PHY; must be held low for at least 1 µs to force a reset, and bootstrap pins are resampled on release."
      },
      {
        "number": "12",
        "name": "XO",
        "type": "output",
        "description": "Crystal oscillator output used only with a 25 MHz crystal; must be left unconnected when XI is driven by a CMOS-level oscillator."
      },
      {
        "number": "13",
        "name": "XI",
        "type": "input",
        "description": "Reference clock input: 25 MHz crystal or oscillator (50 MHz CMOS oscillator in RMII slave mode); a 100 Ω series resistor is required in series with XI when a crystal is used."
      },
      {
        "number": "14",
        "name": "CLKOUT/LED_1",
        "type": "bidirectional",
        "description": "Multiplexed pin: 25 MHz reference clock output (50 MHz in RMII slave mode) by default, or LED_1/GPIO output when configured by register."
      },
      {
        "number": "15",
        "name": "VSLEEP",
        "type": "power_in",
        "description": "TC-10 sleep supply at 3.3 V (recommended 2.97-3.63 V); a 0.1 µF ceramic decoupling capacitor is recommended."
      },
      {
        "number": "16",
        "name": "WAKE",
        "type": "bidirectional",
        "description": "High-level input that wakes the PHY from TC-10 sleep and can be tied directly to VSLEEP; a 10 kΩ external pull-down is recommended to prevent accidental wake-up."
      },
      {
        "number": "17",
        "name": "INH",
        "type": "bidirectional",
        "description": "Active-high open-drain output that is high-impedance in TC-10 sleep and high in all other states; an external 2 kΩ-10 kΩ pull-down is required when implementing TC-10."
      },
      {
        "number": "18",
        "name": "VDDA",
        "type": "power_in",
        "description": "Core supply at 3.3 V (recommended 2.97-3.63 V); decouple with 0.47 µF and 0.01 µF ceramic capacitors, optional ferrite bead."
      },
      {
        "number": "19",
        "name": "TRD_P",
        "type": "bidirectional",
        "description": "Positive leg of the 100BASE-T1 differential media interface (IEEE 802.3bw), connected through the common-mode choke and DC-blocking/ESD network."
      },
      {
        "number": "20",
        "name": "TRD_M",
        "type": "bidirectional",
        "description": "Negative leg of the 100BASE-T1 differential media interface (IEEE 802.3bw), connected through the common-mode choke and DC-blocking/ESD network."
      },
      {
        "number": "21",
        "name": "RX_ER",
        "type": "output",
        "description": "Receive error output that flags a receive error symbol in MII and RMII modes; not used in RGMII and SGMII modes."
      },
      {
        "number": "22",
        "name": "RX_DV/CRS_DV/RX_CTRL",
        "type": "output",
        "description": "Mode-dependent receive output: RX_DV (valid data) in MII, CRS_DV (carrier sense/data valid) in RMII (default, register 0x0551 = 0x0010), or RX_CTRL in RGMII; not used in SGMII mode; has internal pull-down (6 kΩ typ.) as strap."
      },
      {
        "number": "23",
        "name": "VDDMAC",
        "type": "power_in",
        "description": "Optional separate MAC-interface supply at 1.8 V, 2.5 V or 3.3 V; must be connected to VDDIO when a separate MAC supply is not needed."
      },
      {
        "number": "24",
        "name": "RX_D3/RX_M",
        "type": "output",
        "description": "Receive data bit 3 in MII/RGMII; in RMII master mode it outputs a 50 MHz clock that must be fed to the MAC; in SGMII mode it is the RX_M differential data output to the MAC."
      },
      {
        "number": "25",
        "name": "RX_D2/RX_P",
        "type": "output",
        "description": "Receive data bit 2 in MII/RGMII; not used in RMII slave mode; in SGMII mode it is the RX_P differential data output to the MAC."
      },
      {
        "number": "26",
        "name": "RX_D1",
        "type": "output",
        "description": "Receive data bit 1, presented synchronously to the RX_CLK rising edge; used as RX_D[1:0] in RMII mode."
      },
      {
        "number": "27",
        "name": "RX_D0",
        "type": "output",
        "description": "Receive data bit 0, presented synchronously to the RX_CLK rising edge; used as RX_D[1:0] in RMII mode."
      },
      {
        "number": "28",
        "name": "RX_CLK",
        "type": "output",
        "description": "Receive clock providing a 25 MHz reference clock in MII and RGMII modes; not used in RMII and SGMII modes."
      },
      {
        "number": "29",
        "name": "EP",
        "type": "passive",
        "description": "Exposed pad (from the footprint; not named in the datasheet pin table)."
      }
    ],
    "provenance": {
      "extractor": "extract_pins 0.3",
      "factory_chain": {
        "factory": "2.0.0",
        "extractor": "extract_pins 0.3",
        "primary_model": "claude-haiku-5-5",
        "primary_mode": "text",
        "consensus_model": "claude-sonnet-5-5",
        "consensus": "agreed",
        "guards": "pin_guards 0.1: passed",
        "guard_notes": [
          "extractor flagged: Package and part match: the ordering table on page 168 lists DP83TC813SRHFRQ1 as a 28-pin VQFN (RHF); Pin 'DAP' is the exposed thermal/ground pad, not a numbered package pin; it is listed as printed in ; Pin names are mode-dependent and multiplexed (for example RX_DV/CRS_DV/RX_CTRL, TX_D1/TX_P, RX_D3/RX",
          "exposed pad 29 added from the footprint",
          "dropped thermal pad ['EP'] absent from footprint"
        ],
        "pages_sent": 88,
        "cost_usd": 0.3687,
        "at": "2026-10-10T21:59:45"
      },
      "datasheet": {
        "url": "https://www.ti.com/cn/lit/gpn/dp83tc813s-q1",
        "pages": 176,
        "sha256": "6192afa4f2470823",
        "source_tier": "lcsc"
      },
      "cad": "KiCad official (CC-BY-SA 4.0)",
      "pins": {
        "total": 29,
        "described": 29,
        "cites_pages": true,
        "refuses_to_fabricate": true
      }
    },
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}