component
DP83867ERGZR
Public Made by Adomby adom
Texas Instruments Interface - Specialized, VQFN-48-EP(7x7). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
main
Ray
dp83867ergzr: component.models_3d pose record per STEP (Z-up, seated z=0, pad-centre origin, identity binding)
300e54d
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{
"schema_version": 1,
"type": "component",
"slug": "dp83867ergzr",
"title": "DP83867ERGZR",
"brief": "Texas Instruments Interface - Specialized, VQFN-48-EP(7x7). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
"version": "0.1.0",
"license": "CC-BY-SA-4.0",
"tags": [
"component",
"interface",
"dp83867ergzr",
"factory-2.0.0",
"extractor-text"
],
"component": {
"mpn": "DP83867ERGZR",
"manufacturer": "Texas Instruments",
"package": "VQFN-48-EP(7x7)",
"pin_count": 49,
"category": "Interface",
"subcategory": "Interface - Specialized",
"datasheet": "https://www.ti.com/cn/lit/gpn/dp83867is",
"parts": {
"symbol": "dp83867ergzr.kicad_sym",
"footprint": "dp83867ergzr.kicad_mod",
"model_3d": "dp83867ergzr-etched.glb",
"model_3d_plain": "dp83867ergzr.glb",
"model_3d_step": "dp83867ergzr-etched.step",
"model_3d_step_plain": "dp83867ergzr.step",
"lbr": "dp83867ergzr.lbr"
},
"distributor_links": {
"lcsc": "C913839"
},
"pins": [
{
"number": "1",
"name": "TD_P_A",
"type": "passive",
"description": "Transmit/receive differential signal pair A positive for 1000BASE-T physical layer connection via transformer."
},
{
"number": "2",
"name": "TD_M_A",
"type": "passive",
"description": "Transmit/receive differential signal pair A negative for 1000BASE-T physical layer connection via transformer."
},
{
"number": "3",
"name": "VDDA2P5",
"type": "power_in",
"description": "2.5V analog power supply with ±5% tolerance; requires 1µF and 0.1µF decoupling capacitors to ground on each pin."
},
{
"number": "4",
"name": "TD_P_B",
"type": "passive",
"description": "Transmit/receive differential signal pair B positive for 1000BASE-T physical layer connection via transformer."
},
{
"number": "5",
"name": "TD_M_B",
"type": "passive",
"description": "Transmit/receive differential signal pair B negative for 1000BASE-T physical layer connection via transformer."
},
{
"number": "6",
"name": "VDD1P0",
"type": "power_in",
"description": "1V analog power supply with +15.5% and -5% tolerance; requires 1µF and 0.1µF decoupling capacitors to ground on each pin."
},
{
"number": "7",
"name": "TD_P_C",
"type": "passive",
"description": "Transmit/receive differential signal pair C positive for 1000BASE-T physical layer connection via transformer."
},
{
"number": "8",
"name": "TD_M_C",
"type": "passive",
"description": "Transmit/receive differential signal pair C negative for 1000BASE-T physical layer connection via transformer."
},
{
"number": "9",
"name": "VDDA2P5",
"type": "power_in",
"description": "2.5V analog power supply with ±5% tolerance; requires 1µF and 0.1µF decoupling capacitors to ground on each pin."
},
{
"number": "10",
"name": "TD_P_D",
"type": "passive",
"description": "Transmit/receive differential signal pair D positive for 1000BASE-T physical layer connection via transformer."
},
{
"number": "11",
"name": "TD_M_D",
"type": "passive",
"description": "Transmit/receive differential signal pair D negative for 1000BASE-T physical layer connection via transformer."
},
{
"number": "12",
"name": "RBIAS",
"type": "passive",
"description": "Bias resistor connection terminal; requires external 11kΩ ±1% resistor to ground for impedance network tuning."
},
{
"number": "13",
"name": "VDDA1P8",
"type": "power_in",
"description": "1.8V analog power supply with ±5% tolerance; no external power required in dual-supply mode, but 1µF and 0.1µF capacitors to ground recommended if external supply used."
},
{
"number": "14",
"name": "XO",
"type": "output",
"description": "Crystal oscillator output terminal for 25MHz crystal; keep floating if external clock source is used on XI pin."
},
{
"number": "15",
"name": "XI",
"type": "input",
"description": "Crystal oscillator input terminal accepting 25MHz oscillator or crystal with 50ppm frequency accuracy and 1.5V to 1.9V amplitude."
},
{
"number": "16",
"name": "MDC",
"type": "input",
"description": "Management data clock input synchronized to MDIO data; maximum clock rate is 25MHz with no minimum requirement."
},
{
"number": "17",
"name": "MDIO",
"type": "bidirectional",
"description": "Bidirectional management data I/O terminal requiring external 1.5kΩ to 2.2kΩ pull-up resistor to VDDIO for IEEE 802.3 compliance."
},
{
"number": "18",
"name": "CLK_OUT",
"type": "output",
"description": "Programmable clock output providing 25MHz, 125MHz, or divide-by-5 derived clock synchronized to XI, RX, or TX reference per IO_MUX_CFG register."
},
{
"number": "19",
"name": "VDDIO",
"type": "power_in",
"description": "I/O power supply selectable as 3.3V (±5%), 2.5V (±5%), or 1.8V (±5%); requires 1µF and 0.1µF decoupling capacitors to ground on each pin."
},
{
"number": "20",
"name": "JTAG_CLK",
"type": "input",
"description": "JTAG test clock input compliant with IEEE 1149.1 standard supporting maximum 2.5MHz clock frequency; requires internal pull-up resistor."
},
{
"number": "21",
"name": "JTAG_TDO",
"type": "output",
"description": "JTAG test data output pin providing serial scan data from IEEE 1149.1 compliant test interface."
},
{
"number": "22",
"name": "JTAG_TMS",
"type": "input",
"description": "JTAG test mode select input controlling TAP controller state machine per IEEE 1149.1; requires internal pull-up and recommended held high with 3 clock pulses for reset."
},
{
"number": "23",
"name": "JTAG_TDI",
"type": "input",
"description": "JTAG test data input pin for serial scan input compliance with IEEE 1149.1 standard; requires internal pull-up resistor."
},
{
"number": "24",
"name": "VDD1P0",
"type": "power_in",
"description": "1V analog power supply with +15.5% and -5% tolerance; requires 1µF and 0.1µF decoupling capacitors to ground on each pin."
},
{
"number": "25",
"name": "TX_D3",
"type": "input",
"description": "RGMII transmit data bit 3 synchronized to GTX_CLK; transfers data from MAC to PHY in RGMII mode at 10/100/1000Mbps."
},
{
"number": "26",
"name": "TX_D2",
"type": "input",
"description": "RGMII transmit data bit 2 synchronized to GTX_CLK; transfers data from MAC to PHY in RGMII mode at 10/100/1000Mbps."
},
{
"number": "27",
"name": "TX_D1",
"type": "input",
"description": "RGMII transmit data bit 1 synchronized to GTX_CLK; transfers data from MAC to PHY in RGMII mode, or functions as SGMII_SIP differential pair in SGMII mode."
},
{
"number": "28",
"name": "TX_D0",
"type": "input",
"description": "RGMII transmit data bit 0 synchronized to GTX_CLK; transfers data from MAC to PHY in RGMII mode, or functions as SGMII_SIN differential pair in SGMII mode."
},
{
"number": "29",
"name": "GTX_CLK",
"type": "input",
"description": "RGMII transmit clock input from MAC with nominal 125MHz frequency for 1000Mbps; scaled to 25MHz at 100Mbps and 2.5MHz at 10Mbps operation."
},
{
"number": "30",
"name": "VDDIO",
"type": "power_in",
"description": "I/O power supply selectable as 3.3V (±5%), 2.5V (±5%), or 1.8V (±5%); requires 1µF and 0.1µF decoupling capacitors to ground on each pin."
},
{
"number": "31",
"name": "VDD1P0",
"type": "power_in",
"description": "1V analog power supply with +15.5% and -5% tolerance; requires 1µF and 0.1µF decoupling capacitors to ground on each pin."
},
{
"number": "32",
"name": "RX_CLK",
"type": "output",
"description": "RGMII recovered receive clock output frequency dependent on link speed: 2.5MHz (10Mbps), 25MHz (100Mbps), or 125MHz (1000Mbps)."
},
{
"number": "33",
"name": "RX_D0",
"type": "output",
"description": "RGMII receive data bit 0 synchronized to RX_CLK; transfers data from PHY to MAC in RGMII mode, or functions as SGMII_COP differential pair in SGMII mode."
},
{
"number": "34",
"name": "RX_D1",
"type": "output",
"description": "RGMII receive data bit 1 synchronized to RX_CLK; transfers data from PHY to MAC in RGMII mode, or functions as SGMII_CON differential pair in SGMII mode."
},
{
"number": "35",
"name": "RX_D2",
"type": "output",
"description": "RGMII receive data bit 2 synchronized to RX_CLK; transfers data from PHY to MAC in RGMII mode, or functions as SGMII_SOP differential pair in SGMII mode."
},
{
"number": "36",
"name": "RX_D3",
"type": "output",
"description": "RGMII receive data bit 3 synchronized to RX_CLK; transfers data from PHY to MAC in RGMII mode, or functions as SGMII_SON differential pair in SGMII mode."
},
{
"number": "37",
"name": "TX_CTRL",
"type": "input",
"description": "RGMII transmit control combining GMII transmit enable and error signals using dual-edge clocking on GTX_CLK for 1000Mbps operation."
},
{
"number": "38",
"name": "RX_CTRL",
"type": "output",
"description": "RGMII receive control combining receive data valid and error signals RXDV_ER using dual-edge clocking on RX_CLK; serves as configuration pin in Strap mode."
},
{
"number": "39",
"name": "GPIO_0",
"type": "output",
"description": "Configurable general-purpose I/O providing multipurpose signal selection via GPIO_MUX_CTRL register; serves as RGMII RX clock delay configuration pin in Strap mode."
},
{
"number": "40",
"name": "GPIO_1",
"type": "output",
"description": "Configurable general-purpose I/O providing multipurpose signal selection via GPIO_MUX_CTRL register; serves as RGMII clock delay configuration pins in Strap mode."
},
{
"number": "41",
"name": "VDDIO",
"type": "power_in",
"description": "I/O power supply selectable as 3.3V (±5%), 2.5V (±5%), or 1.8V (±5%); requires 1µF and 0.1µF decoupling capacitors to ground on each pin."
},
{
"number": "42",
"name": "VDD1P0",
"type": "power_in",
"description": "1V analog power supply with +15.5% and -5% tolerance; requires 1µF and 0.1µF decoupling capacitors to ground on each pin."
},
{
"number": "43",
"name": "RESET_N",
"type": "input",
"description": "Active-low asynchronous reset input requiring minimum 1µs low pulse; initializes all internal registers to default state and relatches hardware configuration pins."
},
{
"number": "44",
"name": "INT/PWDN",
"type": "bidirectional",
"description": "Dual-function open-drain output for interrupt signaling or active-low input for power-down mode; requires external 2.2kΩ pull-up to VDDIO when used as interrupt output."
},
{
"number": "45",
"name": "LED_2",
"type": "output",
"description": "Configurable LED output pin providing activity or link status indication; default function shows transmit/receive activity with programmable LEDCR1 configuration."
},
{
"number": "46",
"name": "LED_1",
"type": "output",
"description": "Configurable LED output pin providing link status indication; default function shows 1000BASE-T link establishment with programmable LEDCR1 configuration."
},
{
"number": "47",
"name": "LED_0",
"type": "output",
"description": "Configurable LED output pin providing link establishment indication; default function shows active link status with programmable LEDCR1 configuration; serves as SGMII enable Strap pin."
},
{
"number": "48",
"name": "VDDA1P8",
"type": "power_in",
"description": "1.8V analog power supply with ±5% tolerance; no external power required in dual-supply mode, but 1µF and 0.1µF capacitors to ground recommended if external supply used."
},
{
"number": "49",
"name": "EP",
"type": "passive",
"description": "Exposed pad (from the footprint; not named in the datasheet pin table)."
}
],
"provenance": {
"extractor": "extract_pins 0.2",
"factory_chain": {
"factory": "2.0.0",
"extractor": "extract_pins 0.2",
"primary_model": "claude-haiku-4-5-20251001",
"primary_mode": "text",
"consensus_model": "claude-sonnet-4-6",
"consensus": "agreed",
"guards": "pin_guards 0.1: passed",
"guard_notes": [
"extractor flagged: Dual-function pins (27, 28, 33, 34, 35, 36) have both RGMII and SGMII mode names; descriptions show ; Die attach pad (DAP) labeled as GND on package diagram not included in standard pin list; thermal pa; Pins 38, 39, 40 listed as output type but datasheet indicates configuration pin (S) functionality wi",
"exposed pad 49 added from the footprint"
],
"pages_sent": 127,
"cost_usd": 1.6985,
"at": "2026-09-21T21:57:35"
},
"datasheet": {
"url": "https://www.ti.com/cn/lit/gpn/dp83867is",
"pages": 127,
"sha256": "101dd83b84e239fd",
"source_tier": "lcsc"
},
"cad": "KiCad official (CC-BY-SA 4.0)",
"pins": {
"total": 49,
"described": 49,
"cites_pages": true,
"refuses_to_fabricate": true
}
},
"viewers": {
"symbol": "viewers/symbol.html",
"footprint": "viewers/footprint.html"
},
"models_3d": [
{
"file": "dp83867ergzr.step",
"role": "plain",
"up": "Z",
"units": "mm",
"origin": "footprint origin = pad-pattern centre",
"seat": "z = 0",
"extents_mm": [
7,
7,
0.77
],
"zmin_mm": 0,
"centre_offset_mm": 0,
"footprint_binding": "identity",
"sha256": "f2b38b0b4bf967c77e683e8d4599608b9f0503055ec535b93c4ebb5d0163e916",
"checked": "2026-10-07",
"checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
},
{
"file": "dp83867ergzr-etched.step",
"role": "eda",
"up": "Z",
"units": "mm",
"origin": "footprint origin = pad-pattern centre",
"seat": "z = 0",
"extents_mm": [
7,
7,
0.77
],
"zmin_mm": 0,
"centre_offset_mm": 0,
"footprint_binding": "identity",
"sha256": "bc86d9c40120b7bd8b692f276cdd9f0faac52f60516c150bee8b5fb01a4e3bc7",
"checked": "2026-10-07",
"checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
}
]
},
"metadata": {
"specs": {
"Manufacturer": "Texas Instruments",
"Package": "VQFN-48-EP(7x7)",
"Category": "Interface",
"Pins": "49"
}
},
"variants": [],
"sections": [
"hero",
"viewers",
"readme",
"breadcrumbs",
"info"
],
"discovery_triggers": [
"dp83867ergzr"
],
"discovery_pitch": "DP83867ERGZR (Texas Instruments) component page with datasheet-verified CAD.",
"author": {
"name": "Ray"
},
"dependencies": {},
"hero": {
"type": "image",
"path": "docs/hero.png"
},
"files": [
"page.json",
"README.md",
"dp83867ergzr.kicad_sym",
"dp83867ergzr.kicad_mod",
"dp83867ergzr.glb",
"dp83867ergzr.step",
"dp83867ergzr.lbr",
"docs/hero.png",
"docs/dp83867ergzr-datasheet.pdf",
"viewers/symbol.html",
"viewers/footprint.html"
],
"visibility": {
"public": true
},
"updated_at": "2026-09-24T19:53:57.395Z"
}