DP83867CSRGZR

{
  "slug": "dp83867csrgzr",
  "version": "0.1.0",
  "type": "component",
  "description": "Texas Instruments Ethernet Transceivers, VQFN-48-EP(7x7). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
  "tags": [
    "component",
    "interface",
    "dp83867csrgzr",
    "factory-2.0.0",
    "extractor-text"
  ],
  "dependencies": {},
  "hero": {
    "type": "image",
    "path": "docs/hero.png"
  },
  "files": [
    "page.json",
    "README.md",
    "dp83867csrgzr.kicad_sym",
    "dp83867csrgzr.kicad_mod",
    "dp83867csrgzr.glb",
    "dp83867csrgzr.step",
    "dp83867csrgzr.lbr",
    "docs/hero.png",
    "docs/dp83867csrgzr-datasheet.pdf",
    "viewers/symbol.html",
    "viewers/footprint.html",
    "dp83867csrgzr-hero.glb",
    "dp83867csrgzr-hero.overlay.json"
  ],
  "component": {
    "mpn": "DP83867CSRGZR",
    "manufacturer": "Texas Instruments",
    "package": "VQFN-48-EP(7x7)",
    "pin_count": 49,
    "category": "Interface",
    "subcategory": "Ethernet Transceivers",
    "datasheet": "https://www.ti.com/cn/lit/gpn/dp83867is",
    "parts": {
      "symbol": "dp83867csrgzr.kicad_sym",
      "footprint": "dp83867csrgzr.kicad_mod",
      "model_3d": "dp83867csrgzr-hero.glb",
      "model_3d_plain": "dp83867csrgzr.glb",
      "model_3d_step": "dp83867csrgzr-etched.step",
      "model_3d_step_plain": "dp83867csrgzr.step",
      "lbr": "dp83867csrgzr.lbr"
    },
    "distributor_links": {
      "lcsc": "C2867659",
      "digikey": "296-51058-2-ND",
      "mouser": "595-DP83867CSRGZR"
    },
    "distributor_check": {
      "checked_at": "2026-10-08T23:27:51Z",
      "source": "Component Ocean /api/assign-pns",
      "digikey": {
        "pn": "296-51058-2-ND",
        "status": "found",
        "lifecycle": "Active"
      },
      "mouser": {
        "pn": "595-DP83867CSRGZR",
        "status": "found"
      }
    },
    "pins": [
      {
        "number": "1",
        "name": "TD_P_A",
        "type": "passive",
        "description": "Differential media-side signal pair A, positive leg, connected through the external magnetics to the RJ-45 (MDI)."
      },
      {
        "number": "2",
        "name": "TD_M_A",
        "type": "passive",
        "description": "Differential media-side signal pair A, negative leg, connected through the external magnetics to the RJ-45 (MDI)."
      },
      {
        "number": "3",
        "name": "VDDA2P5",
        "type": "power_in",
        "description": "2.5 V analog supply, ±5% (2.375 V to 2.625 V); each pin needs 1 µF and 0.1 µF capacitors to GND."
      },
      {
        "number": "4",
        "name": "TD_P_B",
        "type": "passive",
        "description": "Differential media-side signal pair B, positive leg (MDI)."
      },
      {
        "number": "5",
        "name": "TD_M_B",
        "type": "passive",
        "description": "Differential media-side signal pair B, negative leg (MDI)."
      },
      {
        "number": "6",
        "name": "VDD1P0",
        "type": "power_in",
        "description": "1 V analog supply, +15.5%/-5% (0.95 V to 1.155 V); each pin needs 1 µF and 0.1 µF capacitors to GND."
      },
      {
        "number": "7",
        "name": "TD_P_C",
        "type": "passive",
        "description": "Differential media-side signal pair C, positive leg (MDI)."
      },
      {
        "number": "8",
        "name": "TD_M_C",
        "type": "passive",
        "description": "Differential media-side signal pair C, negative leg (MDI)."
      },
      {
        "number": "9",
        "name": "VDDA2P5",
        "type": "power_in",
        "description": "2.5 V analog supply, ±5% (2.375 V to 2.625 V); each pin needs 1 µF and 0.1 µF capacitors to GND."
      },
      {
        "number": "10",
        "name": "TD_P_D",
        "type": "passive",
        "description": "Differential media-side signal pair D, positive leg (MDI)."
      },
      {
        "number": "11",
        "name": "TD_M_D",
        "type": "passive",
        "description": "Differential media-side signal pair D, negative leg (MDI)."
      },
      {
        "number": "12",
        "name": "RBIAS",
        "type": "passive",
        "description": "Bias resistor connection; connect an 11 kΩ ±1% resistor from this pin to GND."
      },
      {
        "number": "13",
        "name": "VDDA1P8",
        "type": "power_in",
        "description": "1.8 V analog supply, ±5% (1.71 V to 1.89 V); no external supply is required and the pin must not be connected to any circuit when unused, while an external 1.8 V supply may optionally be connected with 1 µF and 0.1 µF capacitors."
      },
      {
        "number": "14",
        "name": "XO",
        "type": "output",
        "description": "25 MHz crystal output (second terminal); must be left floating when a clock oscillator drives XI."
      },
      {
        "number": "15",
        "name": "XI",
        "type": "input",
        "description": "25 MHz oscillator or crystal input (50 ppm); oscillator drive level is 1.5 to 1.9 Vpp."
      },
      {
        "number": "16",
        "name": "MDC",
        "type": "input",
        "description": "Management data clock for MDIO, maximum 25 MHz with no minimum rate, and may be asynchronous to the MAC clocks."
      },
      {
        "number": "17",
        "name": "MDIO",
        "type": "bidirectional",
        "description": "Management data I/O; requires an external pull-up of 1.5 kΩ per IEEE (2.2 kΩ acceptable)."
      },
      {
        "number": "18",
        "name": "CLK_OUT",
        "type": "output",
        "description": "Clock output; by default synchronized to the XI input clock and configurable through the IO_MUX_CFG register."
      },
      {
        "number": "19",
        "name": "VDDIO",
        "type": "power_in",
        "description": "I/O supply, 1.8 V, 2.5 V or 3.3 V (±5%); each pin needs 1 µF and 0.1 µF capacitors to GND."
      },
      {
        "number": "20",
        "name": "JTAG_CLK",
        "type": "input",
        "description": "IEEE 1149.1 JTAG test clock input with internal pull-up; maximum supported clock frequency is 2.5 MHz."
      },
      {
        "number": "21",
        "name": "JTAG_TDO",
        "type": "output",
        "description": "IEEE 1149.1 JTAG test data output through which the latest test results are scanned out of the device."
      },
      {
        "number": "22",
        "name": "JTAG_TMS",
        "type": "input",
        "description": "IEEE 1149.1 JTAG test mode select with internal pull-up; TI recommends holding it high and applying 3 clock cycles to reset JTAG."
      },
      {
        "number": "23",
        "name": "JTAG_TDI",
        "type": "input",
        "description": "IEEE 1149.1 JTAG test data input with internal pull-up, through which test data is scanned into the device."
      },
      {
        "number": "24",
        "name": "VDD1P0",
        "type": "power_in",
        "description": "1 V analog supply, +15.5%/-5% (0.95 V to 1.155 V); each pin needs 1 µF and 0.1 µF capacitors to GND."
      },
      {
        "number": "25",
        "name": "TX_D3",
        "type": "input",
        "description": "RGMII transmit data bit 3 from MAC to PHY, synchronous to GTX_CLK, with internal pull-down."
      },
      {
        "number": "26",
        "name": "TX_D2",
        "type": "input",
        "description": "RGMII transmit data bit 2 from MAC to PHY, synchronous to GTX_CLK, with internal pull-down."
      },
      {
        "number": "27",
        "name": "TX_D1/SGMII_SIP",
        "type": "input",
        "description": "RGMII transmit data bit 1 in RGMII mode; positive SGMII differential data input in SGMII mode, which may be AC-coupled to the MAC with 0.1 µF."
      },
      {
        "number": "28",
        "name": "TX_D0/SGMII_SIN",
        "type": "input",
        "description": "RGMII transmit data bit 0 in RGMII mode; negative SGMII differential data input in SGMII mode, which may be AC-coupled to the MAC with 0.1 µF."
      },
      {
        "number": "29",
        "name": "GTX_CLK",
        "type": "input",
        "description": "RGMII transmit clock supplied continuously by the MAC; nominal frequency 125 MHz."
      },
      {
        "number": "30",
        "name": "VDDIO",
        "type": "power_in",
        "description": "I/O supply, 1.8 V, 2.5 V or 3.3 V (±5%); each pin needs 1 µF and 0.1 µF capacitors to GND."
      },
      {
        "number": "31",
        "name": "VDD1P0",
        "type": "power_in",
        "description": "1 V analog supply, +15.5%/-5% (0.95 V to 1.155 V); each pin needs 1 µF and 0.1 µF capacitors to GND."
      },
      {
        "number": "32",
        "name": "RX_CLK",
        "type": "output",
        "description": "RGMII receive clock recovered from the line: 2.5 MHz at 10 Mbps, 25 MHz at 100 Mbps and 125 MHz at 1000 Mbps."
      },
      {
        "number": "33",
        "name": "RX_D0/SGMII_COP",
        "type": "output",
        "description": "RGMII receive data bit 0 in RGMII mode; positive SGMII differential 625 MHz clock output in SGMII mode, which may be AC-coupled with 0.1 µF."
      },
      {
        "number": "34",
        "name": "RX_D1/SGMII_CON",
        "type": "output",
        "description": "RGMII receive data bit 1 in RGMII mode; negative SGMII differential 625 MHz clock output in SGMII mode, which may be AC-coupled with 0.1 µF."
      },
      {
        "number": "35",
        "name": "RX_D2/SGMII_SOP",
        "type": "output",
        "description": "RGMII receive data bit 2 in RGMII mode; positive SGMII differential data output in SGMII mode, which may be AC-coupled with 0.1 µF."
      },
      {
        "number": "36",
        "name": "RX_D3/SGMII_SON",
        "type": "output",
        "description": "RGMII receive data bit 3 in RGMII mode; negative SGMII differential data output in SGMII mode, which may be AC-coupled with 0.1 µF."
      },
      {
        "number": "37",
        "name": "TX_CTRL",
        "type": "input",
        "description": "RGMII transmit control carrying TX_EN and TX_ER encoded on both edges of GTX_CLK, with internal pull-down."
      },
      {
        "number": "38",
        "name": "RX_CTRL",
        "type": "bidirectional",
        "description": "RGMII receive control carrying RXDV and RX_ER combined as RXDV_ER on both edges of RX_CLK; also a strap pin that must be configured to strap mode 3 or 4 (or bit 7 of register 0x0031 cleared)."
      },
      {
        "number": "39",
        "name": "GPIO_0",
        "type": "bidirectional",
        "description": "Multi-function general-purpose I/O configured through the GPIO_MUX_CTRL register; also a strap pin (modes 1 and 3 only)."
      },
      {
        "number": "40",
        "name": "GPIO_1",
        "type": "bidirectional",
        "description": "Multi-function general-purpose I/O configured through the GPIO_MUX_CTRL register; also a strap pin."
      },
      {
        "number": "41",
        "name": "VDDIO",
        "type": "power_in",
        "description": "I/O supply, 1.8 V, 2.5 V or 3.3 V (±5%); each pin needs 1 µF and 0.1 µF capacitors to GND."
      },
      {
        "number": "42",
        "name": "VDD1P0",
        "type": "power_in",
        "description": "1 V analog supply, +15.5%/-5% (0.95 V to 1.155 V); each pin needs 1 µF and 0.1 µF capacitors to GND."
      },
      {
        "number": "43",
        "name": "RESET_N",
        "type": "input",
        "description": "Active-low reset with internal pull-up; must be held low for at least 1 µs to reinitialize the device and all registers."
      },
      {
        "number": "44",
        "name": "INT/PWDN",
        "type": "bidirectional",
        "description": "Active-low power-down input by default; when configured as interrupt it is an open-drain output, and TI recommends a 2.2 kΩ external pull-up to VDDIO; internal pull-up."
      },
      {
        "number": "45",
        "name": "LED_2",
        "type": "bidirectional",
        "description": "LED output and strap pin; by default indicates receive or transmit activity, with other functions set by LEDCR1[11:8]."
      },
      {
        "number": "46",
        "name": "LED_1",
        "type": "bidirectional",
        "description": "LED output and strap pin; by default indicates 1000BASE-T link established, with other functions set by LEDCR1[7:4]."
      },
      {
        "number": "47",
        "name": "LED_0",
        "type": "bidirectional",
        "description": "LED output and strap pin; by default indicates link established, with other functions set by LEDCR1[3:0]."
      },
      {
        "number": "48",
        "name": "VDDA1P8",
        "type": "power_in",
        "description": "1.8 V analog supply, ±5%; same rules as pin 13 (no external supply required, leave unconnected when unused, optional external 1.8 V with 1 µF and 0.1 µF capacitors)."
      },
      {
        "number": "49",
        "name": "EP",
        "type": "passive",
        "description": "Exposed pad (from the footprint; not named in the datasheet pin table)."
      }
    ],
    "provenance": {
      "extractor": "extract_pins 0.3",
      "factory_chain": {
        "factory": "2.0.0",
        "extractor": "extract_pins 0.3",
        "primary_model": "claude-haiku-5-5",
        "primary_mode": "text",
        "consensus_model": "claude-sonnet-5-5",
        "consensus": "agreed",
        "guards": "pin_guards 0.1: passed",
        "guard_notes": [
          "extractor flagged: The exposed die attach pad (DAP, internally GND) is listed in the datasheet as 'GND 裸片连接焊盘' but has ; Pins 27, 28, 33, 34, 35, 36 are shared RGMII/SGMII functions. The table gives both names for the sam; Pin 13 and pin 48 (VDDA1P8) are typed power_in, but the datasheet says the pin needs no external sup",
          "exposed pad 49 added from the footprint"
        ],
        "pages_sent": 63,
        "cost_usd": 0.3464,
        "at": "2026-10-08T23:26:51"
      },
      "datasheet": {
        "url": "https://www.ti.com/cn/lit/gpn/dp83867is",
        "pages": 127,
        "sha256": "101dd83b84e239fd",
        "source_tier": "lcsc"
      },
      "cad": "KiCad official (CC-BY-SA 4.0)",
      "pins": {
        "total": 49,
        "described": 49,
        "cites_pages": true,
        "refuses_to_fabricate": true
      }
    },
    "viewers": {
      "symbol": "viewers/symbol.html",
      "footprint": "viewers/footprint.html"
    },
    "models_3d": [
      {
        "file": "dp83867csrgzr.step",
        "role": "plain",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          7.0,
          7.0,
          0.77
        ],
        "zmin_mm": 0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "f2b38b0b4bf967c77e683e8d4599608b9f0503055ec535b93c4ebb5d0163e916",
        "checked": "2026-10-08",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      },
      {
        "file": "dp83867csrgzr-etched.step",
        "role": "eda",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          7.0,
          7.0,
          0.77
        ],
        "zmin_mm": 0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "70d2c12ccb1ec4787720b90e904e495a135aafb692723a50e8fab7136f0ae07f",
        "checked": "2026-10-08",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      }
    ]
  }
}