DP83640TVV

{
  "schema_version": 1,
  "type": "component",
  "slug": "dp83640tvv",
  "title": "DP83640TVV",
  "brief": "Texas Instruments Ethernet Transceivers, LQFP-48(7x7). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
  "version": "0.1.0",
  "license": "CC-BY-SA-4.0",
  "tags": [
    "component",
    "interface",
    "dp83640tvv",
    "factory-2.0.0",
    "extractor-text"
  ],
  "component": {
    "mpn": "DP83640TVV",
    "manufacturer": "Texas Instruments",
    "package": "LQFP-48(7x7)",
    "pin_count": 48,
    "category": "Interface",
    "subcategory": "Ethernet Transceivers",
    "datasheet": "https://www.ti.com/cn/lit/gpn/dp83640",
    "parts": {
      "symbol": "dp83640tvv.kicad_sym",
      "footprint": "dp83640tvv.kicad_mod",
      "model_3d": "dp83640tvv-hero.glb",
      "model_3d_plain": "dp83640tvv.glb",
      "model_3d_step": "dp83640tvv-etched.step",
      "model_3d_step_plain": "dp83640tvv.step",
      "lbr": "dp83640tvv.lbr"
    },
    "distributor_links": {
      "lcsc": "C181506",
      "digikey": "DP83640TVV-ND",
      "mouser": "926-DP83640TVV"
    },
    "distributor_check": {
      "checked_at": "2026-10-11T13:44:05Z",
      "source": "Component Ocean /api/assign-pns",
      "digikey": {
        "pn": "DP83640TVV-ND",
        "status": "found",
        "lifecycle": "Obsolete"
      },
      "mouser": {
        "pn": "926-DP83640TVV",
        "status": "found",
        "lifecycle": "Obsolete"
      }
    },
    "pins": [
      {
        "number": "1",
        "name": "TX_CLK",
        "type": "output",
        "description": "MII transmit clock output at 25 MHz in 100 Mb/s mode or 2.5 MHz in 10 Mb/s mode, derived from the 25-MHz reference, and in RMII Master mode it outputs the internal 50-MHz reference clock."
      },
      {
        "number": "2",
        "name": "TX_EN",
        "type": "input",
        "description": "Active-high transmit enable indicating valid data on TXD[3:0] in MII mode or on TXD[1:0] in RMII mode, with an internal pulldown."
      },
      {
        "number": "3",
        "name": "TXD_0",
        "type": "input",
        "description": "MII transmit data bit 0, sampled synchronous to TX_CLK (2.5 MHz in 10 Mb/s or 25 MHz in 100 Mb/s), and RMII TXD[0] synchronous to the 50-MHz reference clock."
      },
      {
        "number": "4",
        "name": "TXD_1",
        "type": "input",
        "description": "MII transmit data bit 1, synchronous to TX_CLK (2.5 MHz in 10 Mb/s or 25 MHz in 100 Mb/s), and RMII TXD[1] synchronous to the 50-MHz reference clock."
      },
      {
        "number": "5",
        "name": "TXD_2",
        "type": "input",
        "description": "MII transmit data bit 2, synchronous to TX_CLK (2.5 MHz in 10 Mb/s or 25 MHz in 100 Mb/s); RMII uses only TXD[1:0]."
      },
      {
        "number": "6",
        "name": "TXD_3",
        "type": "input",
        "description": "MII transmit data bit 3, synchronous to TX_CLK; this pin also serves as the RMII_MASTER strap with an internal pulldown, enabling RMII Master mode when MII_MODE is strapped high."
      },
      {
        "number": "7",
        "name": "PWRDOWN/INTN",
        "type": "input",
        "description": "Power-down input that enters Power Down mode when asserted low (weak internal pullup, overdriven by external drive), or an active-low interrupt output when INT_OE is set in MICR."
      },
      {
        "number": "8",
        "name": "TCK",
        "type": "input",
        "description": "JTAG test clock input with a weak internal pullup."
      },
      {
        "number": "9",
        "name": "TDO",
        "type": "output",
        "description": "JTAG test data output, which can also be used as GPIO10 when JTAG is not in use."
      },
      {
        "number": "10",
        "name": "TMS",
        "type": "input",
        "description": "JTAG test mode select input with a weak internal pullup."
      },
      {
        "number": "11",
        "name": "TRST#",
        "type": "input",
        "description": "Active-low JTAG test reset input with a weak internal pullup."
      },
      {
        "number": "12",
        "name": "TDI",
        "type": "input",
        "description": "JTAG test data input with a weak internal pullup, which can also be used as GPIO11."
      },
      {
        "number": "13",
        "name": "RD-",
        "type": "bidirectional",
        "description": "Differential receive input pair (negative), automatically configured for 10BASE-T or 100BASE-TX, requiring 3.3-V bias for operation."
      },
      {
        "number": "14",
        "name": "RD+",
        "type": "bidirectional",
        "description": "Differential receive input pair (positive), automatically configured for 10BASE-T or 100BASE-TX, requiring 3.3-V bias for operation."
      },
      {
        "number": "15",
        "name": "CD_VSS",
        "type": "power_in",
        "description": "Analog ground for the 10BASE-T/100BASE-TX common driver."
      },
      {
        "number": "16",
        "name": "TD-",
        "type": "bidirectional",
        "description": "Differential transmit output pair (negative), automatically configured for 10BASE-T or 100BASE-TX, requiring 3.3-V bias for operation."
      },
      {
        "number": "17",
        "name": "TD+",
        "type": "bidirectional",
        "description": "Differential transmit output pair (positive), automatically configured for 10BASE-T or 100BASE-TX, requiring 3.3-V bias for operation."
      },
      {
        "number": "18",
        "name": "ANAVSS",
        "type": "power_in",
        "description": "Analog ground."
      },
      {
        "number": "19",
        "name": "ANA33VDD",
        "type": "power_in",
        "description": "Analog VDD supply at 3.3 V ±10% (3.3 ± 0.3 V)."
      },
      {
        "number": "20",
        "name": "VREF",
        "type": "power_in",
        "description": "Bias resistor connection, where a 4.87-kΩ 1% resistor must be connected from VREF to GND."
      },
      {
        "number": "21",
        "name": "GPIO1",
        "type": "bidirectional",
        "description": "General-purpose I/O used to signal or detect events (internal pulldown), which is also the CLK_OUT_EN strap sampled at power-up."
      },
      {
        "number": "22",
        "name": "GPIO2",
        "type": "bidirectional",
        "description": "General-purpose I/O used to signal or detect events (internal pulldown), which is also the PCF_EN strap enabling response to PHY Control Frames when high."
      },
      {
        "number": "23",
        "name": "GPIO3",
        "type": "bidirectional",
        "description": "General-purpose I/O used to signal or detect events (internal pulldown)."
      },
      {
        "number": "24",
        "name": "CLK_OUT",
        "type": "bidirectional",
        "description": "Configurable system clock output (default 25 MHz relative to the internal PTP clock) that doubles as an external IEEE 1588 reference clock input, where CLK_OUT_EN should be disabled to avoid contention."
      },
      {
        "number": "25",
        "name": "GPIO4",
        "type": "bidirectional",
        "description": "General-purpose I/O used to signal or detect events (internal pulldown)."
      },
      {
        "number": "26",
        "name": "LED_ACT",
        "type": "bidirectional",
        "description": "Activity LED output (ON for transmit or receive activity in Mode 1, collision in Mode 2, duplex in Mode 3), which also serves as the AN0 strap input and GPIO5."
      },
      {
        "number": "27",
        "name": "LED_SPEED/FX_SD",
        "type": "bidirectional",
        "description": "Speed LED that is ON at 100 Mb/s and OFF at 10 Mb/s, which also serves as the FX_SD fiber signal-detect input in 100BASE-FX mode and the AN1 strap."
      },
      {
        "number": "28",
        "name": "LED_LINK",
        "type": "bidirectional",
        "description": "Link LED that is ON for good link in all modes and blinks for activity in Modes 2 and 3, which also serves as the AN_EN strap and GPIO7."
      },
      {
        "number": "29",
        "name": "RESET_N",
        "type": "input",
        "description": "Active-low reset with weak internal pullup, where asserting low for at least 1 µs re-initializes all registers and strap options to their defaults."
      },
      {
        "number": "30",
        "name": "MDIO",
        "type": "bidirectional",
        "description": "Bidirectional management data I/O that requires a 1.5-kΩ pullup resistor, or an internal pullup enabled by CDCTRL1 bit 3."
      },
      {
        "number": "31",
        "name": "MDC",
        "type": "input",
        "description": "Management data clock input with a maximum rate of 25 MHz and no minimum rate."
      },
      {
        "number": "32",
        "name": "IO_VDD",
        "type": "power_in",
        "description": "I/O VDD supply (2.5 V or 3.3 V I/O)."
      },
      {
        "number": "33",
        "name": "X2",
        "type": "output",
        "description": "Crystal output for an external 25-MHz crystal resonator, which must be left unconnected when an external CMOS oscillator is used."
      },
      {
        "number": "34",
        "name": "X1",
        "type": "input",
        "description": "Primary clock reference input requiring a 25-MHz ±50 ppm crystal or CMOS oscillator (50-MHz ±50 ppm CMOS oscillator in RMII Slave mode)."
      },
      {
        "number": "35",
        "name": "IO_CORE_VSS",
        "type": "power_in",
        "description": "Digital ground."
      },
      {
        "number": "36",
        "name": "GPIO8",
        "type": "bidirectional",
        "description": "General-purpose I/O used to signal or detect events (internal pulldown)."
      },
      {
        "number": "37",
        "name": "GPIO9",
        "type": "bidirectional",
        "description": "General-purpose I/O used to signal or detect events."
      },
      {
        "number": "38",
        "name": "RX_CLK",
        "type": "output",
        "description": "MII receive clock providing 25 MHz recovered clock in 100 Mb/s mode and 2.5 MHz in 10 Mb/s mode, and in RMII Master mode outputs the internal 50-MHz reference clock."
      },
      {
        "number": "39",
        "name": "RX_DV",
        "type": "output",
        "description": "Receive data valid asserted high to indicate valid data on RXD[3:0] in MII mode, or RMII receive data valid independent of carrier sense; has an internal pulldown."
      },
      {
        "number": "40",
        "name": "CRS/CRS_DV",
        "type": "bidirectional",
        "description": "MII carrier sense asserted high when the receive medium is non-idle, or RMII combined carrier sense/receive data valid, which also serves as the LED_CFG strap."
      },
      {
        "number": "41",
        "name": "RX_ER",
        "type": "bidirectional",
        "description": "Receive error asserted high synchronously to RX_CLK for an invalid symbol in 100 Mb/s MII mode, or to X1 on a media error in RMII mode, which also serves as the FX_EN_Z strap."
      },
      {
        "number": "42",
        "name": "COL",
        "type": "bidirectional",
        "description": "Collision detect asserted high during collisions in half-duplex 10 and 100 Mb/s modes, always low in full duplex, which also serves as the PHYAD0 strap."
      },
      {
        "number": "43",
        "name": "RXD_3",
        "type": "bidirectional",
        "description": "MII receive data bit 3 driven synchronously to RX_CLK and valid while RX_DV is asserted, which also serves as the PHYAD1 strap with an internal pulldown."
      },
      {
        "number": "44",
        "name": "RXD_2",
        "type": "bidirectional",
        "description": "MII receive data bit 2 driven synchronously to RX_CLK and valid while RX_DV is asserted, which also serves as the PHYAD2 strap with an internal pulldown."
      },
      {
        "number": "45",
        "name": "RXD_1",
        "type": "bidirectional",
        "description": "MII receive data bit 1 driven synchronously to RX_CLK and valid while RX_DV is asserted, which also serves as the PHYAD3 strap with an internal pulldown."
      },
      {
        "number": "46",
        "name": "RXD_0",
        "type": "bidirectional",
        "description": "MII receive data bit 0 driven synchronously to RX_CLK and valid while RX_DV is asserted, which also serves as the PHYAD4 strap with an internal pulldown."
      },
      {
        "number": "47",
        "name": "IO_VSS",
        "type": "power_in",
        "description": "Digital ground."
      },
      {
        "number": "48",
        "name": "IO_VDD",
        "type": "power_in",
        "description": "I/O VDD supply (2.5 V or 3.3 V I/O)."
      }
    ],
    "provenance": {
      "extractor": "extract_pins 0.3",
      "factory_chain": {
        "factory": "2.0.0",
        "extractor": "extract_pins 0.3",
        "primary_model": "claude-haiku-5-5",
        "primary_mode": "text",
        "consensus_model": "claude-sonnet-5-5",
        "consensus": "agreed",
        "guards": "pin_guards 0.1: passed",
        "guard_notes": [
          "extractor flagged: Pin 20 (VREF) has no electrical type printed in the datasheet; typed as passive because it is a bias; Supply and ground pins (VDD and VSS) are mapped to power_in per the KiCad convention for GND and sup; Pins with dual functions (TDO/GPIO10, TDI/GPIO11, CLK_OUT/GPIO12, LED pins/GPIO5-7, FX_SD, straps) a"
        ],
        "pages_sent": 21,
        "cost_usd": 0.1485,
        "at": "2026-10-11T13:43:40"
      },
      "datasheet": {
        "url": "https://www.ti.com/cn/lit/gpn/dp83640",
        "pages": 136,
        "sha256": "dba00c9035801e90",
        "source_tier": "lcsc"
      },
      "cad": "KiCad official (CC-BY-SA 4.0)",
      "pins": {
        "total": 48,
        "described": 48,
        "cites_pages": true,
        "refuses_to_fabricate": true
      }
    },
    "viewers": {
      "symbol": "viewers/symbol.html",
      "footprint": "viewers/footprint.html"
    },
    "models_3d": [
      {
        "file": "dp83640tvv.step",
        "role": "plain",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          9,
          9,
          1.5
        ],
        "zmin_mm": 0,
        "centre_offset_mm": 0,
        "footprint_binding": "identity",
        "sha256": "9dea352d93177c2904afd7d7b68ea8855ce1ab691f69f8b3e13655600514b6bf",
        "checked": "2026-10-11",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      },
      {
        "file": "dp83640tvv-etched.step",
        "role": "eda",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          9,
          9,
          1.5
        ],
        "zmin_mm": 0,
        "centre_offset_mm": 0,
        "footprint_binding": "identity",
        "sha256": "d580b6e0803123fa70bd4067ec51aefe85afa67b65ed2fda944755e664546ba8",
        "checked": "2026-10-11",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      }
    ]
  },
  "metadata": {
    "specs": {
      "Manufacturer": "Texas Instruments",
      "Package": "LQFP-48(7x7)",
      "Category": "Interface",
      "Pins": "48"
    }
  },
  "variants": [],
  "sections": [
    "hero",
    "viewers",
    "readme",
    "breadcrumbs",
    "info"
  ],
  "discovery_triggers": [
    "dp83640tvv"
  ],
  "discovery_pitch": "DP83640TVV (Texas Instruments) component page: datasheet pinout, KiCad symbol, footprint and 3D.",
  "author": {
    "name": "Ray"
  },
  "dependencies": {},
  "hero": {
    "type": "image",
    "path": "docs/hero.png"
  },
  "files": [
    "page.json",
    "README.md",
    "dp83640tvv.kicad_sym",
    "dp83640tvv.kicad_mod",
    "dp83640tvv.glb",
    "dp83640tvv.step",
    "dp83640tvv.lbr",
    "docs/hero.png",
    "docs/dp83640tvv-datasheet.pdf",
    "viewers/symbol.html",
    "viewers/footprint.html",
    "dp83640tvv-hero.glb",
    "dp83640tvv-hero.overlay.json"
  ],
  "visibility": {
    "public": true
  }
}