# DP6580

**Shenzhen Developer Microelec** · MOSFETs · TO-252

DP6580 from Shenzhen Developer Microelec, in a TO-252. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | G | input | Gate; drive with VGS up to ±25 V absolute maximum, threshold VGS(th) 2 V min, 3 V typ, 4 V max at VDS=VGS, ID=250 µA. |
| 2 | D | passive | Drain, connected to the exposed tab; VDS rated 65 V and continuous ID 85 A (silicon limit) at TC=25°C. |
| 3 | S | passive | Source; body diode forward voltage VSD 0.9 V typ, 1.3 V max at ISD=40 A, RDS(on) 7.1 mΩ typ at VGS=10 V. |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | Shenzhen Developer Microelec |
| Package | TO-252 |
| Category | Triode/MOS Tube/Transistor |
| Pins | 3 |

## Electrical characteristics

Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).

| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Drain-source breakdown voltage | BVDSS | 65 |  |  | V | VGS=0V, ID=250uA | 3 |
| Gate threshold voltage | VGS(th) | 2 | 3 | 4 | V | VDS=VGS, ID=250uA | 3 |
| Zero gate voltage drain current (Tj=25°C) | IDSS |  | 0.05 | 1 | µA | VDS=65V, VGS=0V, Tj=25°C | 3 |
| Zero gate voltage drain current (Tj=125°C) | IDSS |  |  | 5 | µA | VDS=65V, VGS=0V, Tj=125°C | 3 |
| Gate-source leakage current | IGSS |  | 10 | 100 | nA | VGS=25V, VDS=0V | 3 |
| Drain-source on-state resistance | RDS(on) |  | 7.1 | 8.4 | mΩ | VGS=10V, ID=40A, Tj=25°C | 3 |
| Body diode forward voltage | VSD |  | 0.9 | 1.3 | V | VGS=0V, ISD=40A | 4 |
| Drain-source voltage | VDS |  |  | 65 | V |  | 2 |
| Continuous drain current (silicon limit) | ID |  |  | 85 | A | TC = 25°C (Silicon limit) | 2 |
| Continuous drain current (package limit) | ID |  |  | 87 | A | TC = 25°C (Package limit) | 2 |
| Continuous drain current (silicon limit) | ID |  |  | 54 | A | TC = 100°C (Silicon limit) | 2 |
| Pulsed drain current | ID pulse |  |  | 340 | A | TC = 25°C, tp limited by Tjmax | 2 |
| Avalanche energy, single pulse | EAS |  |  | 400 | mJ | L=0.5mH, Rg=25Ω | 2 |
| Gate-source voltage | VGS | -25 |  | 25 | V |  | 3 |
| Power dissipation | Ptot |  |  | 98 | W | TC = 25°C | 3 |
| Operating junction and storage temperature | Tj, Tstg | -55 |  | 150 | °C |  | 3 |
| Thermal resistance, junction to case | RthJC |  |  | 1.27 | °C/W | junction to case | 3 |
| Thermal resistance, junction to ambient | RthJA |  |  | 102 | °C/W | junction to ambient (min. footprint) | 3 |

## CAD (KiCad official)

- Symbol: `DP6580`
- Footprint: `Package_TO_SOT_SMD:TO-252-2`
- 3D model: TO-252 (KiCad packages3D, STEP)
- 3D model files: `dp6580-etched.step` / `dp6580-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `dp6580.step` / `dp6580.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [Shenzhen Developer Microelec datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8590892441132756993) (12 pp, sha256 `7c5a693082ea169c`, retrieved 2026-10-19, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-sonnet-5-5` (text+vision), consensus `claude-opus-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/dp6580-datasheet.pdf)