# DMP6110SSD-13

**Diodes Incorporated** · MOSFETs · SO-8

DMP6110SSD-13 from Diodes Incorporated, in a SO-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | S1 | passive | Source of MOSFET 1 (P-channel, VDSS -60V). |
| 2 | G1 | input | Gate of MOSFET 1; gate-source voltage limited to ±20V with threshold of -1V to -3V. |
| 3 | S2 | passive | Source of MOSFET 2 (P-channel, VDSS -60V). |
| 4 | G2 | input | Gate of MOSFET 2; gate-source voltage limited to ±20V with threshold of -1V to -3V. |
| 5 | D2 | passive | Drain of MOSFET 2, connected to pin 6; continuous drain current -3.3A at TA=+25°C. |
| 6 | D2 | passive | Drain of MOSFET 2, connected to pin 5; continuous drain current -3.3A at TA=+25°C. |
| 7 | D1 | passive | Drain of MOSFET 1, connected to pin 8; continuous drain current -3.3A at TA=+25°C. |
| 8 | D1 | passive | Drain of MOSFET 1, connected to pin 7; continuous drain current -3.3A at TA=+25°C. |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | Diodes Incorporated |
| Package | SO-8 |
| Category | Transistors/Thyristors |
| Pins | 8 |

## Electrical characteristics

Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).

| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Drain-Source Breakdown Voltage | BVDSS | -60 |  |  | V | VGS = 0V, ID = -250µA | 3 |
| Zero Gate Voltage Drain Current | IDSS |  |  | -1 | μA | TJ = +25°C, VDS = -48V, VGS = 0V | 3 |
| Gate-Source Leakage | IGSS |  |  | 100 | nA | VGS = ±16V, VDS = 0V | 3 |
| Gate Threshold Voltage | VGS(TH) | -1 |  | -3 | V | VDS = VGS, ID = -250µA | 3 |
| Static Drain-Source On-Resistance | RDS(ON) |  |  | 105 | mΩ | VGS = -10V, ID = -4.5A | 3 |
| Static Drain-Source On-Resistance | RDS(ON) |  |  | 130 | mΩ | VGS = -4.5V, ID = -3.5A | 3 |
| Diode Forward Voltage | VSD |  | -0.7 | -1.2 | V | VGS = 0V, IS = -1A | 3 |
| Drain-Source Voltage | VDSS | -60 |  |  | V |  | 2 |
| Gate-Source Voltage | VGSS | -20 |  | 20 | V |  | 2 |
| Continuous Drain Current (TC = +25°C) | ID | -7.8 |  |  | A | VGS = -10V, TC = +25°C | 2 |
| Continuous Drain Current (TC = +70°C) | ID | -6.3 |  |  | A | VGS = -10V, TC = +70°C | 2 |
| Continuous Drain Current (TA = +25°C) | ID | -3.3 |  |  | A | VGS = -10V, TA = +25°C | 2 |
| Continuous Drain Current (TA = +70°C) | ID | -2.7 |  |  | A | VGS = -10V, TA = +70°C | 2 |
| Pulsed Drain Current | IDM | -24 |  |  | A | 380µs Pulse, 1% Duty Cycle | 2 |
| Maximum Continuous Body Diode Forward Current | IS | -1.8 |  |  | A | Note 6 | 2 |
| Avalanche Current | IAS | -19 |  |  | A | L = 0.1mH, Note 9 | 2 |
| Avalanche Energy | EAS |  |  | 18 | mJ | L = 0.1mH, Note 9 | 2 |
| Operating and Storage Temperature Range | TJ, TSTG | -55 |  | 150 | °C |  | 2 |
| Total Power Dissipation (TA = +25°C) | PD |  |  | 1.2 | W | Notes 5 & 7 | 2 |
| Total Power Dissipation (TA = +70°C) | PD |  |  | 0.9 | W | Notes 5 & 7 | 2 |
| Total Power Dissipation (TA = +25°C) | PD |  |  | 1.7 | W | Notes 6 & 7 | 2 |
| Total Power Dissipation (TA = +70°C) | PD |  |  | 1.1 | W | Notes 6 & 7 | 2 |
| Total Power Dissipation (TA = +25°C) | PD |  |  | 1.8 | W | Notes 6 & 8 | 2 |
| Thermal Resistance, Junction to Ambient (steady state) | RθJA |  |  | 104 | °C/W | Notes 5 & 7 | 2 |
| Thermal Resistance, Junction to Ambient (t<10s) | RθJA |  |  | 45 | °C/W | Notes 5 & 7 | 2 |
| Thermal Resistance, Junction to Ambient (steady state) | RθJA |  |  | 100 | °C/W | Notes 5 & 8 | 2 |
| Thermal Resistance, Junction to Ambient (steady state) | RθJA |  |  | 74 | °C/W | Notes 6 & 7 | 2 |
| Thermal Resistance, Junction to Ambient (t<10s) | RθJA |  |  | 37 | °C/W | Notes 6 & 7 | 2 |
| Thermal Resistance, Junction to Ambient (steady state) | RθJA |  |  | 71 | °C/W | Notes 6 & 8 | 2 |
| Thermal Resistance, Junction to Case | RθJC |  |  | 15 | °C/W | Notes 6 & 7 | 2 |

## CAD (KiCad official)

- Symbol: `DMP6110SSD-13`
- Footprint: `Package_SO:SOIC-8_3.9x4.9mm_P1.27mm`
- 3D model: SO-8 (KiCad packages3D, STEP)
- 3D model files: `dmp6110ssd-13-etched.step` / `dmp6110ssd-13-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `dmp6110ssd-13.step` / `dmp6110ssd-13.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [Diodes Incorporated datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588885241297842176) (8 pp, sha256 `e617dfb4c1f80575`, retrieved 2026-10-09, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-sonnet-5-5` (text+vision), consensus `claude-opus-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/dmp6110ssd-13-datasheet.pdf)