component
DMP2075UVT-13
Public Made by Adomby adom
Diodes Incorporated MOSFETs, TSOT-26. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
Generated by kicad-footprint-generator · KiCad file format 20260206
| Name | Last updated |
|---|---|
| docs | 13d ago |
| viewers | 13d ago |
| dmp2075uvt-13-etched.glb | 13d ago |
| dmp2075uvt-13-etched.step | 13d ago |
| dmp2075uvt-13-hero.glb | 13d ago |
| dmp2075uvt-13-hero.overlay.json | 13d ago |
| dmp2075uvt-13.glb | 13d ago |
| dmp2075uvt-13.kicad_mod | 13d ago |
| dmp2075uvt-13.kicad_sym | 13d ago |
| dmp2075uvt-13.lbr | 13d ago |
| dmp2075uvt-13.step | 13d ago |
| package.json | 13d ago |
| page.json | 13d ago |
| README.md | 13d ago |
DMP2075UVT-13
Diodes Incorporated · MOSFETs · TSOT-26
DMP2075UVT-13 from Diodes Incorporated, in a TSOT-26. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | D | passive | Drain terminal of the P-channel MOSFET; VDSS is -20 V and continuous drain current is -3.8 A at TA = +25°C (VGS = -4.5 V). |
| 2 | D | passive | Drain terminal of the P-channel MOSFET; VDSS is -20 V and continuous drain current is -3.8 A at TA = +25°C (VGS = -4.5 V). |
| 3 | G | input | Gate terminal with an integrated gate protection diode; gate-source voltage is limited to ±8 V (VGSS). |
| 4 | S | passive | Source terminal of the P-channel MOSFET; maximum continuous body diode forward current is -2.1 A. |
| 5 | D | passive | Drain terminal of the P-channel MOSFET; VDSS is -20 V and continuous drain current is -3.8 A at TA = +25°C (VGS = -4.5 V). |
| 6 | D | passive | Drain terminal of the P-channel MOSFET; VDSS is -20 V and continuous drain current is -3.8 A at TA = +25°C (VGS = -4.5 V). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Diodes Incorporated |
| Package | TSOT-26 |
| Category | Transistors/Thyristors |
| Pins | 6 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Drain-Source Voltage | VDSS | -20 | V | 2 | |||
| Gate-Source Voltage | VGSS | -8 | 8 | V | 2 | ||
| Continuous Drain Current (steady state, TA = +25°C) | ID | -3.8 | A | VGS = -4.5V, steady state, TA = +25°C (Note 6) | 2 | ||
| Continuous Drain Current (steady state, TA = +70°C) | ID | -3 | A | VGS = -4.5V, steady state, TA = +70°C (Note 6) | 2 | ||
| Maximum Continuous Body Diode Forward Current | IS | -2.1 | A | Note 6 | 2 | ||
| Pulsed Drain Current | IDM | -25 | A | 10µs pulse, duty cycle = 1% | 2 | ||
| Total Power Dissipation | PD | 1.2 | W | Note 5: FR-4 PCB, 2oz copper, minimum recommended pad layout | 2 | ||
| Thermal Resistance, Junction to Ambient, Steady State | RθJA | 105 | °C/W | Note 5: FR-4 PCB, 2oz copper, minimum recommended pad layout | 2 | ||
| Total Power Dissipation | PD | 1.6 | W | Note 6: FR-4 PCB, 2oz copper, 1 inch square copper plate | 2 | ||
| Thermal Resistance, Junction to Ambient, Steady State | RθJA | 77 | °C/W | Note 6: FR-4 PCB, 2oz copper, 1 inch square copper plate | 2 | ||
| Operating and Storage Temperature Range | TJ, TSTG | -55 | 150 | °C | 2 | ||
| Drain-Source Breakdown Voltage | BVDSS | -20 | V | VGS = 0V, ID = -250µA | 2 | ||
| Zero Gate Voltage Drain Current (TJ = +25°C) | IDSS | -1 | µA | VDS = -20V, VGS = 0V | 2 | ||
| Gate-Source Leakage | IGSS | -10 | 10 | µA | VGS = ±8.0V, VDS = 0V | 2 | |
| Gate Threshold Voltage | VGS(TH) | -0.3 | -1 | V | VDS = VGS, ID = -250µA | 2 | |
| Static Drain-Source On-Resistance | RDS(ON) | 75 | mΩ | VGS = -4.5V, ID = -4.0A | 2 | ||
| Static Drain-Source On-Resistance | RDS(ON) | 137 | mΩ | VGS = -2.5V, ID = -3.5A | 2 | ||
| Diode Forward Voltage | VSD | -1.2 | V | VGS = 0V, IS = -1.0A | 2 |
Materials and finish
As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).
| Part | Material | Colour / plating | Datasheet says | Page |
|---|---|---|---|---|
| contacts | Copper | tin | Terminal Connections: See Diagram Terminals: Finish, Matte Tin Annealed over Copper Leadframe. | 1 |
CAD (KiCad official)
- Symbol:
DMP2075UVT-13 - Footprint:
Package_TO_SOT_SMD:TSOT-23-6 - 3D model: TSOT-26 (KiCad packages3D, STEP)
- 3D model files:
dmp2075uvt-13-etched.step/dmp2075uvt-13-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);dmp2075uvt-13.step/dmp2075uvt-13.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Diodes Incorporated datasheet (7 pp, sha256
a00134040fb97463, retrieved 2026-10-20, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).