# DMNH4015SSDQ-13

**Diodes Incorporated** · MOSFETs · SO-8

DMNH4015SSDQ-13 from Diodes Incorporated, in a SO-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model). Symbol and footprint from KiCad-official CAD; the 3D model is generated from the datasheet's package dimensions.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | S1 | passive | Source of N-channel MOSFET 1; the pin 1 corner marker is shown on the top view. |
| 2 | G1 | input | Gate of N-channel MOSFET 1; gate-source voltage is rated ±20 V (VGSS). |
| 3 | S2 | passive | Source of N-channel MOSFET 2. |
| 4 | G2 | input | Gate of N-channel MOSFET 2; gate-source voltage is rated ±20 V (VGSS). |
| 5 | D2 | passive | Drain of N-channel MOSFET 2; drain-source voltage is rated 40 V (VDSS). |
| 6 | D2 | passive | Drain of N-channel MOSFET 2, connected to pin 5; drain-source voltage is rated 40 V (VDSS). |
| 7 | D1 | passive | Drain of N-channel MOSFET 1, connected to pin 8; drain-source voltage is rated 40 V (VDSS). |
| 8 | D1 | passive | Drain of N-channel MOSFET 1; drain-source voltage is rated 40 V (VDSS). |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | Diodes Incorporated |
| Package | SO-8 |
| Category | Triode/MOS Tube/Transistor |
| Pins | 8 |

## Electrical characteristics

Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).

| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Drain-Source Breakdown Voltage | BVDSS | 40 |  |  | V | VGS = 0V, ID = 250µA | 2 |
| Zero Gate Voltage Drain Current | IDSS |  |  | 1 | µA | VDS = 40V, VGS = 0V | 2 |
| Gate-Source Leakage | IGSS |  |  | 100 | nA | VGS = ±20V, VDS = 0V | 2 |
| Gate Threshold Voltage | VGS(TH) | 1 |  | 3 | V | VDS = VGS, ID = 250µA | 2 |
| Static Drain-Source On-Resistance | RDS(ON) |  | 10 | 15 | mΩ | VGS = 10V, ID = 12A | 2 |
| Static Drain-Source On-Resistance | RDS(ON) |  | 12 | 20 | mΩ | VGS = 4.5V, ID = 10A | 2 |
| Diode Forward Voltage | VSD |  | 0.7 | 1 | V | VGS = 0V, IS = 1A | 2 |
| Gate Resistance | RG |  | 1.8 | 3.2 | Ω | VDS = 0V, VGS = 0V, f = 1.0MHz | 2 |
| Drain-Source Voltage | VDSS |  |  | 40 | V |  | 2 |
| Gate-Source Voltage | VGSS | -20 |  | 20 | V |  | 2 |
| Continuous Drain Current, steady state | ID |  |  | 8.6 | A | VGS = 10V, steady state, TA = +25°C (Note 7) | 2 |
| Continuous Drain Current, steady state | ID |  |  | 6.9 | A | VGS = 10V, steady state, TA = +70°C (Note 7) | 2 |
| Continuous Drain Current, t<10s | ID |  |  | 11 | A | VGS = 10V, t<10s, TA = +25°C (Note 7) | 2 |
| Continuous Drain Current, t<10s | ID |  |  | 8.8 | A | VGS = 10V, t<10s, TA = +70°C (Note 7) | 2 |
| Maximum Body Diode Forward Current | IS |  |  | 2.2 | A | Note 7 | 2 |
| Pulsed Drain Current | IDM |  |  | 80 | A | 380µs pulse, duty cycle = 1% | 2 |
| Avalanche Current | IAS |  |  | 25 | A | L = 0.1mH (Note 8) | 2 |
| Avalanche Energy | EAS |  |  | 33 | mJ | L = 0.1mH (Note 8) | 2 |
| Total Power Dissipation | PD |  |  | 1.4 | W | TA = +25°C (Note 6) | 2 |
| Total Power Dissipation | PD |  |  | 0.9 | W | TA = +70°C (Note 6) | 2 |
| Total Power Dissipation | PD |  |  | 2 | W | TA = +25°C (Note 7) | 2 |
| Total Power Dissipation | PD |  |  | 1.2 | W | TA = +70°C (Note 7) | 2 |
| Thermal Resistance, Junction to Ambient, steady state | RθJA |  |  | 111 | °C/W | Steady state (Note 6) | 2 |
| Thermal Resistance, Junction to Ambient, t<10s | RθJA |  |  | 66 | °C/W | t<10s (Note 6) | 2 |
| Thermal Resistance, Junction to Ambient, steady state | RθJA |  |  | 75 | °C/W | Steady state (Note 7) | 2 |
| Thermal Resistance, Junction to Ambient, t<10s | RθJA |  |  | 45 | °C/W | t<10s (Note 7) | 2 |
| Thermal Resistance, Junction to Case | RθJC |  |  | 10.4 | °C/W | Note 7 | 2 |
| Operating and Storage Temperature Range | TJ, TSTG | -55 |  | 175 | °C |  | 2 |

## Materials and finish

As the datasheet states them (page.json `metadata.appearance`; the 3D model's colours follow it).

| Part | Material | Colour / plating | Datasheet says | Page |
|---|---|---|---|---|
| housing | PC |  | Body Diode Reverse Recovery Charge Qrr  7.6  nC Notes: 6. Device mounted on FR-4 substrate PC board, 2oz copper, with minimum recommended pad layout. | 2 |
| contacts | Copper | tin |  Terminal Connections: See Diagram  Terminals: Finish, Tin Finish Annealed over Copper Leadframe. | 1 |

## CAD (land: KiCad; 3D: generated from the datasheet)

- Symbol: `DMNH4015SSDQ-13`
- Footprint: `Package_SO:SOIC-8_3.9x4.9mm_P1.27mm`
- 3D model: SO-8, generated on the KiCad land (body 3.85 x 4.9 mm, terminals on the pads, 1.45 mm tall, datasheet A, nominal). KiCad's stock model for this land is taller than the datasheet allows, so the model is generated from the datasheet drawing; the dimensions come from the datasheet drawing where it was read and are defaults otherwise (see provenance.model_3d_generated), not the manufacturer's CAD (STEP)
- 3D model files: `dmnh4015ssdq-13-etched.step` / `dmnh4015ssdq-13-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `dmnh4015ssdq-13.step` / `dmnh4015ssdq-13.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [Diodes Incorporated datasheet](https://www.diodes.com/assets/Datasheets/DMNH4015SSDQ-13.pdf) (6 pp, sha256 `26df6079dd94f224`, retrieved 2026-11-13, tier: manufacturer)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** land: KiCad official libraries (CC-BY-SA 4.0); 3D: generated from the datasheet's package dimensions (provenance.model_3d_generated).

[Datasheet PDF](docs/dmnh4015ssdq-13-datasheet.pdf)