main
Download ZIP Propose a change
Generated by kicad-footprint-generator · KiCad file format 20260206
Name Last commit message Last updated
docs Publish 0.1.0 · Ray 8d ago
viewers dmn601wk-7: viewers · Ray 8d ago
dmn601wk-7-etched.glb Publish 0.1.0 · Ray 8d ago
dmn601wk-7-etched.step dmn601wk-7: factory component page (tier=lcsc) · Ray 8d ago
dmn601wk-7-hero.glb dmn601wk-7: hero GLB from the etched model (keeps the MPN mark) · Ray 8d ago
dmn601wk-7-hero.overlay.json Publish 0.1.0 · Ray 8d ago
dmn601wk-7.glb Publish 0.1.0 · Ray 8d ago
dmn601wk-7.kicad_mod Publish 0.1.0 · Ray 8d ago
dmn601wk-7.kicad_sym Publish 0.1.0 · Ray 8d ago
dmn601wk-7.lbr Publish 0.1.0 · Ray 8d ago
dmn601wk-7.step Publish 0.1.0 · Ray 8d ago
package.json Publish 0.1.0 · Ray 8d ago
page.json Set visibility: public · Ray 8d ago
README.md Publish 0.1.0 · Ray 8d ago

DMN601WK-7

Diodes Incorporated · MOSFETs · SOT-323

DMN601WK-7 from Diodes Incorporated, in a SOT-323. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 Gate input Gate of the N-channel enhancement MOSFET, with an ESD-protected gate and a gate-source voltage limit of ±20 V (VGSS).
2 Source passive Source terminal of the N-channel MOSFET, rated with the device's 60 V drain-source voltage limit (VDSS).
3 Drain passive Drain terminal of the N-channel MOSFET, rated for 60 V drain-source voltage (VDSS) and 300 mA continuous drain current at TA = +25°C.

Key specifications

Parameter Value
Manufacturer Diodes Incorporated
Package SOT-323
Category Transistors/Thyristors
Pins 3

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Drain-Source Voltage VDSS 60 V 2
Gate-Source Voltage VGSS -20 20 V 2
Drain Current Continuous ID 300 mA Note 5: device mounted on FR-4 PCB 2
Drain Current Pulsed ID 800 mA Note 6: pulse width ≤10µs, duty cycle ≤1% 2
Total Power Dissipation PD 200 mW Note 5: device mounted on FR-4 PCB 2
Thermal Resistance, Junction to Ambient RJA 625 °C/W 2
Operating and Storage Temperature Range TJ, TSTG -65 150 °C 2
Drain-Source Breakdown Voltage BVDSS 60 V VGS = 0, ID = 10µA 2
Zero Gate Voltage Drain Current IDSS 1 µA VDS = 60V, VGS = 0 2
Gate-Source Leakage IGSS -10 10 µA VGS = ±20V, VDS = 0 2
Gate Threshold Voltage VGS(th) 1 1.6 2.5 V VDS = 10V, ID = 1mA 2
Static Drain-Source On-Resistance RDS(ON) 1.4 2 Ω VGS = 10V, ID = 0.5A 2
Static Drain-Source On-Resistance RDS(ON) 1.5 3 Ω VGS = 4.5V, ID = 0.2A 2
Forward Transfer Admittance /Yfs/ 80 ms VDS = 10V, ID = 0.2A 2
Input Capacitance Ciss 50 pF 2
Output Capacitance Coss 25 pF VDS = 25V, VGS = 0, f = 1.0MHz 2
Reverse Transfer Capacitance Crss 5 pF 2

Materials and finish

As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).

Part Material Colour / plating Datasheet says Page
contacts tin • Terminals: Finish ⎯ Matte Tin Annealed over Alloy 42 Leadframe. Solderable per MIL-STD-202, Method 208 1

CAD (KiCad official)

  • Symbol: DMN601WK-7
  • Footprint: Package_TO_SOT_SMD:SOT-323_SC-70
  • 3D model: SOT-323 (KiCad packages3D, STEP)
  • 3D model files: dmn601wk-7-etched.step / dmn601wk-7-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); dmn601wk-7.step / dmn601wk-7.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Diodes Incorporated datasheet (6 pp, sha256 0178bf613160e6a3, retrieved 2026-10-18, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF