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DMC3025LSD-VB

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VBsemi Elec MOSFETs, SO-8. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.

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docs dmc3025lsd-vb: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 1mo ago
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dmc3025lsd-vb-etched.fit.json dmc3025lsd-vb: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 1mo ago
dmc3025lsd-vb-etched.glb dmc3025lsd-vb: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 1mo ago
dmc3025lsd-vb-etched.step dmc3025lsd-vb: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 1mo ago
dmc3025lsd-vb.glb Publish 0.1.0 · Ray 1mo ago
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page.json dmc3025lsd-vb: specified limits as data (metadata.characteristics, 62 rows from the datasheet) · Ray 24d ago
README.md dmc3025lsd-vb: specified limits as data (metadata.characteristics, 62 rows from the datasheet) · Ray 24d ago

DMC3025LSD-VB

VBsemi Elec · MOSFETs · SO-8

DMC3025LSD-VB from VBsemi Elec, in a SO-8. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 S1 passive Source of N-channel MOSFET (Q1). Continuous drain current up to 8 A at TC = 25 °C; body-diode forward voltage ~0.81 V at IS = 5.4 A.
2 G1 input Gate of N-channel MOSFET (Q1). VGS(th) typ. 1.0-2.0 V; VGS absolute maximum ±20 V. Drive with 4.5 V / 8 V / 10 V per RDS(on) spec.
3 S2 passive Source of P-channel MOSFET (Q2). Continuous drain current up to -8 A at TC = 25 °C; body-diode forward voltage ~-0.77 V at IS = -2 A.
4 G2 input Gate of P-channel MOSFET (Q2). VGS(th) typ. -1.0 to -2.0 V; VGS absolute maximum ±20 V. Drive with -4.5 V / -8 V / -10 V per RDS(on) spec.
5 D2 passive Drain of P-channel MOSFET (Q2). VDS absolute maximum -30 V. Ganged with pin 6 internally to lower on-resistance and improve thermal performance.
6 D2 passive Drain of P-channel MOSFET (Q2). VDS absolute maximum -30 V. Ganged with pin 5 internally to lower on-resistance and improve thermal performance.
7 D1 passive Drain of N-channel MOSFET (Q1). VDS absolute maximum 30 V. Ganged with pin 8 internally to lower on-resistance and improve thermal performance.
8 D1 passive Drain of N-channel MOSFET (Q1). VDS absolute maximum 30 V. Ganged with pin 7 internally to lower on-resistance and improve thermal performance.

Key specifications

Parameter Value
Manufacturer VBsemi Elec
Package SO-8
Category Transistors/Thyristors
Pins 8

Ordering variants

Same part, different packaging or reel option.

  • DMC3025LSD-VB

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Drain-Source Voltage (N-channel) VDS 30 V N-channel; TA = 25 °C unless otherwise noted 1
Drain-Source Voltage (P-channel) VDS -30 V P-channel; TA = 25 °C unless otherwise noted 1
Gate-Source Voltage (N-channel) VGS -20 20 V N-channel; TA = 25 °C unless otherwise noted 1
Gate-Source Voltage (P-channel) VGS -20 20 V P-channel; TA = 25 °C unless otherwise noted 1
Continuous Drain Current (N-channel) ID 8 A TC = 25 °C (TJ = 150 °C) 1
Continuous Drain Current (P-channel) ID -8 A TC = 25 °C (TJ = 150 °C) 1
Continuous Drain Current (N-channel) ID 6.8 A TC = 70 °C 1
Continuous Drain Current (P-channel) ID -6.8 A TC = 70 °C 1
Continuous Drain Current (P-channel) ID -6.6 A TA = 25 °C (note b, c) 1
Continuous Drain Current (N-channel) ID 5.4 A TA = 70 °C (note b, c) 1
Continuous Drain Current (P-channel) ID -5.3 A TA = 70 °C (note b, c) 1
Pulsed Drain Current (N-channel) IDM 40 A 10 µs pulse width 1
Pulsed Drain Current (P-channel) IDM -40 A 10 µs pulse width 1
Source-Drain Diode Current (N-channel) IS 2.6 A TC = 25 °C 1
Source-Drain Diode Current (P-channel) IS -2.6 A TC = 25 °C 1
Source-Drain Diode Current (N-channel) IS 1.6 A TA = 25 °C (note b, c) 1
Source-Drain Diode Current (P-channel) IS -1.6 A TA = 25 °C (note b, c) 1
Pulsed Source-Drain Current (N-channel) ISM 40 A 1
Pulsed Source-Drain Current (P-channel) ISM -40 A 1
Single Pulse Avalanche Current (N-channel) IAS 10 A L = 0.1 mH 1
Single Pulse Avalanche Current (P-channel) IAS -20 A L = 0.1 mH 1
Single Pulse Avalanche Energy (N-channel) EAS 5 mJ 1
Single Pulse Avalanche Energy (P-channel) EAS 20 mJ 1
Maximum Power Dissipation (N-channel) PD 3.1 W TC = 25 °C 1
Maximum Power Dissipation (P-channel) PD 3.2 W TC = 25 °C 1
Maximum Power Dissipation (N-channel) PD 2 W TC = 70 °C 1
Maximum Power Dissipation (P-channel) PD 2.1 W TC = 70 °C 1
Maximum Power Dissipation (P-channel) PD 2 W TA = 25 °C (note b, c) 1
Maximum Power Dissipation (N-channel) PD 1.28 W TA = 70 °C (note b, c) 1
Maximum Power Dissipation (P-channel) PD 1.28 W TA = 70 °C (note b, c) 1
Operating Junction and Storage Temperature Range (both channels) TJ, Tstg -55 150 °C 1
Maximum Junction-to-Ambient (N-channel) RthJA 50 62.5 °C/W t ≤ 10 s (notes b, d) 1
Maximum Junction-to-Ambient (P-channel) RthJA 47 62.5 °C/W t ≤ 10 s (notes b, d) 1
Maximum Junction-to-Ambient steady state (N-channel) RthJA 120 °C/W steady state (note d) 1
Maximum Junction-to-Ambient steady state (P-channel) RthJA 110 °C/W steady state (note d) 1
Maximum Junction-to-Foot (Drain) steady state (N-channel) RthJF 30 40 °C/W steady state 1
Maximum Junction-to-Foot (Drain) steady state (P-channel) RthJF 29 38 °C/W steady state 1
Drain-Source Breakdown Voltage (N-channel) VDS 30 V VGS = 0 V, ID = 250 µA 2
Drain-Source Breakdown Voltage (P-channel) VDS -30 V VGS = 0 V, ID = -250 µA 2
Gate Threshold Voltage (N-channel) VGS(th) 1 2 V VDS = VGS, ID = 250 µA 2
Gate Threshold Voltage (P-channel) VGS(th) -1 -2 V VDS = VGS, ID = -250 µA 2
Gate-Body Leakage (N-channel) IGSS -100 100 nA VDS = 0 V, VGS = ±12 V 2
Gate-Body Leakage (P-channel) IGSS -100 100 nA VDS = 0 V, VGS = ±12 V 2
Zero Gate Voltage Drain Current (N-channel) IDSS 1 µA VDS = 30 V, VGS = 0 V 2
Zero Gate Voltage Drain Current (P-channel) IDSS -1 µA VDS = -30 V, VGS = 0 V 2
Zero Gate Voltage Drain Current (N-channel) IDSS 10 µA VDS = 30 V, VGS = 0 V, TJ = 55 °C 2
Zero Gate Voltage Drain Current (P-channel) IDSS -10 µA VDS = -30 V, VGS = 0 V, TJ = 55 °C 2
On-State Drain Current (N-channel) ID(on) 20 A VDS = 5 V, VGS = 10 V 2
On-State Drain Current (P-channel) ID(on) -20 A VDS = -5 V, VGS = -10 V 2
Drain-Source On-State Resistance (P-channel) RDS(on) 0.04 Ω VGS = -10 V, ID = -8 A 2
Drain-Source On-State Resistance (N-channel) RDS(on) 0.02 Ω VGS = 8 V, ID = 6.7 A 2
Drain-Source On-State Resistance (P-channel) RDS(on) 0.044 Ω VGS = -8 V, ID = -6.5 A 2
Drain-Source On-State Resistance (N-channel) RDS(on) 0.024 Ω VGS = 4.5 V, ID = 6.6 A 2
Drain-Source On-State Resistance (P-channel) RDS(on) 0.05 Ω VGS = -4.5 V, ID = -5 A 2
Body Diode Forward Voltage (N-channel) VSD 0.81 1.2 V IS = 5.4 A 3
Body Diode Forward Voltage (P-channel) VSD -0.77 -1.2 V IS = -2 A 3
Turn-On Delay Time (N-channel) td(on) 4 8 ns VDD = 20 V, RL = 3.7 Ω, ID ≅ 5.4 A, VGEN = 10 V, Rg = 1 Ω 3
Turn-On Delay Time (P-channel) td(on) 10 16 ns VDD = -20 V, RL = 2 Ω, ID ≅ -10 A, VGEN = -10 V, Rg = 1 Ω 3
Rise Time (N-channel) tr 10 17 ns VDD = 20 V, RL = 3.7 Ω, ID ≅ 5.4 A, VGEN = 10 V, Rg = 1 Ω 3
Rise Time (P-channel) tr 9 15 ns VDD = -20 V, RL = 2 Ω, ID ≅ -10 A, VGEN = -10 V, Rg = 1 Ω 3
Forward Transconductance (N-channel) gfs 27 S VDS = 15 V, ID = 6.8 A 2
Forward Transconductance (P-channel) gfs 25 S VDS = -15 V, ID = -6.7 A 2

CAD (KiCad official)

  • Symbol: DMC3025LSD-VB
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SO-8 (KiCad packages3D, STEP)
  • 3D model files: dmc3025lsd-vb-etched.step / dmc3025lsd-vb-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); dmc3025lsd-vb.step / dmc3025lsd-vb.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: VBsemi Elec datasheet (None pp, sha256 4873783440de19fc, retrieved 2026-08-17, tier: lcsc)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF