DM9162IEP

{
  "slug": "dm9162iep",
  "version": "0.1.0",
  "type": "component",
  "description": "DAVICOM Ethernet ICs, LQFP-48(7x7). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
  "tags": [
    "component",
    "interface ics",
    "dm9162iep",
    "factory-2.0.0",
    "extractor-text"
  ],
  "dependencies": {},
  "hero": {
    "type": "image",
    "path": "docs/hero.png"
  },
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    "README.md",
    "dm9162iep.kicad_sym",
    "dm9162iep.kicad_mod",
    "dm9162iep.glb",
    "dm9162iep.step",
    "dm9162iep.lbr",
    "docs/hero.png",
    "docs/dm9162iep-datasheet.pdf",
    "viewers/symbol.html",
    "viewers/footprint.html",
    "dm9162iep-hero.glb",
    "dm9162iep-hero.overlay.json",
    "dm9162iep-etched.glb"
  ],
  "component": {
    "mpn": "DM9162IEP",
    "manufacturer": "DAVICOM",
    "package": "LQFP-48(7x7)",
    "pin_count": 48,
    "category": "Interface ICs",
    "subcategory": "Ethernet ICs",
    "datasheet": "https://datasheet.lcsc.com/datasheet/pdf/2797bfe437d7494f694812b9cb0cce61.pdf",
    "parts": {
      "symbol": "dm9162iep.kicad_sym",
      "footprint": "dm9162iep.kicad_mod",
      "model_3d": "dm9162iep-hero.glb",
      "model_3d_plain": "dm9162iep-etched.glb",
      "model_3d_step": "dm9162iep-etched.step",
      "model_3d_step_plain": "dm9162iep.step",
      "lbr": "dm9162iep.lbr"
    },
    "distributor_links": {
      "lcsc": "C692730"
    },
    "distributor_check": {
      "checked_at": "2026-10-27T01:12:41Z",
      "source": "Component Ocean /api/assign-pns",
      "digikey": {
        "pn": null,
        "status": "no match"
      },
      "mouser": {
        "pn": null,
        "status": "no match"
      }
    },
    "pins": [
      {
        "number": "1",
        "name": "AVDD18",
        "type": "power_out",
        "description": "Analog 1.8V regulator power output."
      },
      {
        "number": "2",
        "name": "AVDD18",
        "type": "power_out",
        "description": "Analog 1.8V regulator power output."
      },
      {
        "number": "3",
        "name": "RX+",
        "type": "bidirectional",
        "description": "Differential receive pair, receiving data from the media in TP mode and sending PECL data to the media in fiber mode."
      },
      {
        "number": "4",
        "name": "RX-",
        "type": "bidirectional",
        "description": "Differential receive pair, receiving data from the media in TP mode and sending PECL data to the media in fiber mode."
      },
      {
        "number": "5",
        "name": "AGND",
        "type": "power_in",
        "description": "Analog receive ground."
      },
      {
        "number": "6",
        "name": "AGND",
        "type": "power_in",
        "description": "Analog transmit ground."
      },
      {
        "number": "7",
        "name": "TX+",
        "type": "bidirectional",
        "description": "Differential transmit pair, transmitting data to the media in TP mode and PECL data in fiber mode."
      },
      {
        "number": "8",
        "name": "TX-",
        "type": "bidirectional",
        "description": "Differential transmit pair, transmitting data to the media in TP mode and PECL data in fiber mode."
      },
      {
        "number": "9",
        "name": "AVDD18",
        "type": "power_out",
        "description": "Analog 1.8V regulator power output."
      },
      {
        "number": "10",
        "name": "PWRDWN",
        "type": "input",
        "description": "Asserted high forces power-down mode, and the device leaves power-down only after a hardware or software reset with PWRDWN low."
      },
      {
        "number": "11",
        "name": "LED0/OP0",
        "type": "output",
        "description": "LED driver output 0, which also latches OP0 at power-up/reset to set the forced or advertised operating mode per Table A."
      },
      {
        "number": "12",
        "name": "LED1/OP1",
        "type": "output",
        "description": "LED driver output 1, which also latches OP1 at power-up/reset to set the forced or advertised operating mode per Table A."
      },
      {
        "number": "13",
        "name": "LED2/OP2",
        "type": "output",
        "description": "LED driver output 2, which also latches OP2 at power-up/reset to set the forced or advertised operating mode per Table A."
      },
      {
        "number": "14",
        "name": "CABLESTS/LINKSTS",
        "type": "output",
        "description": "Cable status when latched low at reset (1 = with cable connection) or link status when latched high (0 = with link)."
      },
      {
        "number": "15",
        "name": "DGND",
        "type": "power_in",
        "description": "Digital ground, also the QFN package ground."
      },
      {
        "number": "16",
        "name": "TXER/TXD[4]",
        "type": "input",
        "description": "Transmit error, asserted high with TXEN to substitute HALT in 100Mbps mode, and becomes the fifth TXD data bit in bypass mode."
      },
      {
        "number": "17",
        "name": "TXD[3]",
        "type": "input",
        "description": "Transmit data nibble bit 3, synchronous to TXCLK in 10/100Mbps nibble mode."
      },
      {
        "number": "18",
        "name": "TXD[2]",
        "type": "input",
        "description": "Transmit data nibble bit 2, synchronous to TXCLK in 10/100Mbps nibble mode."
      },
      {
        "number": "19",
        "name": "TXD[1]",
        "type": "input",
        "description": "Transmit data nibble bit 1, synchronous to TXCLK in 10/100Mbps nibble mode."
      },
      {
        "number": "20",
        "name": "TXD[0]",
        "type": "input",
        "description": "Transmit data nibble bit 0, used as the serial data input in 10Mbps GPSI (7-Wired) mode."
      },
      {
        "number": "21",
        "name": "TXEN",
        "type": "input",
        "description": "Transmit enable, active high to indicate valid nibble data on TXD[0:3]."
      },
      {
        "number": "22",
        "name": "TXCLK/50MCLK",
        "type": "output",
        "description": "Transmit clock providing the timing reference for TXEN, TXD and TXER, at 25MHz in 100Mbps, 2.5MHz in 10Mbps nibble mode, or 50MHz clock output in Reduced MII mode."
      },
      {
        "number": "23",
        "name": "DVDD33",
        "type": "power_in",
        "description": "Digital power."
      },
      {
        "number": "24",
        "name": "MDC",
        "type": "input",
        "description": "Management data clock, provided by the management entity at up to 12.5MHz."
      },
      {
        "number": "25",
        "name": "MDIO",
        "type": "bidirectional",
        "description": "Bi-directional management data, which may be driven by the station management entity or the PHY."
      },
      {
        "number": "26",
        "name": "RXD[3]/PHYAD[3]",
        "type": "output",
        "description": "Receive data nibble bit 3 synchronous to RXCLK, also PHY address bit 3 latched at power-up reset."
      },
      {
        "number": "27",
        "name": "RXD[2]/PHYAD[2]",
        "type": "output",
        "description": "Receive data nibble bit 2 synchronous to RXCLK, also PHY address bit 2 latched at power-up reset."
      },
      {
        "number": "28",
        "name": "RXD[1]/PHYAD[1]",
        "type": "output",
        "description": "Receive data nibble bit 1 synchronous to RXCLK, also PHY address bit 1 latched at power-up reset."
      },
      {
        "number": "29",
        "name": "RXD[0]/PHYAD[0]",
        "type": "output",
        "description": "Receive data nibble bit 0 synchronous to RXCLK, used as serial data output in 10Mbps GPSI mode, also PHY address bit 0 latched at power-up reset."
      },
      {
        "number": "30",
        "name": "DVDD33",
        "type": "power_in",
        "description": "Digital power."
      },
      {
        "number": "31",
        "name": "LEDMODE",
        "type": "input",
        "description": "LED mode select, where 0 selects Dual-LED and 1 selects Normal LED."
      },
      {
        "number": "32",
        "name": "MDINTR#",
        "type": "bidirectional",
        "description": "Status interrupt output asserted on link, speed or duplex change per interrupt register 21, with the output low when pulled up."
      },
      {
        "number": "33",
        "name": "DGND",
        "type": "power_in",
        "description": "Digital ground."
      },
      {
        "number": "34",
        "name": "RXCLK/10BTSER",
        "type": "output",
        "description": "Receive clock providing the timing reference for RXDV, RXD and RXER, at 25MHz in 100Mbps MII mode, and 10BTSER selects GPSI mode when latched low."
      },
      {
        "number": "35",
        "name": "CRS/PHYAD[4]",
        "type": "output",
        "description": "Carrier sense, asserted high for carrier from receive or transmit activity in half-duplex mode, and also PHY address bit 4 latched at power-up reset."
      },
      {
        "number": "36",
        "name": "COL/RMII",
        "type": "output",
        "description": "Collision detection, asserted high on collision in half-duplex mode, and selects Reduced MII when latched high at reset."
      },
      {
        "number": "37",
        "name": "RXDV/TESTMODE",
        "type": "output",
        "description": "Receive data valid, asserted high when valid data is on RXD[0:3], and enables test mode when latched high at reset."
      },
      {
        "number": "38",
        "name": "RXER/RXD[4]/RPTR",
        "type": "output",
        "description": "Receive error asserted high for an invalid symbol, becomes RXD[4] in bypass mode, and selects Repeater mode when latched high at reset."
      },
      {
        "number": "39",
        "name": "DISMDIX",
        "type": "input",
        "description": "HP Auto-MDIX control, where 0 enables auto mode and 1 disables it."
      },
      {
        "number": "40",
        "name": "RESET#",
        "type": "input",
        "description": "Active low input that initializes the DM9162."
      },
      {
        "number": "41",
        "name": "VDD33",
        "type": "power_in",
        "description": "Digital power for the crystal circuit."
      },
      {
        "number": "42",
        "name": "XT2",
        "type": "input",
        "description": "Reference clock input, connected across XT1 and XT2 for a 25MHz crystal, or used alone for a 25MHz or 50MHz oscillator depending on mode."
      },
      {
        "number": "43",
        "name": "XT1",
        "type": "input",
        "description": "Reference clock input, connected across XT1 and XT2 for a 25MHz crystal, or used alone for a 25MHz or 50MHz oscillator depending on mode."
      },
      {
        "number": "44",
        "name": "DGND",
        "type": "power_in",
        "description": "Digital ground."
      },
      {
        "number": "45",
        "name": "SD",
        "type": "input",
        "description": "Signal detect input for fiber operation."
      },
      {
        "number": "46",
        "name": "AGND",
        "type": "power_in",
        "description": "Analog substrate ground."
      },
      {
        "number": "47",
        "name": "BGRESG",
        "type": "power_in",
        "description": "Band gap ground."
      },
      {
        "number": "48",
        "name": "BGRES",
        "type": "output",
        "description": "Band gap voltage reference resistor, which requires a 6.8K ohm +/- 1% resistor."
      }
    ],
    "provenance": {
      "extractor": "extract_pins 0.3",
      "factory_chain": {
        "factory": "2.0.0",
        "extractor": "extract_pins 0.3",
        "primary_model": "claude-haiku-5-5",
        "primary_mode": "text",
        "consensus_model": "claude-sonnet-5-5",
        "consensus": "agreed",
        "guards": "pin_guards 0.1: passed",
        "guard_notes": [
          "extractor flagged: The 48-pin LQFP pin map on page 6 is garbled in the text, so pin numbers and names were taken from t",
          "1/48 pins cited to the wrong page (name found elsewhere): ['32:MDINTR#@p9']"
        ],
        "pages_sent": 13,
        "cost_usd": 0.0369,
        "at": "2026-10-27T01:11:56"
      },
      "datasheet": {
        "url": "https://datasheet.lcsc.com/datasheet/pdf/2797bfe437d7494f694812b9cb0cce61.pdf",
        "pages": 49,
        "sha256": "d359c4fe603c3504",
        "source_tier": "lcsc"
      },
      "cad": "KiCad official (CC-BY-SA 4.0)",
      "pins": {
        "total": 48,
        "described": 48,
        "cites_pages": true,
        "refuses_to_fabricate": true
      }
    },
    "viewers": {
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      "footprint": "viewers/footprint.html"
    },
    "models_3d": [
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        "file": "dm9162iep.step",
        "role": "plain",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
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          9.0,
          1.5
        ],
        "zmin_mm": -0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "9dea352d93177c2904afd7d7b68ea8855ce1ab691f69f8b3e13655600514b6bf",
        "checked": "2026-10-27",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      },
      {
        "file": "dm9162iep-etched.step",
        "role": "eda",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
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        "zmin_mm": -0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "86b22104ab827192e5ff63c110fe4da872fec76caeb2612846d9f5161025444c",
        "checked": "2026-10-27",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      }
    ]
  }
}