DIX4192IPFBR

{
  "slug": "dix4192ipfbr",
  "version": "0.1.0",
  "type": "component",
  "description": "Texas Instruments Audio Interface ICs, TQFP-48(7x7). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
  "tags": [
    "component",
    "interface",
    "dix4192ipfbr",
    "factory-2.0.0",
    "extractor-text"
  ],
  "dependencies": {},
  "hero": {
    "type": "image",
    "path": "docs/hero.png"
  },
  "files": [
    "page.json",
    "README.md",
    "dix4192ipfbr.kicad_sym",
    "dix4192ipfbr.kicad_mod",
    "dix4192ipfbr.glb",
    "dix4192ipfbr.step",
    "dix4192ipfbr.lbr",
    "docs/hero.png",
    "docs/dix4192ipfbr-datasheet.pdf",
    "viewers/symbol.html",
    "viewers/footprint.html",
    "dix4192ipfbr-hero.glb",
    "dix4192ipfbr-hero.overlay.json",
    "dix4192ipfbr-etched.glb"
  ],
  "component": {
    "mpn": "DIX4192IPFBR",
    "manufacturer": "Texas Instruments",
    "package": "TQFP-48(7x7)",
    "pin_count": 48,
    "category": "Interface",
    "subcategory": "Audio Interface ICs",
    "datasheet": "https://www.ti.com/lit/ds/symlink/dix4192.pdf",
    "parts": {
      "symbol": "dix4192ipfbr.kicad_sym",
      "footprint": "dix4192ipfbr.kicad_mod",
      "model_3d": "dix4192ipfbr-hero.glb",
      "model_3d_plain": "dix4192ipfbr-etched.glb",
      "model_3d_step": "dix4192ipfbr-etched.step",
      "model_3d_step_plain": "dix4192ipfbr.step",
      "lbr": "dix4192ipfbr.lbr"
    },
    "distributor_links": {
      "lcsc": "C2651272",
      "digikey": "296-20643-2-ND",
      "mouser": "595-DIX4192IPFBR"
    },
    "distributor_check": {
      "checked_at": "2026-11-10T07:21:45Z",
      "source": "Component Ocean /api/assign-pns",
      "digikey": {
        "pn": "296-20643-2-ND",
        "status": "found",
        "lifecycle": "Active"
      },
      "mouser": {
        "pn": "595-DIX4192IPFBR",
        "status": "found"
      }
    },
    "pins": [
      {
        "number": "1",
        "name": "RX1+",
        "type": "input",
        "description": "Line receiver 1 noninverting input; differential input sensitivity is 150 mV to 200 mV across the RX1+/RX1- pair."
      },
      {
        "number": "2",
        "name": "RX1-",
        "type": "input",
        "description": "Line receiver 1 inverting input; differential input sensitivity is 150 mV to 200 mV across the RX1+/RX1- pair."
      },
      {
        "number": "3",
        "name": "RX2+",
        "type": "input",
        "description": "Line receiver 2 noninverting input; differential input sensitivity is 150 mV to 200 mV across the RX2+/RX2- pair."
      },
      {
        "number": "4",
        "name": "RX2-",
        "type": "input",
        "description": "Line receiver 2 inverting input; differential input sensitivity is 150 mV to 200 mV across the RX2+/RX2- pair."
      },
      {
        "number": "5",
        "name": "RX3+",
        "type": "input",
        "description": "Line receiver 3 noninverting input; differential input sensitivity is 150 mV to 200 mV across the RX3+/RX3- pair."
      },
      {
        "number": "6",
        "name": "RX3-",
        "type": "input",
        "description": "Line receiver 3 inverting input; differential input sensitivity is 150 mV to 200 mV across the RX3+/RX3- pair."
      },
      {
        "number": "7",
        "name": "RX4+",
        "type": "input",
        "description": "Line receiver 4 noninverting input; differential input sensitivity is 150 mV to 200 mV across the RX4+/RX4- pair."
      },
      {
        "number": "8",
        "name": "RX4-",
        "type": "input",
        "description": "Line receiver 4 inverting input; differential input sensitivity is 150 mV to 200 mV across the RX4+/RX4- pair."
      },
      {
        "number": "9",
        "name": "VCC",
        "type": "power_in",
        "description": "DIR comparator and PLL power supply, 3.3 V nominal (3.0 V to 3.6 V recommended operating range)."
      },
      {
        "number": "10",
        "name": "AGND",
        "type": "power_in",
        "description": "DIR comparator and PLL power-supply ground; BGND (pin 44) must be connected to this pin by PCB trace."
      },
      {
        "number": "11",
        "name": "LOCK",
        "type": "output",
        "description": "DIR PLL lock flag, active low; asserted only when both the AES3 decoder and PLL2 indicate lock."
      },
      {
        "number": "12",
        "name": "RXCKO",
        "type": "tri_state",
        "description": "DIR recovered master clock output, tri-state; disabled and forced to high-impedance by default (RXCKOE = 0)."
      },
      {
        "number": "13",
        "name": "RXCKI",
        "type": "input",
        "description": "DIR reference clock input, 3.5 MHz to 27.7 MHz (duty cycle 45% to 55%)."
      },
      {
        "number": "14",
        "name": "NC",
        "type": "unconnected",
        "description": "No internal signal connection; internally bonded to ESD pad."
      },
      {
        "number": "15",
        "name": "NC",
        "type": "unconnected",
        "description": "No internal signal connection; internally bonded to ESD pad."
      },
      {
        "number": "16",
        "name": "DGND1",
        "type": "power_in",
        "description": "Digital core ground."
      },
      {
        "number": "17",
        "name": "VDD18",
        "type": "power_in",
        "description": "Digital core supply, 1.8 V nominal (1.65 V to 1.95 V)."
      },
      {
        "number": "18",
        "name": "CPM",
        "type": "input",
        "description": "Control port mode select: 0 selects SPI mode, 1 selects I2C mode."
      },
      {
        "number": "19",
        "name": "CS/A0",
        "type": "input",
        "description": "Active-low chip select for SPI mode; programmable slave address bit A0 for I2C mode."
      },
      {
        "number": "20",
        "name": "CCLK/SCL",
        "type": "input",
        "description": "Serial data clock for SPI mode (CCLK) or I2C bus clock (SCL)."
      },
      {
        "number": "21",
        "name": "CDIN/A1",
        "type": "input",
        "description": "SPI serial data input in SPI mode, or programmable slave address bit A1 in I2C mode."
      },
      {
        "number": "22",
        "name": "CDOUT/SDA",
        "type": "bidirectional",
        "description": "SPI serial data output (tri-state, high-impedance when CS is high) in SPI mode, or I2C serial data I/O (SDA) in I2C mode."
      },
      {
        "number": "23",
        "name": "INT",
        "type": "output",
        "description": "Interrupt flag, open-drain and active low; requires a pullup to VIO (10 kΩ suggested)."
      },
      {
        "number": "24",
        "name": "RST",
        "type": "input",
        "description": "Asynchronous active-low reset; the low pulse must be at least 500 ns and no read/write may occur for 500 µs after the rising edge."
      },
      {
        "number": "25",
        "name": "MCLK",
        "type": "input",
        "description": "Master clock input, 1 MHz to 27.7 MHz (duty cycle 45% to 55%)."
      },
      {
        "number": "26",
        "name": "GPO1",
        "type": "output",
        "description": "General-purpose output 1, forced low by default and configurable via control register 0x1B to static or internal logic signals."
      },
      {
        "number": "27",
        "name": "GPO2",
        "type": "output",
        "description": "General-purpose output 2, forced low by default and configurable via control register 0x1C to static or internal logic signals."
      },
      {
        "number": "28",
        "name": "GPO3",
        "type": "output",
        "description": "General-purpose output 3, forced low by default and configurable via control register 0x1D to static or internal logic signals."
      },
      {
        "number": "29",
        "name": "GPO4",
        "type": "output",
        "description": "General-purpose output 4, forced low by default and configurable via control register 0x1E to static or internal logic signals."
      },
      {
        "number": "30",
        "name": "DGND2",
        "type": "power_in",
        "description": "DIR line receiver bias and DIT line driver digital ground."
      },
      {
        "number": "31",
        "name": "TX-",
        "type": "output",
        "description": "DIT line driver inverting output; forced low when TXOFF is set."
      },
      {
        "number": "32",
        "name": "TX+",
        "type": "output",
        "description": "DIT line driver noninverting output; forced low when TXOFF is set."
      },
      {
        "number": "33",
        "name": "VDD33",
        "type": "power_in",
        "description": "DIR line receiver bias and DIT line driver supply, 3.3 V nominal (3.0 V to 3.6 V)."
      },
      {
        "number": "34",
        "name": "AESOUT",
        "type": "output",
        "description": "DIT buffered AES3-encoded CMOS logic-level output; forced low when AESOFF is set."
      },
      {
        "number": "35",
        "name": "BLS",
        "type": "bidirectional",
        "description": "DIT block start clock; configured as input by default and may be set as output via the BLSM bit."
      },
      {
        "number": "36",
        "name": "SYNC",
        "type": "output",
        "description": "DIT internal sync clock output; its rising edge aligns with the start of each AES3 frame."
      },
      {
        "number": "37",
        "name": "BCKA",
        "type": "bidirectional",
        "description": "Audio serial Port A bit clock; input in slave mode, output in master mode (64 × LRCKA)."
      },
      {
        "number": "38",
        "name": "LRCKA",
        "type": "bidirectional",
        "description": "Audio serial Port A left/right word clock; input in slave mode, output in master mode, operating at fS up to 216 kHz."
      },
      {
        "number": "39",
        "name": "SDINA",
        "type": "input",
        "description": "Audio serial Port A data input, sampled on the rising edge of BCKA."
      },
      {
        "number": "40",
        "name": "SDOUTA",
        "type": "output",
        "description": "Audio serial Port A data output, clocked out on the falling edge of BCKA; forced low when AMUTE is set."
      },
      {
        "number": "41",
        "name": "NC",
        "type": "unconnected",
        "description": "No internal signal connection; internally bonded to ESD pad."
      },
      {
        "number": "42",
        "name": "VIO",
        "type": "power_in",
        "description": "Logic I/O supply, 1.65 V to 3.6 V."
      },
      {
        "number": "43",
        "name": "DGND3",
        "type": "power_in",
        "description": "Logic I/O ground."
      },
      {
        "number": "44",
        "name": "BGND",
        "type": "power_in",
        "description": "Substrate ground; connect to AGND (pin 10)."
      },
      {
        "number": "45",
        "name": "SDOUTB",
        "type": "output",
        "description": "Audio serial Port B data output, clocked out on the falling edge of BCKB; forced low when BMUTE is set."
      },
      {
        "number": "46",
        "name": "SDINB",
        "type": "input",
        "description": "Audio serial Port B data input, sampled on the rising edge of BCKB."
      },
      {
        "number": "47",
        "name": "LRCKB",
        "type": "bidirectional",
        "description": "Audio serial Port B left/right word clock; input in slave mode, output in master mode, operating at fS up to 216 kHz."
      },
      {
        "number": "48",
        "name": "BCKB",
        "type": "bidirectional",
        "description": "Audio serial Port B bit clock; input in slave mode, output in master mode (64 × LRCKB)."
      }
    ],
    "provenance": {
      "extractor": "extract_pins 0.3",
      "factory_chain": {
        "factory": "2.0.0",
        "extractor": "extract_pins 0.3",
        "primary_model": "claude-haiku-5-5",
        "primary_mode": "text",
        "consensus_model": "claude-sonnet-5-5",
        "consensus": "agreed",
        "guards": "pin_guards 0.1: passed",
        "guard_notes": [
          "extractor flagged: Package match: DIX4192IPFBR is the 1000-piece tape-and-reel orderable of the 48-pin PFB (TQFP) packa; Pin numbers 14, 15 and 41 are printed as NC in the datasheet. They are listed as unconnected rather ; Pin-to-name mapping was taken from the Pin Functions table (pages 4-5) and cross-checked against the"
        ],
        "pages_sent": 71,
        "cost_usd": 0.3474,
        "at": "2026-11-10T07:21:35"
      },
      "datasheet": {
        "url": "https://www.ti.com/lit/ds/symlink/dix4192.pdf",
        "pages": 71,
        "sha256": "bd404824f133bc57",
        "source_tier": "mfr"
      },
      "cad": "KiCad official (CC-BY-SA 4.0)",
      "pins": {
        "total": 48,
        "described": 48,
        "cites_pages": true,
        "refuses_to_fabricate": true
      }
    },
    "viewers": {
      "symbol": "viewers/symbol.html",
      "footprint": "viewers/footprint.html"
    },
    "models_3d": [
      {
        "file": "dix4192ipfbr.step",
        "role": "plain",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          9.0,
          9.0,
          1.1
        ],
        "zmin_mm": -0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "14ca7676e4932e92f0eca0c6d56ce3018cd28a2531204a70ab7bbacb3eeb3cf5",
        "checked": "2026-11-10",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      },
      {
        "file": "dix4192ipfbr-etched.step",
        "role": "eda",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          9.0,
          9.0,
          1.1
        ],
        "zmin_mm": -0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "a4b90048fa14c8d725b15a5fae8bb876954590b3c929fd38b6faa14c8dfddf38",
        "checked": "2026-11-10",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      }
    ],
    "package_dims": {
      "package_code": "PFB0048A",
      "source_page": 68,
      "D": {
        "nom_mm": 7.0,
        "range_mm": [
          6.8,
          7.2
        ]
      },
      "E1": {
        "nom_mm": 7.0,
        "range_mm": [
          6.8,
          7.2
        ]
      },
      "E": {
        "nom_mm": 9.0,
        "range_mm": [
          8.8,
          9.2
        ]
      },
      "e": {
        "nom_mm": 0.5,
        "range_mm": [
          null,
          null
        ]
      },
      "A": {
        "nom_mm": 1.2,
        "range_mm": [
          null,
          1.2
        ]
      },
      "source": "datasheet package drawing, every number found on its page (extract_pins --task dims)",
      "model_check": {
        "file": "dix4192ipfbr.step",
        "verdict": "PASS",
        "reasons": [
          "height and body within the datasheet's package drawing"
        ],
        "by": "factory/package_fit.py"
      }
    }
  }
}