component
DGD2103MS8-13
Public Made by Adomby adom
Diodes Incorporated Gate Drive ICs, SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
main
DGD2103MS8-13
Diodes Incorporated · Gate Drive ICs · SOIC-8
DGD2103MS8-13 from Diodes Incorporated, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VCC | power_in | Low-side and logic supply, recommended operating range 10 V to 20 V, with undervoltage lockout (positive-going threshold 8.0 V to 9.8 V, typical 8.9 V). |
| 2 | HIN | input | Logic input for the high-side gate driver, in phase with HO; logic inputs are TTL/CMOS compatible down to 3.3 V, Schmitt-triggered, with recommended range 0 V to 6 V. |
| 3 | LIN* | input | Logic input for the low-side gate driver, out of phase with LO; logic inputs are TTL/CMOS compatible down to 3.3 V, Schmitt-triggered, with recommended range 0 V to 6 V. |
| 4 | COM | power_in | Low-side and logic return (ground reference) for the device. |
| 5 | LO | output | Low-side gate drive output, rated for 290 mA source and 600 mA sink output current capability, with outputs tolerant to negative transients. |
| 6 | VS | power_in | High-side floating supply return; logic operation is specified for VS from -5 V to +600 V and dVS/dt is limited to 50 V/ns. |
| 7 | HO | output | High-side gate drive output, referenced to VS, with output voltage limited to VS - 0.3 V to VB + 0.3 V. |
| 8 | VB | power_in | High-side floating supply, recommended at VS + 10 V to VS + 20 V, with absolute maximum rating of -0.3 V to +624 V. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Diodes Incorporated |
| Package | SOIC-8 |
| Category | Power Management ICs |
| Pins | 8 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| High-Side Floating Supply Voltage | VB | -0.3 | 624 | V | 3 | ||
| Offset Supply Voltage Transient | dVS / dt | 50 | V/ns | 3 | |||
| Low-Side Fixed Supply Voltage | VCC | -0.3 | 24 | V | 3 | ||
| Low-Side Output Voltage | VLO | -0.3 | V | 3 | |||
| Logic Input Voltage (HIN and LIN*) | VIN | -0.3 | V | 3 | |||
| Power Dissipation Linear Derating Factor | PD | 0.625 | W | @TA = +25°C; Note 5 | 3 | ||
| Thermal Resistance, Junction to Ambient | RθJA | 200 | °C/W | Note 5: standard JEDEC 2-layer FR-4 board | 3 | ||
| Operating Temperature | TJ | 150 | °C | 3 | |||
| Lead Temperature (Soldering, 10s) | TL | 300 | °C | Soldering, 10s | 3 | ||
| Storage Temperature Range | TSTG | -55 | 150 | °C | 3 | ||
| High Side Floating Supply Offset Voltage | VS | 600 | V | Note 6: logic operation for VS of -5V to +600V | 3 | ||
| Low Side Supply Voltage | VCC | 10 | 20 | V | 3 | ||
| Low Side Output Voltage | VLO | 0 | V | 3 | |||
| Logic Input Voltage (HIN & LIN*) | VIN | 0 | 6 | V | 3 | ||
| Ambient Temperature | TA | -40 | 125 | °C | 3 | ||
| Logic “1” (HIN) & Logic “0” (LIN*) Input Voltage | VIH | 2.5 | V | VCC = 10V to 20V | 4 | ||
| Logic “0” (HIN) & Logic “1” (LIN*) Input Voltage | VIL | 0.8 | V | VCC = 10V to 20V | 4 | ||
| High Level Output Voltage, VBIAS - VO | VOH | 0.05 | 0.2 | V | IO = 2mA | 4 | |
| Low Level Output Voltage, VO | VOL | 0.02 | 0.1 | V | IO = 2mA | 4 | |
| Offset Supply Leakage Current | ILK | 50 | µA | VB = VS = 600V | 4 | ||
| Quiescent VBS Supply Current | IBSQ | 60 | 100 | µA | VIN = 0V or 5V | 4 | |
| Quiescent VCC Supply Current | ICCQ | 350 | 500 | µA | VIN = 0V or 5V | 4 | |
| Logic “1” Input Bias Current | IIN+ | 3 | 10 | µA | HIN = 5V, LIN* = 0V | 4 | |
| Logic “0” Input Bias Current | IIN- | 5 | µA | HIN = 0V, LIN* = 5V | 4 | ||
| VCC Supply Undervoltage Positive Going Threshold | VCCUV+ | 8 | 8.9 | 9.8 | V | 4 | |
| VCC Supply Undervoltage Negative Going Threshold | VCCUV- | 7.4 | 8.2 | 9 | V | 4 | |
| VBS Supply Undervoltage Positive Going Threshold | VBSUV+ | 4.5 | 5.5 | 6.5 | V | 4 | |
| VBS Supply Undervoltage Negative Going Threshold | VBSUV- | 4.2 | 5.2 | 6.2 | V | 4 | |
| Output High Short Circuit Pulsed Current | IO+ | 130 | 290 | mA | VO = 0V, PW ≤ 10µs | 4 | |
| Output Low Short Circuit Pulsed Current | IO- | 270 | 600 | mA | VO = 15V, PW ≤ 10µs | 4 | |
| Turn-On Propagation Delay | tON | 680 | 820 | ns | VS = 0V | 4 | |
| Turn-Off Propagation Delay | tOFF | 150 | 220 | ns | VS = 600V | 4 | |
| Delay Matching, HO & LO Turn-On / Turn-Off | tDM | 60 | ns | 4 | |||
| Turn-On Rise Time | tR | 70 | 170 | ns | VS = 0V | 4 | |
| Turn-Off Fall Time | tF | 35 | 90 | ns | VS = 0V | 4 | |
| Deadtime: tDT LO-HO & tDT HO-LO | tDT | 300 | 420 | 650 | ns | 4 |
Materials and finish
As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).
| Part | Material | Colour / plating | Datasheet says | Page |
|---|---|---|---|---|
| contacts | tin | Terminals: Finish, Matte Tin Plated Leads. Solderable per MIL-STD-202, Method 208 | 1 |
CAD (KiCad official)
- Symbol:
DGD2103MS8-13 - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SOIC-8 (KiCad packages3D, STEP)
- 3D model files:
dgd2103ms8-13-etched.step/dgd2103ms8-13-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);dgd2103ms8-13.step/dgd2103ms8-13.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Diodes Incorporated datasheet (11 pp, sha256
00223e43c1dbd115, retrieved 2026-10-28, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# DGD2103MS8-13
**Diodes Incorporated** · Gate Drive ICs · SOIC-8
DGD2103MS8-13 from Diodes Incorporated, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VCC | power_in | Low-side and logic supply, recommended operating range 10 V to 20 V, with undervoltage lockout (positive-going threshold 8.0 V to 9.8 V, typical 8.9 V). |
| 2 | HIN | input | Logic input for the high-side gate driver, in phase with HO; logic inputs are TTL/CMOS compatible down to 3.3 V, Schmitt-triggered, with recommended range 0 V to 6 V. |
| 3 | LIN* | input | Logic input for the low-side gate driver, out of phase with LO; logic inputs are TTL/CMOS compatible down to 3.3 V, Schmitt-triggered, with recommended range 0 V to 6 V. |
| 4 | COM | power_in | Low-side and logic return (ground reference) for the device. |
| 5 | LO | output | Low-side gate drive output, rated for 290 mA source and 600 mA sink output current capability, with outputs tolerant to negative transients. |
| 6 | VS | power_in | High-side floating supply return; logic operation is specified for VS from -5 V to +600 V and dVS/dt is limited to 50 V/ns. |
| 7 | HO | output | High-side gate drive output, referenced to VS, with output voltage limited to VS - 0.3 V to VB + 0.3 V. |
| 8 | VB | power_in | High-side floating supply, recommended at VS + 10 V to VS + 20 V, with absolute maximum rating of -0.3 V to +624 V. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Diodes Incorporated |
| Package | SOIC-8 |
| Category | Power Management ICs |
| Pins | 8 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| High-Side Floating Supply Voltage | VB | -0.3 | | 624 | V | | 3 |
| Offset Supply Voltage Transient | dVS / dt | | | 50 | V/ns | | 3 |
| Low-Side Fixed Supply Voltage | VCC | -0.3 | | 24 | V | | 3 |
| Low-Side Output Voltage | VLO | -0.3 | | | V | | 3 |
| Logic Input Voltage (HIN and LIN*) | VIN | -0.3 | | | V | | 3 |
| Power Dissipation Linear Derating Factor | PD | | | 0.625 | W | @TA = +25°C; Note 5 | 3 |
| Thermal Resistance, Junction to Ambient | RθJA | | | 200 | °C/W | Note 5: standard JEDEC 2-layer FR-4 board | 3 |
| Operating Temperature | TJ | | | 150 | °C | | 3 |
| Lead Temperature (Soldering, 10s) | TL | | | 300 | °C | Soldering, 10s | 3 |
| Storage Temperature Range | TSTG | -55 | | 150 | °C | | 3 |
| High Side Floating Supply Offset Voltage | VS | | | 600 | V | Note 6: logic operation for VS of -5V to +600V | 3 |
| Low Side Supply Voltage | VCC | 10 | | 20 | V | | 3 |
| Low Side Output Voltage | VLO | 0 | | | V | | 3 |
| Logic Input Voltage (HIN & LIN*) | VIN | 0 | | 6 | V | | 3 |
| Ambient Temperature | TA | -40 | | 125 | °C | | 3 |
| Logic “1” (HIN) & Logic “0” (LIN*) Input Voltage | VIH | 2.5 | | | V | VCC = 10V to 20V | 4 |
| Logic “0” (HIN) & Logic “1” (LIN*) Input Voltage | VIL | | | 0.8 | V | VCC = 10V to 20V | 4 |
| High Level Output Voltage, VBIAS - VO | VOH | | 0.05 | 0.2 | V | IO = 2mA | 4 |
| Low Level Output Voltage, VO | VOL | | 0.02 | 0.1 | V | IO = 2mA | 4 |
| Offset Supply Leakage Current | ILK | | | 50 | µA | VB = VS = 600V | 4 |
| Quiescent VBS Supply Current | IBSQ | | 60 | 100 | µA | VIN = 0V or 5V | 4 |
| Quiescent VCC Supply Current | ICCQ | | 350 | 500 | µA | VIN = 0V or 5V | 4 |
| Logic “1” Input Bias Current | IIN+ | | 3 | 10 | µA | HIN = 5V, LIN* = 0V | 4 |
| Logic “0” Input Bias Current | IIN- | | | 5 | µA | HIN = 0V, LIN* = 5V | 4 |
| VCC Supply Undervoltage Positive Going Threshold | VCCUV+ | 8 | 8.9 | 9.8 | V | | 4 |
| VCC Supply Undervoltage Negative Going Threshold | VCCUV- | 7.4 | 8.2 | 9 | V | | 4 |
| VBS Supply Undervoltage Positive Going Threshold | VBSUV+ | 4.5 | 5.5 | 6.5 | V | | 4 |
| VBS Supply Undervoltage Negative Going Threshold | VBSUV- | 4.2 | 5.2 | 6.2 | V | | 4 |
| Output High Short Circuit Pulsed Current | IO+ | 130 | 290 | | mA | VO = 0V, PW ≤ 10µs | 4 |
| Output Low Short Circuit Pulsed Current | IO- | 270 | 600 | | mA | VO = 15V, PW ≤ 10µs | 4 |
| Turn-On Propagation Delay | tON | | 680 | 820 | ns | VS = 0V | 4 |
| Turn-Off Propagation Delay | tOFF | | 150 | 220 | ns | VS = 600V | 4 |
| Delay Matching, HO & LO Turn-On / Turn-Off | tDM | | | 60 | ns | | 4 |
| Turn-On Rise Time | tR | | 70 | 170 | ns | VS = 0V | 4 |
| Turn-Off Fall Time | tF | | 35 | 90 | ns | VS = 0V | 4 |
| Deadtime: tDT LO-HO & tDT HO-LO | tDT | 300 | 420 | 650 | ns | | 4 |
## Materials and finish
As the datasheet states them (page.json `metadata.appearance`; the 3D model's colours follow it).
| Part | Material | Colour / plating | Datasheet says | Page |
|---|---|---|---|---|
| contacts | | tin | Terminals: Finish, Matte Tin Plated Leads. Solderable per MIL-STD-202, Method 208 | 1 |
## CAD (KiCad official)
- Symbol: `DGD2103MS8-13`
- Footprint: `Package_SO:SOIC-8_3.9x4.9mm_P1.27mm`
- 3D model: SOIC-8 (KiCad packages3D, STEP)
- 3D model files: `dgd2103ms8-13-etched.step` / `dgd2103ms8-13-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `dgd2103ms8-13.step` / `dgd2103ms8-13.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Diodes Incorporated datasheet](https://www.diodes.com/assets/Datasheets/DGD2103MS8-13.pdf) (11 pp, sha256 `00223e43c1dbd115`, retrieved 2026-10-28, tier: manufacturer)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/dgd2103ms8-13-datasheet.pdf)