component

DG211BDY-T1-E3

Public Made by Adom

by adom

Vishay Analog Switches, Multiplexers, SOIC-16. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.

componentinterfacedg211bdy-t1-e3
Overview Files Discover Packages Releases Dependencies Issues Breadcrumbs Pull Requests Activity
main
Download ZIP Propose a change
Generated by kicad-footprint-generator · KiCad file format 20260206
Name Last commit message Last updated
docs dg211bdy-t1-e3: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
viewers pin 1: carry the footprint's marker into the .lbr, the viewer and page.json (silk-marker, drawn, top-left) · Ray
dg211bdy-t1-e3-etched.fit.json dg211bdy-t1-e3: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
dg211bdy-t1-e3-etched.glb dg211bdy-t1-e3: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
dg211bdy-t1-e3-etched.step dg211bdy-t1-e3: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
dg211bdy-t1-e3.glb Publish 0.1.0 · Ray
dg211bdy-t1-e3.kicad_mod Publish 0.1.0 · Ray
dg211bdy-t1-e3.kicad_sym Publish 0.1.0 · Ray
dg211bdy-t1-e3.lbr rebuild the library on adom-lbr 2.32.0. The published copy was built by 2.18.0, which imported every KiCad roundrect an… · Ray
dg211bdy-t1-e3.step Publish 0.1.0 · Ray
package.json Publish 0.2.0 · Ray
pads.json pin 1: carry the footprint's marker into the .lbr, the viewer and page.json (silk-marker, drawn, top-left) · Ray
page.json dg211bdy-t1-e3: component.models_3d pose record per STEP (Z-up, seated z=0, pad-centre origin, identity binding) · Ray
README.md dg211bdy-t1-e3: laser-etched CAD + chip hero (factory 2.0.0 backfill) · Ray

DG211BDY-T1-E3

Vishay · Analog Switches, Multiplexers · SOIC-16

DG211BDY-T1-E3 from Vishay, in a SOIC-16. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 IN1 input Digital control input for switch 1. TTL/CMOS compatible; VINH ≥ 2.4 V (logic 1) opens the switch on DG211B, VINL ≤ 0.8 V (logic 0) closes it. Input current ±1 µA max, input capacitance ~5 pF.
2 D1 passive Drain terminal of analog switch 1. Bidirectional analog signal terminal; connects to source S1 when switch is ON. Signal range ±15 V typical (V+ = +15 V, V- = -15 V); RDS(on) ~45 Ω typ.
3 S1 passive Source terminal of analog switch 1. Bidirectional analog signal terminal paired with D1. Continuous current rating 30 mA; signals exceeding V+ or V- are clamped by internal diodes.
4 V- power_in Negative analog supply rail. Typical -15 V for dual-supply operation; supports down to -22 V absolute max. Sets the negative limit of the analog signal range.
5 GND power_in Ground reference for digital logic and single-supply operation. Referenced to V+ up to 25 V max. In single-supply mode V- is tied to GND.
6 S4 passive Source terminal of analog switch 4. Bidirectional analog signal terminal paired with D4.
7 D4 passive Drain terminal of analog switch 4. Bidirectional analog signal terminal; connects to S4 when switch is ON.
8 IN4 input Digital control input for switch 4. TTL/CMOS compatible logic-level input; controls D4-S4 channel per truth table (logic 1 opens on DG211B).
9 IN3 input Digital control input for switch 3. TTL/CMOS compatible; controls D3-S3 channel per truth table.
10 D3 passive Drain terminal of analog switch 3. Bidirectional analog signal terminal paired with S3.
11 S3 passive Source terminal of analog switch 3. Bidirectional analog signal terminal paired with D3.
12 VL power_in Logic supply rail for digital inputs. Typically +5 V; sets the reference level for the TTL/CMOS input thresholds (VINH ≥ 2.4 V, VINL ≤ 0.8 V). Logic supply current IL ~10 µA typical.
13 V+ power_in Positive analog supply rail. Typical +15 V for dual-supply operation; supports up to +22 V absolute max. Sets the positive limit of the analog signal range.
14 S2 passive Source terminal of analog switch 2. Bidirectional analog signal terminal paired with D2.
15 D2 passive Drain terminal of analog switch 2. Bidirectional analog signal terminal paired with S2.
16 IN2 input Digital control input for switch 2. TTL/CMOS compatible; controls D2-S2 channel per truth table.

Key specifications

Parameter Value
Manufacturer Vishay
Package SOIC-16
Category Interface
Pins 16

Ordering variants

Same part, different packaging or reel option.

  • DG211BDY-T1-E3
  • DG211BDY-T1-E3DY-E3
  • DG211BDY-T1-E3DJ
  • DG211BDY-T1-E3DJ-E3
  • DG211BDY-T1-E3DQ
  • DG211BDY-T1-E3DQ-T1
  • DG211BDY-T1-E3DQ-E3
  • DG211BDY-T1-E3DQ-T1-E3

CAD (KiCad official)

  • Symbol: DG211BDY-T1-E3
  • Footprint: Package_SO:SOIC-16_3.9x9.9mm_P1.27mm
  • 3D model: SOIC-16 (KiCad packages3D, STEP)
  • 3D model files: dg211bdy-t1-e3-etched.step / dg211bdy-t1-e3-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); dg211bdy-t1-e3.step / dg211bdy-t1-e3.glb are the bare package body.

3D model downloads

Two STEP files. Same geometry, different body top:

File Size Use it when
dg211bdy-t1-e3.step 217 KB You want the bare part, or you mark your own boards.
dg211bdy-t1-e3-etched.step 2.6 MB You want the part with DG211BDY-T1-E3 already on it.

The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 671 faces against 267 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Vishay datasheet (14 pp, sha256 d32f2a163665a3fd, retrieved 2026-08-17, tier: manufacturer)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF