component
DDTB122TC-7-F
Public Made by Adomby adom
Diodes Incorporated Digital Transistors, SOT-23. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
Generated by kicad-footprint-generator · KiCad file format 20260206
DDTB122TC-7-F
Diodes Incorporated · Digital Transistors · SOT-23
DDTB122TC-7-F from Diodes Incorporated, in a SOT-23. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model). Symbol and footprint from KiCad-official CAD; the 3D model is generated from the datasheet's package dimensions.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | IN | input | Input (base, B) through built-in series resistor R1 of 0.22 kΩ nominal (R2 open on DDTB122TC); the emitter-to-base voltage (2) to (1) is limited to -5 V max (VEBO). |
| 2 | GND(+) | power_in | Ground/positive reference (emitter, E) of the PNP transistor, the reference for the -50 V supply voltage (3) to (2) and for the input voltage. |
| 3 | OUT | output | Output (collector, C) rated for a maximum supply voltage VCC of -50 V (3) to (2) and a maximum output current IC of -500 mA. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Diodes Incorporated |
| Package | SOT-23 |
| Category | Transistors |
| Pins | 3 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Collector-Base Breakdown Voltage | BVCBO | -50 | V | IC = -50μA | 2 | ||
| Collector-Emitter Breakdown Voltage | BVCEO | -40 | V | IC = -1mA | 2 | ||
| Emitter-Base Breakdown Voltage | BVEBO | -5 | V | IE = -50μA | 2 | ||
| Collector Cutoff Current | ICBO | -0.5 | μA | VCB = -50V | 2 | ||
| Emitter Cutoff Current | IEBO | -0.5 | μA | VEB = -4V | 2 | ||
| Collector-Emitter Saturation Voltage | VCE(sat) | -0.3 | V | IC = -50mA, IB = -2.5mA | 2 | ||
| DC Current Transfer Ratio | hFE | 100 | 250 | 600 | IC = -5mA, VCE = -5V | 2 | |
| Gain-Bandwidth Product | fT | 200 | MHz | VCE = -10V, IE = 5mA, f = 100MHz | 2 | ||
| Supply Voltage, (3) to (2) | VCC | -50 | V | TA = 25°C | 1 | ||
| Input Voltage, (2) to (1) | VEBO (MAX) | -5 | V | TA = 25°C | 1 | ||
| Output Current | IC | -500 | mA | TA = 25°C | 1 | ||
| Power Dissipation | PD | 200 | mW | Mounted on FR4 PC Board, TA = 25°C | 1 | ||
| Thermal Resistance, Junction to Ambient Air | RθJA | 625 | °C/W | Mounted on FR4 PC Board with recommended pad layout | 1 | ||
| Operating and Storage Temperature Range | TJ, TSTG | -55 | 150 | °C | 1 | ||
| Input Resistor R1 (nominal) | R1 | 0.22 | KΩ | NOM; R2 open | 1 |
Materials and finish
As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).
| Part | Material | Colour / plating | Datasheet says | Page |
|---|---|---|---|---|
| contacts | tin | • Terminals: Solderable per MIL-STD-202, Method 208 • Lead Free Plating (Matte Tin Finish annealed over Alloy | 1 |
CAD (land: KiCad; 3D: generated from the datasheet)
- Symbol:
DDTB122TC-7-F - Footprint:
Package_TO_SOT_SMD:SOT-23 - 3D model: SOT-23, generated on the KiCad land (body 1.3 x 2.9 mm, terminals on the pads, 1.0015 mm tall, datasheet A, midpoint of min and max). KiCad's stock model for this land is taller than the datasheet allows, so the model is generated from the datasheet drawing; the dimensions come from the datasheet drawing where it was read and are defaults otherwise (see provenance.model_3d_generated), not the manufacturer's CAD (STEP)
- 3D model files:
ddtb122tc-7-f-etched.step/ddtb122tc-7-f-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);ddtb122tc-7-f.step/ddtb122tc-7-f.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Diodes Incorporated datasheet (3 pp, sha256
f43085bd72dfc95f, retrieved 2026-11-13, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: land: KiCad official libraries (CC-BY-SA 4.0); 3D: generated from the datasheet's package dimensions (provenance.model_3d_generated).