DAC8554IPWR

{
  "slug": "dac8554ipwr",
  "version": "0.1.0",
  "type": "component",
  "description": "Texas Instruments Digital To Analog Converters (DAC), TSSOP-16. Datasheet-verified pinout, KiCad symbol/footprint/3D.",
  "tags": [
    "component",
    "data acquisition",
    "dac8554ipwr",
    "factory-2.0.0",
    "extractor-text"
  ],
  "dependencies": {},
  "hero": {
    "type": "image",
    "path": "docs/hero.png"
  },
  "files": [
    "page.json",
    "README.md",
    "dac8554ipwr.kicad_sym",
    "dac8554ipwr.kicad_mod",
    "dac8554ipwr.glb",
    "dac8554ipwr.step",
    "dac8554ipwr.lbr",
    "docs/hero.png",
    "docs/dac8554ipwr-datasheet.pdf",
    "viewers/symbol.html",
    "viewers/footprint.html"
  ],
  "component": {
    "mpn": "DAC8554IPWR",
    "manufacturer": "Texas Instruments",
    "package": "TSSOP-16",
    "pin_count": 16,
    "category": "Data Acquisition",
    "subcategory": "Digital To Analog Converters (DAC)",
    "datasheet": "https://www.ti.com/cn/lit/gpn/dac8554",
    "parts": {
      "symbol": "dac8554ipwr.kicad_sym",
      "footprint": "dac8554ipwr.kicad_mod",
      "model_3d": "dac8554ipwr-etched.glb",
      "model_3d_plain": "dac8554ipwr.glb",
      "model_3d_step": "dac8554ipwr-etched.step",
      "model_3d_step_plain": "dac8554ipwr.step",
      "lbr": "dac8554ipwr.lbr"
    },
    "distributor_links": {
      "lcsc": "C527522"
    },
    "pins": [
      {
        "number": "1",
        "name": "VOUTA",
        "type": "output",
        "description": "Analog output from DAC channel A, range 0V to VREFH with ±12LSB accuracy."
      },
      {
        "number": "2",
        "name": "VOUTB",
        "type": "output",
        "description": "Analog output from DAC channel B, range 0V to VREFH with ±12LSB accuracy."
      },
      {
        "number": "3",
        "name": "VrefH",
        "type": "input",
        "description": "Positive reference voltage input, valid range 0V to AVDD with input impedance 31kΩ typical."
      },
      {
        "number": "4",
        "name": "AVDD",
        "type": "power_in",
        "description": "Analog supply input, 2.7V to 5.5V with typical current 600-900µA for all active channels at 5V."
      },
      {
        "number": "5",
        "name": "VrefL",
        "type": "input",
        "description": "Negative reference voltage input, valid range 0V to AVDD/2 with input impedance 31kΩ typical."
      },
      {
        "number": "6",
        "name": "GND",
        "type": "power_in",
        "description": "Ground reference point for all circuitry, single ground pin carrying all return currents."
      },
      {
        "number": "7",
        "name": "VOUTC",
        "type": "output",
        "description": "Analog output from DAC channel C, range 0V to VREFH with ±12LSB accuracy."
      },
      {
        "number": "8",
        "name": "VOUTD",
        "type": "output",
        "description": "Analog output from DAC channel D, range 0V to VREFH with ±12LSB accuracy."
      },
      {
        "number": "9",
        "name": "SYNC",
        "type": "input",
        "description": "Level-triggered frame synchronization input (active LOW), gates data transfer on falling SCLK edges."
      },
      {
        "number": "10",
        "name": "SCLK",
        "type": "input",
        "description": "Serial clock input for SPI interface, supports up to 50MHz at IOVDD = 5V."
      },
      {
        "number": "11",
        "name": "DIN",
        "type": "input",
        "description": "Serial data input for 24-bit shift register, clocked on falling edges of SCLK."
      },
      {
        "number": "12",
        "name": "IOVDD",
        "type": "power_in",
        "description": "Digital power supply input, 1.8V to 5.5V, powers logic inputs independent of AVDD."
      },
      {
        "number": "13",
        "name": "A0",
        "type": "input",
        "description": "Address selection input bit 0, sets device address on shared SPI bus."
      },
      {
        "number": "14",
        "name": "A1",
        "type": "input",
        "description": "Address selection input bit 1, sets device address on shared SPI bus."
      },
      {
        "number": "15",
        "name": "ENABLE",
        "type": "input",
        "description": "Active LOW serial interface enable, connect to logic low for normal SPI operation."
      },
      {
        "number": "16",
        "name": "LDAC",
        "type": "input",
        "description": "Load DAC rising-edge trigger input, asynchronously loads all four DAC registers simultaneously."
      }
    ],
    "provenance": {
      "extractor": "extract_pins 0.2",
      "factory_chain": {
        "factory": "2.0.0",
        "extractor": "extract_pins 0.2",
        "primary_model": "claude-haiku-4-5-20251001",
        "primary_mode": "text",
        "consensus_model": "claude-sonnet-5",
        "consensus": "agreed",
        "guards": "pin_guards 0.1: passed",
        "guard_notes": [],
        "pages_sent": 34,
        "cost_usd": 0.3265,
        "at": "2026-09-23T10:23:25"
      },
      "datasheet": {
        "url": "https://www.ti.com/cn/lit/gpn/dac8554",
        "pages": 34,
        "sha256": "cccca85ee631b32d",
        "source_tier": "lcsc"
      },
      "cad": "KiCad official (CC-BY-SA 4.0)",
      "pins": {
        "total": 16,
        "described": 16,
        "cites_pages": true,
        "refuses_to_fabricate": true
      }
    },
    "viewers": {
      "symbol": "viewers/symbol.html",
      "footprint": "viewers/footprint.html"
    },
    "models_3d": [
      {
        "file": "dac8554ipwr.step",
        "role": "plain",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          6.4,
          5.0,
          1.1
        ],
        "zmin_mm": -0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "6ad5e98224d02a427d9a6b929a28dbc158b9925fba5adec12db05079f1016948",
        "checked": "2026-10-07",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      },
      {
        "file": "dac8554ipwr-etched.step",
        "role": "eda",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          6.4,
          5.0,
          1.1
        ],
        "zmin_mm": -0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "9a7205daa4b31ed6a4c1286131ff2d2b76da94f836849cc4ecb77288f4ecefc9",
        "checked": "2026-10-07",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      }
    ]
  }
}