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DAC8554IPWR

Public Made by Adom

by adom

Texas Instruments Digital To Analog Converters (DAC), TSSOP-16. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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docs dac8554ipwr: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
viewers dac8554ipwr: viewers · Ray
dac8554ipwr-etched.fit.json dac8554ipwr: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
dac8554ipwr-etched.glb dac8554ipwr: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
dac8554ipwr-etched.step dac8554ipwr: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
dac8554ipwr.glb Publish 0.1.0 · Ray
dac8554ipwr.kicad_mod Publish 0.1.0 · Ray
dac8554ipwr.kicad_sym Publish 0.1.0 · Ray
dac8554ipwr.lbr Publish 0.1.0 · Ray
dac8554ipwr.step Publish 0.1.0 · Ray
package.json dac8554ipwr: component.models_3d pose record per STEP (Z-up, seated z=0, pad-centre origin, identity binding) · Ray
page.json dac8554ipwr: component.models_3d pose record per STEP (Z-up, seated z=0, pad-centre origin, identity binding) · Ray
README.md Initial commit: component/dac8554ipwr · Ray

DAC8554IPWR

Texas Instruments · Digital To Analog Converters (DAC) · TSSOP-16

DAC8554IPWR from Texas Instruments, in a TSSOP-16. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VOUTA output Analog output from DAC channel A, range 0V to VREFH with ±12LSB accuracy.
2 VOUTB output Analog output from DAC channel B, range 0V to VREFH with ±12LSB accuracy.
3 VrefH input Positive reference voltage input, valid range 0V to AVDD with input impedance 31kΩ typical.
4 AVDD power_in Analog supply input, 2.7V to 5.5V with typical current 600-900µA for all active channels at 5V.
5 VrefL input Negative reference voltage input, valid range 0V to AVDD/2 with input impedance 31kΩ typical.
6 GND power_in Ground reference point for all circuitry, single ground pin carrying all return currents.
7 VOUTC output Analog output from DAC channel C, range 0V to VREFH with ±12LSB accuracy.
8 VOUTD output Analog output from DAC channel D, range 0V to VREFH with ±12LSB accuracy.
9 SYNC input Level-triggered frame synchronization input (active LOW), gates data transfer on falling SCLK edges.
10 SCLK input Serial clock input for SPI interface, supports up to 50MHz at IOVDD = 5V.
11 DIN input Serial data input for 24-bit shift register, clocked on falling edges of SCLK.
12 IOVDD power_in Digital power supply input, 1.8V to 5.5V, powers logic inputs independent of AVDD.
13 A0 input Address selection input bit 0, sets device address on shared SPI bus.
14 A1 input Address selection input bit 1, sets device address on shared SPI bus.
15 ENABLE input Active LOW serial interface enable, connect to logic low for normal SPI operation.
16 LDAC input Load DAC rising-edge trigger input, asynchronously loads all four DAC registers simultaneously.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package TSSOP-16
Category Data Acquisition
Pins 16

CAD (KiCad official)

  • Symbol: DAC8554IPWR
  • Footprint: Package_SO:TSSOP-16_4.4x5mm_P0.65mm
  • 3D model: TSSOP-16 (KiCad packages3D, STEP)
  • 3D model files: dac8554ipwr-etched.step / dac8554ipwr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); dac8554ipwr.step / dac8554ipwr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (34 pp, sha256 cccca85ee631b32d, retrieved 2026-09-23, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.2, primary claude-haiku-4-5-20251001 (text), consensus claude-sonnet-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF