main
Ray dac8311idckt: component.models_3d pose record per STEP (Z-up, seated z=0, pad-centre origin, identity binding) 923ff2f 1mo ago
{
  "schema_version": 1,
  "type": "component",
  "slug": "dac8311idckt",
  "title": "DAC8311IDCKT",
  "brief": "Texas Instruments Digital To Analog Converters (DACs), SC-70-6(SOT-363). Pinout extracted from the datasheet, KiCad symbol/footprint/3D.",
  "version": "0.1.0",
  "license": "CC-BY-SA-4.0",
  "tags": [
    "component",
    "adc-dac-data conversion",
    "dac8311idckt"
  ],
  "component": {
    "mpn": "DAC8311IDCKT",
    "manufacturer": "Texas Instruments",
    "package": "SC-70-6(SOT-363)",
    "pin_count": 6,
    "category": "ADC/DAC/Data Conversion",
    "subcategory": "Digital To Analog Converters (DACs)",
    "datasheet": "https://www.ti.com/cn/lit/gpn/dac8411",
    "parts": {
      "symbol": "dac8311idckt.kicad_sym",
      "footprint": "dac8311idckt.kicad_mod",
      "model_3d": "dac8311idckt-etched.glb",
      "model_3d_plain": "dac8311idckt.glb",
      "model_3d_step": "dac8311idckt-etched.step",
      "model_3d_step_plain": "dac8311idckt.step",
      "lbr": "dac8311idckt.lbr"
    },
    "distributor_links": {},
    "pins": [
      {
        "number": "1",
        "name": "SYNC",
        "type": "input",
        "description": "Active-low, level-triggered frame synchronization input for the serial interface. When SYNC goes low, the input shift register is enabled and data is clocked in on the falling edges of SCLK; the DAC is updated after the 16th clock cycle unless SYNC is taken high early (in which case the rising edge acts as an interrupt and the write is ignored)."
      },
      {
        "number": "2",
        "name": "SCLK",
        "type": "input",
        "description": "Serial clock input. Data on DIN is clocked into the shift register on the falling edge of SCLK at rates up to 50 MHz. Schmitt-triggered logic input."
      },
      {
        "number": "3",
        "name": "DIN",
        "type": "input",
        "description": "Serial data input. Data is clocked into the 16-bit (DAC8311) input shift register on the falling edge of SCLK while SYNC is low."
      },
      {
        "number": "4",
        "name": "AVDD/VREF",
        "type": "power_in",
        "description": "Analog power supply input and reference voltage for the DAC, +2 V to +5.5 V. AVDD sets the full-scale output range (VOUT = 0 to AVDD). Decouple to GND with appropriate bypass capacitors."
      },
      {
        "number": "5",
        "name": "GND",
        "type": "power_in",
        "description": "Ground reference for all analog and digital circuitry on the device."
      },
      {
        "number": "6",
        "name": "VOUT",
        "type": "output",
        "description": "Analog voltage output from the DAC. The rail-to-rail output amplifier swings from 0 V to AVDD and can drive a 2 kΩ load with up to 200 pF capacitance while maintaining stability."
      }
    ],
    "provenance": {
      "extractor": "ds2sf",
      "datasheet": {
        "url": "https://www.ti.com/cn/lit/gpn/dac8411",
        "pages": 41,
        "sha256": "8453ec6a1673f061",
        "source_tier": "lcsc"
      },
      "cad": "KiCad official (CC-BY-SA 4.0)",
      "pins": {
        "total": 6,
        "described": 6,
        "cites_pages": true,
        "refuses_to_fabricate": true
      }
    },
    "viewers": {
      "symbol": "viewers/symbol.html",
      "footprint": "viewers/footprint.html"
    },
    "models_3d": [
      {
        "file": "dac8311idckt.step",
        "role": "plain",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          2.1,
          2.0,
          1.1
        ],
        "zmin_mm": 0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "045cc95e18ee7a13d1623c3ce6604fc833049bdb4f952f68c26e3c5767d122e4",
        "checked": "2026-10-07",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      },
      {
        "file": "dac8311idckt-etched.step",
        "role": "eda",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          2.1,
          2.0,
          1.1
        ],
        "zmin_mm": 0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "2a80232fce3e18ec06c88b4e1e73c5b85304d7be5c52488a137660a27174d51f",
        "checked": "2026-10-07",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      }
    ]
  },
  "metadata": {
    "specs": {
      "Manufacturer": "Texas Instruments",
      "Package": "SC-70-6(SOT-363)",
      "Category": "ADC/DAC/Data Conversion",
      "Pins": "6"
    }
  },
  "variants": [
    {
      "mpn": "DAC8311IDCKT",
      "kind": "packaging"
    },
    {
      "mpn": "DAC8311IDCKR",
      "kind": "unknown"
    }
  ],
  "sections": [
    "hero",
    "viewers",
    "readme",
    "breadcrumbs",
    "info"
  ],
  "discovery_triggers": [
    "dac8311idckt"
  ],
  "discovery_pitch": "DAC8311IDCKT (Texas Instruments) component page with datasheet-verified CAD.",
  "author": {
    "name": "Ray",
    "email": "[email protected]"
  },
  "dependencies": {},
  "hero": {
    "type": "image",
    "path": "docs/hero.png"
  },
  "files": [
    "page.json",
    "README.md",
    "dac8311idckt.kicad_sym",
    "dac8311idckt.kicad_mod",
    "dac8311idckt.glb",
    "dac8311idckt.step",
    "dac8311idckt.lbr",
    "docs/hero.png",
    "docs/dac8311idckt-datasheet.pdf",
    "viewers/symbol.html",
    "viewers/footprint.html"
  ],
  "visibility": {
    "public": true
  },
  "updated_at": "2026-09-24T19:40:17.770Z"
}