DAC7731EB

{
  "slug": "dac7731eb",
  "version": "0.1.0",
  "type": "component",
  "description": "Texas Instruments Digital To Analog Converters (DACs), SSOP-24. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
  "tags": [
    "component",
    "adc-dac-data conversion",
    "dac7731eb",
    "factory-2.0.0",
    "extractor-text"
  ],
  "dependencies": {},
  "hero": {
    "type": "image",
    "path": "docs/hero.png"
  },
  "files": [
    "page.json",
    "README.md",
    "dac7731eb.kicad_sym",
    "dac7731eb.kicad_mod",
    "dac7731eb.glb",
    "dac7731eb.step",
    "dac7731eb.lbr",
    "docs/hero.png",
    "docs/dac7731eb-datasheet.pdf",
    "viewers/symbol.html",
    "viewers/footprint.html",
    "dac7731eb-hero.glb",
    "dac7731eb-hero.overlay.json"
  ],
  "component": {
    "mpn": "DAC7731EB",
    "manufacturer": "Texas Instruments",
    "package": "SSOP-24",
    "pin_count": 24,
    "category": "ADC/DAC/Data Conversion",
    "subcategory": "Digital To Analog Converters (DACs)",
    "datasheet": "https://www.ti.com/cn/lit/gpn/dac7731",
    "parts": {
      "symbol": "dac7731eb.kicad_sym",
      "footprint": "dac7731eb.kicad_mod",
      "model_3d": "dac7731eb-hero.glb",
      "model_3d_plain": "dac7731eb.glb",
      "model_3d_step": "dac7731eb-etched.step",
      "model_3d_step_plain": "dac7731eb.step",
      "lbr": "dac7731eb.lbr"
    },
    "distributor_links": {
      "lcsc": "C1554821",
      "digikey": "2156-DAC7731EB-ND",
      "mouser": "595-DAC7731EB"
    },
    "distributor_check": {
      "checked_at": "2026-10-10T23:54:44Z",
      "source": "Component Ocean /api/assign-pns",
      "digikey": {
        "pn": "2156-DAC7731EB-ND",
        "status": "found",
        "lifecycle": "Active"
      },
      "mouser": {
        "pn": "595-DAC7731EB",
        "status": "found"
      }
    },
    "pins": [
      {
        "number": "1",
        "name": "VCC",
        "type": "power_in",
        "description": "Positive analog power supply; the electrical characteristics specify VCC from +11.4V to +15.75V."
      },
      {
        "number": "2",
        "name": "REFOUT",
        "type": "power_out",
        "description": "Internal reference output providing +10V when the internal reference is enabled (REFEN LOW); high impedance when REFEN is HIGH."
      },
      {
        "number": "3",
        "name": "REFIN",
        "type": "input",
        "description": "Reference input to the on-chip buffer; with the internal reference it is tied to REFOUT, and with an external reference it must be between 4.75V (or VSS + 14V, whichever is greater) and VCC - 1.4V."
      },
      {
        "number": "4",
        "name": "REFADJ",
        "type": "input",
        "description": "Internal reference trim that acts as a gain adjustment input when the internal reference is used; the absolute maximum applied voltage is VCC."
      },
      {
        "number": "5",
        "name": "VREF",
        "type": "power_in",
        "description": "Buffered output from REFIN that can drive external devices and internally drives the DAC circuitry; output current is specified as -2 mA to +2 mA."
      },
      {
        "number": "6",
        "name": "ROFFSET",
        "type": "passive",
        "description": "Offsetting resistor connection used in the output amplifier network to configure the DAC output range."
      },
      {
        "number": "7",
        "name": "AGND",
        "type": "power_in",
        "description": "Analog ground; the datasheet recommends connecting it directly to an analog ground plane separate from DGND until the power-entry point."
      },
      {
        "number": "8",
        "name": "RFB2",
        "type": "passive",
        "description": "Feedback resistor 2, used together with RFB1 and ROFFSET to configure the DAC output range (unipolar 0V to +10V, ±5V, or ±10V)."
      },
      {
        "number": "9",
        "name": "RFB1",
        "type": "passive",
        "description": "Feedback resistor 1, used together with RFB2 and ROFFSET to configure the DAC output range."
      },
      {
        "number": "10",
        "name": "SJ",
        "type": "passive",
        "description": "Summing junction of the output amplifier, connected through the feedback network to set the output voltage range."
      },
      {
        "number": "11",
        "name": "VOUT",
        "type": "output",
        "description": "DAC voltage output; output current is specified as ±5 mA and maximum load capacitance as 200 pF."
      },
      {
        "number": "12",
        "name": "VDD",
        "type": "power_in",
        "description": "Digital power supply; the electrical characteristics specify VDD from +4.75V to +5.25V."
      },
      {
        "number": "13",
        "name": "DGND",
        "type": "power_in",
        "description": "Digital ground, to be kept separate from AGND and connected at the system power-entry point."
      },
      {
        "number": "14",
        "name": "TEST",
        "type": "passive",
        "description": "Reserved pin that must be connected to DGND."
      },
      {
        "number": "15",
        "name": "NC",
        "type": "unconnected",
        "description": "No internal connection."
      },
      {
        "number": "16",
        "name": "RST",
        "type": "input",
        "description": "Asynchronous active-LOW reset (Schmitt-triggered) that sets the input and DAC registers to mid-scale or min-scale according to RSTSEL."
      },
      {
        "number": "17",
        "name": "LDAC",
        "type": "input",
        "description": "DAC register load control (Schmitt-triggered), rising-edge triggered, that transfers data from the input register to the DAC register."
      },
      {
        "number": "18",
        "name": "SDI",
        "type": "input",
        "description": "Serial data input (Schmitt-triggered), latched into the input register on the rising edge of SCLK."
      },
      {
        "number": "19",
        "name": "SDO",
        "type": "output",
        "description": "Serial data output, delayed by 16 SCLK clock cycles, for daisy-chaining multiple DAC7731s."
      },
      {
        "number": "20",
        "name": "CS",
        "type": "input",
        "description": "Chip select, active LOW (Schmitt-triggered input); CS rising edge should occur only when SCLK is HIGH to avoid an extra shift."
      },
      {
        "number": "21",
        "name": "SCLK",
        "type": "input",
        "description": "Serial clock input (Schmitt-triggered); data is latched into the input register on its rising edge."
      },
      {
        "number": "22",
        "name": "RSTSEL",
        "type": "input",
        "description": "Reset select that determines the action of RST: HIGH resets the DAC register to mid-scale, LOW resets it to min-scale."
      },
      {
        "number": "23",
        "name": "REFEN",
        "type": "input",
        "description": "Enables the internal +10V reference (REFOUT) when LOW; when HIGH the internal reference is disabled and REFOUT is high impedance."
      },
      {
        "number": "24",
        "name": "VSS",
        "type": "power_in",
        "description": "Negative analog power supply; must be in the range -4.75V to -15.75V for unipolar operation and -11.4V to -15.75V for bipolar operation."
      }
    ],
    "provenance": {
      "extractor": "extract_pins 0.3",
      "factory_chain": {
        "factory": "2.0.0",
        "extractor": "extract_pins 0.3",
        "primary_model": "claude-haiku-5-5",
        "primary_mode": "text",
        "consensus_model": "claude-sonnet-5-5",
        "consensus": "agreed",
        "guards": "pin_guards 0.1: passed",
        "guard_notes": [
          "extractor flagged: TEST is described only as 'Reserved, Connect to DGND'. Classified as passive, which is an assumption; NC is marked 'No Connection' in the datasheet. Classified as unconnected per KiCad convention.; The pin table describes RST as 'VOUT reset', but the truth table (Table III) shows RST resets the In"
        ],
        "pages_sent": 10,
        "cost_usd": 0.0684,
        "at": "2026-10-10T23:54:27"
      },
      "datasheet": {
        "url": "https://www.ti.com/cn/lit/gpn/dac7731",
        "pages": 23,
        "sha256": "031c070247652ea7",
        "source_tier": "lcsc"
      },
      "cad": "KiCad official (CC-BY-SA 4.0)",
      "pins": {
        "total": 24,
        "described": 24,
        "cites_pages": true,
        "refuses_to_fabricate": true
      }
    },
    "viewers": {
      "symbol": "viewers/symbol.html",
      "footprint": "viewers/footprint.html"
    },
    "models_3d": [
      {
        "file": "dac7731eb.step",
        "role": "plain",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          7.8,
          8.2,
          2.1
        ],
        "zmin_mm": 0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "77dd0a1fc7e70e9eda1bfde9dde937dc6e391803cff9978790523c850c85a21d",
        "checked": "2026-10-10",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      },
      {
        "file": "dac7731eb-etched.step",
        "role": "eda",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          7.8,
          8.2,
          2.1
        ],
        "zmin_mm": 0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "3e6f3586201adcc507d237e1b868f1fa9752919c1d719b05fdb6e28d2c125837",
        "checked": "2026-10-10",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      }
    ]
  }
}