main
Ray dac7578spwr: component.models_3d pose record per STEP (Z-up, seated z=0, pad-centre origin, identity binding) 6a7e914
{
  "slug": "dac7578spwr",
  "version": "0.1.0",
  "type": "component",
  "description": "Texas Instruments Digital To Analog Converters (DAC), TSSOP-16. Datasheet-verified pinout, KiCad symbol/footprint/3D.",
  "tags": [
    "component",
    "data acquisition",
    "dac7578spwr",
    "factory-2.0.0",
    "extractor-text"
  ],
  "dependencies": {},
  "hero": {
    "type": "image",
    "path": "docs/hero.png"
  },
  "files": [
    "page.json",
    "README.md",
    "dac7578spwr.kicad_sym",
    "dac7578spwr.kicad_mod",
    "dac7578spwr.glb",
    "dac7578spwr.step",
    "dac7578spwr.lbr",
    "docs/hero.png",
    "docs/dac7578spwr-datasheet.pdf",
    "viewers/symbol.html",
    "viewers/footprint.html"
  ],
  "component": {
    "mpn": "DAC7578SPWR",
    "manufacturer": "Texas Instruments",
    "package": "TSSOP-16",
    "pin_count": 16,
    "category": "Data Acquisition",
    "subcategory": "Digital To Analog Converters (DAC)",
    "datasheet": "https://www.ti.com/cn/lit/gpn/dac7578",
    "parts": {
      "symbol": "dac7578spwr.kicad_sym",
      "footprint": "dac7578spwr.kicad_mod",
      "model_3d": "dac7578spwr-etched.glb",
      "model_3d_plain": "dac7578spwr.glb",
      "model_3d_step": "dac7578spwr-etched.step",
      "model_3d_step_plain": "dac7578spwr.step",
      "lbr": "dac7578spwr.lbr"
    },
    "distributor_links": {
      "lcsc": "C1520855"
    },
    "pins": [
      {
        "number": "1",
        "name": "LDAC",
        "type": "input",
        "description": "Negative-edge triggered asynchronous load input for updating selected DAC outputs with latched data"
      },
      {
        "number": "2",
        "name": "ADDR0",
        "type": "input",
        "description": "3-state address input for I2C device addressing (connect to AVDD, GND, or leave floating)"
      },
      {
        "number": "3",
        "name": "AVDD",
        "type": "power_in",
        "description": "Analog power supply input, 2.7V to 5.5V"
      },
      {
        "number": "4",
        "name": "VOUTA",
        "type": "output",
        "description": "Analog output voltage from DAC A, 0V to AVDD, 0.75V/μs slew rate, 7μs settling time unloaded"
      },
      {
        "number": "5",
        "name": "VOUTC",
        "type": "output",
        "description": "Analog output voltage from DAC C, 0V to AVDD, 0.75V/μs slew rate, 7μs settling time unloaded"
      },
      {
        "number": "6",
        "name": "VOUTE",
        "type": "output",
        "description": "Analog output voltage from DAC E, 0V to AVDD, 0.75V/μs slew rate, 7μs settling time unloaded"
      },
      {
        "number": "7",
        "name": "VOUTG",
        "type": "output",
        "description": "Analog output voltage from DAC G, 0V to AVDD, 0.75V/μs slew rate, 7μs settling time unloaded"
      },
      {
        "number": "8",
        "name": "VREFIN",
        "type": "input",
        "description": "Positive external reference input, 0V to 5V for scaling DAC output range with typical external reference current 60µA"
      },
      {
        "number": "9",
        "name": "CLR",
        "type": "input",
        "description": "Asynchronous clear input, falling-edge triggered with 40ns minimum pulse width to clear all DAC registers to configured clear code"
      },
      {
        "number": "10",
        "name": "VOUTH",
        "type": "output",
        "description": "Analog output voltage from DAC H, 0V to AVDD, 0.75V/μs slew rate, 7μs settling time unloaded"
      },
      {
        "number": "11",
        "name": "VOUTF",
        "type": "output",
        "description": "Analog output voltage from DAC F, 0V to AVDD, 0.75V/μs slew rate, 7μs settling time unloaded"
      },
      {
        "number": "12",
        "name": "VOUTD",
        "type": "output",
        "description": "Analog output voltage from DAC D, 0V to AVDD, 0.75V/μs slew rate, 7μs settling time unloaded"
      },
      {
        "number": "13",
        "name": "VOUTB",
        "type": "output",
        "description": "Analog output voltage from DAC B, 0V to AVDD, 0.75V/μs slew rate, 7μs settling time unloaded"
      },
      {
        "number": "14",
        "name": "GND",
        "type": "power_in",
        "description": "Ground reference point and return path for all analog and digital circuitry on the device"
      },
      {
        "number": "15",
        "name": "SDA",
        "type": "bidirectional",
        "description": "I2C bidirectional open-drain serial data line with external pull-up resistor (1kΩ to 10kΩ recommended), supports up to 3.4MHz clock rate"
      },
      {
        "number": "16",
        "name": "SCL",
        "type": "input",
        "description": "I2C serial clock input with Schmitt-trigger logic, supports data transfer rates up to 3.4MHz"
      }
    ],
    "provenance": {
      "extractor": "extract_pins 0.2",
      "factory_chain": {
        "factory": "2.0.0",
        "extractor": "extract_pins 0.2",
        "primary_model": "claude-haiku-4-5-20251001",
        "primary_mode": "text",
        "consensus_model": "claude-sonnet-5",
        "consensus": "agreed",
        "guards": "pin_guards 0.1: passed",
        "guard_notes": [],
        "pages_sent": 60,
        "cost_usd": 0.6535,
        "at": "2026-09-23T22:26:51"
      },
      "datasheet": {
        "url": "https://www.ti.com/cn/lit/gpn/dac7578",
        "pages": 60,
        "sha256": "384236e44db678a7",
        "source_tier": "lcsc"
      },
      "cad": "KiCad official (CC-BY-SA 4.0)",
      "pins": {
        "total": 16,
        "described": 16,
        "cites_pages": true,
        "refuses_to_fabricate": true
      }
    },
    "viewers": {
      "symbol": "viewers/symbol.html",
      "footprint": "viewers/footprint.html"
    },
    "models_3d": [
      {
        "file": "dac7578spwr.step",
        "role": "plain",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          6.4,
          5.0,
          1.1
        ],
        "zmin_mm": -0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "6ad5e98224d02a427d9a6b929a28dbc158b9925fba5adec12db05079f1016948",
        "checked": "2026-10-07",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      },
      {
        "file": "dac7578spwr-etched.step",
        "role": "eda",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          6.4,
          5.0,
          1.1
        ],
        "zmin_mm": -0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "0227725bcc74f5b30efc9f6f956927b0b4815ac7a0ea799a913908b06b12f0b0",
        "checked": "2026-10-07",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      }
    ]
  }
}