DAC5681ZIRGCR

{
  "schema_version": 1,
  "type": "component",
  "slug": "dac5681zirgcr",
  "title": "DAC5681ZIRGCR",
  "brief": "Texas Instruments Digital To Analog Converters (DACs), VQFN-64-EP(9x9). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
  "version": "0.1.0",
  "license": "CC-BY-SA-4.0",
  "tags": [
    "component",
    "adc-dac-data conversion",
    "dac5681zirgcr",
    "factory-2.0.0",
    "extractor-text"
  ],
  "component": {
    "mpn": "DAC5681ZIRGCR",
    "manufacturer": "Texas Instruments",
    "package": "VQFN-64-EP(9x9)",
    "pin_count": 65,
    "category": "ADC/DAC/Data Conversion",
    "subcategory": "Digital To Analog Converters (DACs)",
    "datasheet": "https://www.ti.com/cn/lit/gpn/dac5681z",
    "parts": {
      "symbol": "dac5681zirgcr.kicad_sym",
      "footprint": "dac5681zirgcr.kicad_mod",
      "model_3d": "dac5681zirgcr-hero.glb",
      "model_3d_plain": "dac5681zirgcr.glb",
      "model_3d_step": "dac5681zirgcr-etched.step",
      "model_3d_step_plain": "dac5681zirgcr.step",
      "lbr": "dac5681zirgcr.lbr"
    },
    "distributor_links": {
      "lcsc": "C2680106",
      "digikey": "DAC5681ZIRGCR-ND",
      "mouser": "595-DAC5681ZIRGCR"
    },
    "distributor_check": {
      "checked_at": "2026-10-11T22:39:51Z",
      "source": "Component Ocean /api/assign-pns",
      "digikey": {
        "pn": "DAC5681ZIRGCR-ND",
        "status": "found",
        "lifecycle": "Active"
      },
      "mouser": {
        "pn": "595-DAC5681ZIRGCR",
        "status": "found"
      }
    },
    "pins": [
      {
        "number": "1",
        "name": "CLKVDD",
        "type": "power_in",
        "description": "Internal clock buffer supply, 1.8 V nominal (1.7 V to 1.9 V recommended operating range)."
      },
      {
        "number": "2",
        "name": "CLKIN",
        "type": "input",
        "description": "Positive external DAC clock input, self-biased to about CLKVDD/2; with the PLL enabled it is the lower-frequency reference, and with the PLL disabled it clocks the DAC directly up to 1 GHz."
      },
      {
        "number": "3",
        "name": "CLKINC",
        "type": "input",
        "description": "Complementary external clock input to CLKIN, used as a differential pair with CLKIN."
      },
      {
        "number": "4",
        "name": "GND",
        "type": "power_in",
        "description": "Ground for the AVDD, DVDD, and IOVDD supplies; pin 4 and the exposed thermal pad on the package bottom are both ground."
      },
      {
        "number": "5",
        "name": "SYNCP",
        "type": "input",
        "description": "Positive LVDS SYNC input with internal 100-Ω termination; by default SYNCP/N must be logic 1 to enable a DAC analog output."
      },
      {
        "number": "6",
        "name": "SYNCN",
        "type": "input",
        "description": "Negative LVDS SYNC input, complementary to SYNCP, with internal 100-Ω termination."
      },
      {
        "number": "7",
        "name": "D15P",
        "type": "input",
        "description": "Positive LVDS input data bit 15 (MSB), double data rate with two samples per DCLKP/N cycle and an internal 100-Ω termination across the pair."
      },
      {
        "number": "8",
        "name": "D15N",
        "type": "input",
        "description": "Negative LVDS input data bit 15 (MSB), complementary to D15P with internal 100-Ω termination."
      },
      {
        "number": "9",
        "name": "IOVDD",
        "type": "power_in",
        "description": "Digital I/O supply for RESETB, SCLK, SDENB, SDIO, and SDO, 3.0 V to 3.6 V (3.3 V nominal)."
      },
      {
        "number": "10",
        "name": "DVDD",
        "type": "power_in",
        "description": "Digital supply, 1.7 V to 1.9 V (1.8 V nominal)."
      },
      {
        "number": "11",
        "name": "D14P",
        "type": "input",
        "description": "Positive LVDS input data bit 14 with internal 100-Ω termination, double data rate relative to DCLKP/N."
      },
      {
        "number": "12",
        "name": "D14N",
        "type": "input",
        "description": "Negative LVDS input data bit 14, complementary to D14P with internal 100-Ω termination."
      },
      {
        "number": "13",
        "name": "D13P",
        "type": "input",
        "description": "Positive LVDS input data bit 13 with internal 100-Ω termination, double data rate relative to DCLKP/N."
      },
      {
        "number": "14",
        "name": "D13N",
        "type": "input",
        "description": "Negative LVDS input data bit 13, complementary to D13P with internal 100-Ω termination."
      },
      {
        "number": "15",
        "name": "D12P",
        "type": "input",
        "description": "Positive LVDS input data bit 12 with internal 100-Ω termination, double data rate relative to DCLKP/N."
      },
      {
        "number": "16",
        "name": "D12N",
        "type": "input",
        "description": "Negative LVDS input data bit 12, complementary to D12P with internal 100-Ω termination."
      },
      {
        "number": "17",
        "name": "D11P",
        "type": "input",
        "description": "Positive LVDS input data bit 11 with internal 100-Ω termination, double data rate relative to DCLKP/N."
      },
      {
        "number": "18",
        "name": "D11N",
        "type": "input",
        "description": "Negative LVDS input data bit 11, complementary to D11P with internal 100-Ω termination."
      },
      {
        "number": "19",
        "name": "D10P",
        "type": "input",
        "description": "Positive LVDS input data bit 10 with internal 100-Ω termination, double data rate relative to DCLKP/N."
      },
      {
        "number": "20",
        "name": "D10N",
        "type": "input",
        "description": "Negative LVDS input data bit 10, complementary to D10P with internal 100-Ω termination."
      },
      {
        "number": "21",
        "name": "D9P",
        "type": "input",
        "description": "Positive LVDS input data bit 9 with internal 100-Ω termination, double data rate relative to DCLKP/N."
      },
      {
        "number": "22",
        "name": "D9N",
        "type": "input",
        "description": "Negative LVDS input data bit 9, complementary to D9P with internal 100-Ω termination."
      },
      {
        "number": "23",
        "name": "D8P",
        "type": "input",
        "description": "Positive LVDS input data bit 8 with internal 100-Ω termination, double data rate relative to DCLKP/N."
      },
      {
        "number": "24",
        "name": "D8N",
        "type": "input",
        "description": "Negative LVDS input data bit 8, complementary to D8P with internal 100-Ω termination."
      },
      {
        "number": "25",
        "name": "DCLKP",
        "type": "input",
        "description": "Positive LVDS data clock, self-biased to about DVDD/2 with no internal termination; requires an external 100-Ω resistor across the pair with 0.01-µF series capacitors."
      },
      {
        "number": "26",
        "name": "DCLKN",
        "type": "input",
        "description": "Negative LVDS data clock, complementary to DCLKP, self-biased to about DVDD/2 with no internal termination."
      },
      {
        "number": "27",
        "name": "D7P",
        "type": "input",
        "description": "Positive LVDS input data bit 7 with internal 100-Ω termination, double data rate relative to DCLKP/N."
      },
      {
        "number": "28",
        "name": "D7N",
        "type": "input",
        "description": "Negative LVDS input data bit 7, complementary to D7P with internal 100-Ω termination."
      },
      {
        "number": "29",
        "name": "D6P",
        "type": "input",
        "description": "Positive LVDS input data bit 6 with internal 100-Ω termination, double data rate relative to DCLKP/N."
      },
      {
        "number": "30",
        "name": "D6N",
        "type": "input",
        "description": "Negative LVDS input data bit 6, complementary to D6P with internal 100-Ω termination."
      },
      {
        "number": "31",
        "name": "D5P",
        "type": "input",
        "description": "Positive LVDS input data bit 5 with internal 100-Ω termination, double data rate relative to DCLKP/N."
      },
      {
        "number": "32",
        "name": "D5N",
        "type": "input",
        "description": "Negative LVDS input data bit 5, complementary to D5P with internal 100-Ω termination."
      },
      {
        "number": "33",
        "name": "D4P",
        "type": "input",
        "description": "Positive LVDS input data bit 4 with internal 100-Ω termination, double data rate relative to DCLKP/N."
      },
      {
        "number": "34",
        "name": "D4N",
        "type": "input",
        "description": "Negative LVDS input data bit 4, complementary to D4P with internal 100-Ω termination."
      },
      {
        "number": "35",
        "name": "D3P",
        "type": "input",
        "description": "Positive LVDS input data bit 3 with internal 100-Ω termination, double data rate relative to DCLKP/N."
      },
      {
        "number": "36",
        "name": "D3N",
        "type": "input",
        "description": "Negative LVDS input data bit 3, complementary to D3P with internal 100-Ω termination."
      },
      {
        "number": "37",
        "name": "D2P",
        "type": "input",
        "description": "Positive LVDS input data bit 2 with internal 100-Ω termination, double data rate relative to DCLKP/N."
      },
      {
        "number": "38",
        "name": "D2N",
        "type": "input",
        "description": "Negative LVDS input data bit 2, complementary to D2P with internal 100-Ω termination."
      },
      {
        "number": "39",
        "name": "DVDD",
        "type": "power_in",
        "description": "Digital supply, 1.7 V to 1.9 V (1.8 V nominal)."
      },
      {
        "number": "40",
        "name": "D1P",
        "type": "input",
        "description": "Positive LVDS input data bit 1 with internal 100-Ω termination, double data rate relative to DCLKP/N."
      },
      {
        "number": "41",
        "name": "D1N",
        "type": "input",
        "description": "Negative LVDS input data bit 1, complementary to D1P with internal 100-Ω termination."
      },
      {
        "number": "42",
        "name": "D0P",
        "type": "input",
        "description": "Positive LVDS input data bit 0 (LSB) with internal 100-Ω termination, double data rate relative to DCLKP/N."
      },
      {
        "number": "43",
        "name": "D0N",
        "type": "input",
        "description": "Negative LVDS input data bit 0 (LSB), complementary to D0P with internal 100-Ω termination."
      },
      {
        "number": "44",
        "name": "VFUSE",
        "type": "power_in",
        "description": "Digital supply, 1.8 V nominal; connect to DVDD for normal operation, and also used for factory fuse programming."
      },
      {
        "number": "45",
        "name": "SDO",
        "type": "output",
        "description": "Unidirectional serial data output in 4-pin mode; high-impedance in 3-pin mode (default), optionally usable as a status output via CONFIG14 SDO_func_sel(2:0), with internal pulldown."
      },
      {
        "number": "46",
        "name": "SDIO",
        "type": "bidirectional",
        "description": "Bidirectional serial data in 3-pin mode (default); becomes input-only in 4-pin mode (CONFIG5 sif4), with internal pulldown."
      },
      {
        "number": "47",
        "name": "SCLK",
        "type": "input",
        "description": "Serial interface clock with internal pulldown; data is clocked into the device on the rising edge of SCLK."
      },
      {
        "number": "48",
        "name": "SDENB",
        "type": "input",
        "description": "Active-low serial data enable, always an input to the DAC, with internal pullup."
      },
      {
        "number": "49",
        "name": "RESETB",
        "type": "input",
        "description": "Active-low chip reset input with internal pullup; the chip is reset when this pin is low."
      },
      {
        "number": "50",
        "name": "DVDD",
        "type": "power_in",
        "description": "Digital supply, 1.7 V to 1.9 V (1.8 V nominal)."
      },
      {
        "number": "51",
        "name": "AVDD",
        "type": "power_in",
        "description": "Analog supply, 3.0 V to 3.6 V (3.3 V nominal)."
      },
      {
        "number": "52",
        "name": "IOUTA1",
        "type": "output",
        "description": "DAC current output; offset-binary code 0x0000 gives full-scale current sink and the least positive voltage, and 0xFFFF gives 0 mA, with compliance of AVDD − 0.5 V to AVDD + 0.5 V."
      },
      {
        "number": "53",
        "name": "IOUTA2",
        "type": "output",
        "description": "Complementary DAC current output with opposite behavior to IOUTA1; code 0x0000 gives 0 mA sink and the most positive voltage."
      },
      {
        "number": "54",
        "name": "AVDD",
        "type": "power_in",
        "description": "Analog supply, 3.0 V to 3.6 V (3.3 V nominal)."
      },
      {
        "number": "55",
        "name": "AVDD",
        "type": "power_in",
        "description": "Analog supply, 3.0 V to 3.6 V (3.3 V nominal)."
      },
      {
        "number": "56",
        "name": "EXTIO",
        "type": "bidirectional",
        "description": "Used as 1.2-V internal reference output when EXTLO is GND (requires 0.1-µF decoupling to AGND), or as external reference input when EXTLO is connected to AVDD."
      },
      {
        "number": "57",
        "name": "BIASJ",
        "type": "output",
        "description": "Full-scale output current bias; connect a 960-Ω resistor to GND for 20-mA full-scale output current."
      },
      {
        "number": "58",
        "name": "EXTLO",
        "type": "output",
        "description": "Reference configuration pin: connect to GND to select the internal reference or to AVDD to select an external reference."
      },
      {
        "number": "59",
        "name": "AVDD",
        "type": "power_in",
        "description": "Analog supply, 3.0 V to 3.6 V (3.3 V nominal)."
      },
      {
        "number": "60",
        "name": "AVDD",
        "type": "power_in",
        "description": "Analog supply, 3.0 V to 3.6 V (3.3 V nominal)."
      },
      {
        "number": "61",
        "name": "AVDD",
        "type": "power_in",
        "description": "Analog supply, 3.0 V to 3.6 V (3.3 V nominal)."
      },
      {
        "number": "62",
        "name": "AVDD",
        "type": "power_in",
        "description": "Analog supply, 3.0 V to 3.6 V (3.3 V nominal)."
      },
      {
        "number": "63",
        "name": "DVDD",
        "type": "power_in",
        "description": "Digital supply, 1.7 V to 1.9 V (1.8 V nominal)."
      },
      {
        "number": "64",
        "name": "LPF",
        "type": "input",
        "description": "PLL loop filter connection; may be left open if the clock-multiplying PLL is not used, in which case PLL_bypass and PLL_sleep should be set for reduced power."
      },
      {
        "number": "65",
        "name": "EP",
        "type": "passive",
        "description": "Exposed pad (from the footprint; not named in the datasheet pin table)."
      }
    ],
    "provenance": {
      "extractor": "extract_pins 0.3",
      "factory_chain": {
        "factory": "2.0.0",
        "extractor": "extract_pins 0.3",
        "primary_model": "claude-haiku-5-5",
        "primary_mode": "text",
        "consensus_model": "claude-sonnet-5-5",
        "consensus": "agreed",
        "guards": "pin_guards 0.1: passed",
        "guard_notes": [
          "extractor flagged: The thermal pad on the package bottom is ground but has no printed pin number; it is not listed as a; The datasheet explicitly names only D15 (pins 7/8) and D0 (pins 42/43) as MSB and LSB. The bit-to-pi; The datasheet lists these supply pins as type I. They are typed here as power_in, the KiCad class fo",
          "exposed pad 65 added from the footprint"
        ],
        "pages_sent": 12,
        "cost_usd": 0.1084,
        "at": "2026-10-11T22:39:31"
      },
      "datasheet": {
        "url": "https://www.ti.com/cn/lit/gpn/dac5681z",
        "pages": 59,
        "sha256": "daf1e7beeeb08e7b",
        "source_tier": "lcsc"
      },
      "cad": "KiCad official (CC-BY-SA 4.0)",
      "pins": {
        "total": 65,
        "described": 65,
        "cites_pages": true,
        "refuses_to_fabricate": true
      }
    },
    "viewers": {
      "symbol": "viewers/symbol.html",
      "footprint": "viewers/footprint.html"
    },
    "models_3d": [
      {
        "file": "dac5681zirgcr.step",
        "role": "plain",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          9,
          9,
          0.75
        ],
        "zmin_mm": 0,
        "centre_offset_mm": 0,
        "footprint_binding": "identity",
        "sha256": "dce07a86ec3fe3ca87eebdff13827f55e036ced5518fee01f85cec4a3f56366d",
        "checked": "2026-10-11",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      },
      {
        "file": "dac5681zirgcr-etched.step",
        "role": "eda",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          9,
          9,
          0.75
        ],
        "zmin_mm": 0,
        "centre_offset_mm": 0,
        "footprint_binding": "identity",
        "sha256": "34ad609beddee7ac9d1c08cc97b25275501037db6bf2456ff110ba164a5b396f",
        "checked": "2026-10-11",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      }
    ]
  },
  "metadata": {
    "specs": {
      "Manufacturer": "Texas Instruments",
      "Package": "VQFN-64-EP(9x9)",
      "Category": "ADC/DAC/Data Conversion",
      "Pins": "65"
    }
  },
  "variants": [],
  "sections": [
    "hero",
    "viewers",
    "readme",
    "breadcrumbs",
    "info"
  ],
  "discovery_triggers": [
    "dac5681zirgcr"
  ],
  "discovery_pitch": "DAC5681ZIRGCR (Texas Instruments) component page: datasheet pinout, KiCad symbol, footprint and 3D.",
  "author": {
    "name": "Ray",
    "email": "[email protected]"
  },
  "dependencies": {},
  "hero": {
    "type": "image",
    "path": "docs/hero.png"
  },
  "files": [
    "page.json",
    "README.md",
    "dac5681zirgcr.kicad_sym",
    "dac5681zirgcr.kicad_mod",
    "dac5681zirgcr.glb",
    "dac5681zirgcr.step",
    "dac5681zirgcr.lbr",
    "docs/hero.png",
    "docs/dac5681zirgcr-datasheet.pdf",
    "viewers/symbol.html",
    "viewers/footprint.html",
    "dac5681zirgcr-hero.glb",
    "dac5681zirgcr-hero.overlay.json"
  ],
  "visibility": {
    "public": true
  }
}