DAC3151IRGCR

{
  "slug": "dac3151irgcr",
  "version": "0.1.0",
  "type": "component",
  "description": "Texas Instruments Digital To Analog Converters (DAC), VQFN-64-EP(9x9). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
  "tags": [
    "component",
    "data acquisition",
    "dac3151irgcr",
    "factory-2.0.0",
    "extractor-text"
  ],
  "dependencies": {},
  "hero": {
    "type": "image",
    "path": "docs/hero.png"
  },
  "files": [
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    "README.md",
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    "dac3151irgcr.step",
    "dac3151irgcr.lbr",
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    "docs/dac3151irgcr-datasheet.pdf",
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    "viewers/footprint.html",
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  "component": {
    "mpn": "DAC3151IRGCR",
    "manufacturer": "Texas Instruments",
    "package": "VQFN-64-EP(9x9)",
    "pin_count": 65,
    "category": "Data Acquisition",
    "subcategory": "Digital To Analog Converters (DAC)",
    "datasheet": "https://www.ti.com/cn/lit/gpn/dac3151",
    "parts": {
      "symbol": "dac3151irgcr.kicad_sym",
      "footprint": "dac3151irgcr.kicad_mod",
      "model_3d": "dac3151irgcr-hero.glb",
      "model_3d_plain": "dac3151irgcr.glb",
      "model_3d_step": "dac3151irgcr-etched.step",
      "model_3d_step_plain": "dac3151irgcr.step",
      "lbr": "dac3151irgcr.lbr"
    },
    "distributor_links": {
      "lcsc": "C2868025",
      "digikey": "DAC3151IRGCR-ND",
      "mouser": "595-DAC3151IRGCR"
    },
    "distributor_check": {
      "checked_at": "2026-10-08T20:20:51Z",
      "source": "Component Ocean /api/assign-pns",
      "digikey": {
        "pn": "DAC3151IRGCR-ND",
        "status": "found",
        "lifecycle": "Active"
      },
      "mouser": {
        "pn": "595-DAC3151IRGCR",
        "status": "found"
      }
    },
    "pins": [
      {
        "number": "1",
        "name": "DACCLKP",
        "type": "input",
        "description": "Positive LVPECL clock input for the DAC core with a self-bias of approximately CLKVDD18 / 2."
      },
      {
        "number": "2",
        "name": "DACCLKN",
        "type": "input",
        "description": "Negative LVPECL clock input for the DAC core with a self-bias of approximately CLKVDD18 / 2."
      },
      {
        "number": "3",
        "name": "CLKVDD18",
        "type": "power_in",
        "description": "1.8 V clock supply."
      },
      {
        "number": "4",
        "name": "ALIGNP",
        "type": "input",
        "description": "Positive LVPECL FIFO output synchronization input captured with the rising edge of DACCLKP/DACCLKN, used to reset the clock dividers and for multiple DAC synchronization; can be left unconnected if unused."
      },
      {
        "number": "5",
        "name": "ALIGNN",
        "type": "input",
        "description": "Negative LVPECL FIFO output synchronization input captured with the rising edge of DACCLKP/DACCLKN, used to reset the clock dividers and for multiple DAC synchronization; can be left unconnected if unused."
      },
      {
        "number": "6",
        "name": "SYNCP",
        "type": "input",
        "description": "Positive LVDS input to reset the FIFO or to be used as a syncing source, captured with the rising edge of DATACLKP/DATACLKN."
      },
      {
        "number": "7",
        "name": "SYNCN",
        "type": "input",
        "description": "Negative LVDS input to reset the FIFO or to be used as a syncing source, captured with the rising edge of DATACLKP/DATACLKN."
      },
      {
        "number": "8",
        "name": "VFUSE",
        "type": "power_in",
        "description": "1.8 V digital supply that is also used for factory fuse programming; connect to DVDD pins for normal operation."
      },
      {
        "number": "9",
        "name": "D9P",
        "type": "input",
        "description": "LVDS data bit 9 positive (MSB) with internal 100-Ω termination, DDR relative to DATACLK."
      },
      {
        "number": "10",
        "name": "D9N",
        "type": "input",
        "description": "LVDS data bit 9 negative (MSB) with internal 100-Ω termination, DDR relative to DATACLK."
      },
      {
        "number": "11",
        "name": "D8P",
        "type": "input",
        "description": "LVDS data bit 8 positive with internal 100-Ω termination, DDR relative to DATACLK."
      },
      {
        "number": "12",
        "name": "D8N",
        "type": "input",
        "description": "LVDS data bit 8 negative with internal 100-Ω termination, DDR relative to DATACLK."
      },
      {
        "number": "13",
        "name": "D7P",
        "type": "input",
        "description": "LVDS data bit 7 positive with internal 100-Ω termination, DDR relative to DATACLK."
      },
      {
        "number": "14",
        "name": "D7N",
        "type": "input",
        "description": "LVDS data bit 7 negative with internal 100-Ω termination, DDR relative to DATACLK."
      },
      {
        "number": "15",
        "name": "D6P",
        "type": "input",
        "description": "LVDS data bit 6 positive with internal 100-Ω termination, DDR relative to DATACLK."
      },
      {
        "number": "16",
        "name": "D6N",
        "type": "input",
        "description": "LVDS data bit 6 negative with internal 100-Ω termination, DDR relative to DATACLK."
      },
      {
        "number": "17",
        "name": "D5P",
        "type": "input",
        "description": "LVDS data bit 5 positive with internal 100-Ω termination, DDR relative to DATACLK."
      },
      {
        "number": "18",
        "name": "D5N",
        "type": "input",
        "description": "LVDS data bit 5 negative with internal 100-Ω termination, DDR relative to DATACLK."
      },
      {
        "number": "19",
        "name": "D4P",
        "type": "input",
        "description": "LVDS data bit 4 positive with internal 100-Ω termination, DDR relative to DATACLK."
      },
      {
        "number": "20",
        "name": "D4N",
        "type": "input",
        "description": "LVDS data bit 4 negative with internal 100-Ω termination, DDR relative to DATACLK."
      },
      {
        "number": "21",
        "name": "DIGVDD18",
        "type": "power_in",
        "description": "1.8 V digital supply that also supplies the LVDS receivers."
      },
      {
        "number": "22",
        "name": "D3P",
        "type": "input",
        "description": "LVDS data bit 3 positive with internal 100-Ω termination, DDR relative to DATACLK."
      },
      {
        "number": "23",
        "name": "D3N",
        "type": "input",
        "description": "LVDS data bit 3 negative with internal 100-Ω termination, DDR relative to DATACLK."
      },
      {
        "number": "24",
        "name": "DATACLKP",
        "type": "input",
        "description": "Positive DDR differential input data clock with edge-to-center nominal timing; channel A on rising edge, channel B on falling edge."
      },
      {
        "number": "25",
        "name": "DATACLKN",
        "type": "input",
        "description": "Negative DDR differential input data clock with edge-to-center nominal timing; channel A on rising edge, channel B on falling edge."
      },
      {
        "number": "26",
        "name": "D2P",
        "type": "input",
        "description": "LVDS data bit 2 positive with internal 100-Ω termination, DDR relative to DATACLK."
      },
      {
        "number": "27",
        "name": "D2N",
        "type": "input",
        "description": "LVDS data bit 2 negative with internal 100-Ω termination, DDR relative to DATACLK."
      },
      {
        "number": "28",
        "name": "DIGVDD18",
        "type": "power_in",
        "description": "1.8 V digital supply that also supplies the LVDS receivers."
      },
      {
        "number": "29",
        "name": "D1P",
        "type": "input",
        "description": "LVDS data bit 1 positive with internal 100-Ω termination, DDR relative to DATACLK."
      },
      {
        "number": "30",
        "name": "D1N",
        "type": "input",
        "description": "LVDS data bit 1 negative with internal 100-Ω termination, DDR relative to DATACLK."
      },
      {
        "number": "31",
        "name": "D0P",
        "type": "input",
        "description": "LVDS data bit 0 positive (LSB) with internal 100-Ω termination, DDR relative to DATACLK."
      },
      {
        "number": "32",
        "name": "D0N",
        "type": "input",
        "description": "LVDS data bit 0 negative (LSB) with internal 100-Ω termination, DDR relative to DATACLK."
      },
      {
        "number": "33",
        "name": "NC",
        "type": "unconnected",
        "description": "Not used; can be left open or tied to ground, and TI recommends turning off pins 33-40 (register lvdsdata_ena) to save power."
      },
      {
        "number": "34",
        "name": "NC",
        "type": "unconnected",
        "description": "Not used; can be left open or tied to ground, and TI recommends turning off pins 33-40 (register lvdsdata_ena) to save power."
      },
      {
        "number": "35",
        "name": "NC",
        "type": "unconnected",
        "description": "Not used; can be left open or tied to ground, and TI recommends turning off pins 33-40 (register lvdsdata_ena) to save power."
      },
      {
        "number": "36",
        "name": "NC",
        "type": "unconnected",
        "description": "Not used; can be left open or tied to ground, and TI recommends turning off pins 33-40 (register lvdsdata_ena) to save power."
      },
      {
        "number": "37",
        "name": "NC",
        "type": "unconnected",
        "description": "Not used; can be left open or tied to ground, and TI recommends turning off pins 33-40 (register lvdsdata_ena) to save power."
      },
      {
        "number": "38",
        "name": "NC",
        "type": "unconnected",
        "description": "Not used; can be left open or tied to ground, and TI recommends turning off pins 33-40 (register lvdsdata_ena) to save power."
      },
      {
        "number": "39",
        "name": "NC",
        "type": "unconnected",
        "description": "Not used; can be left open or tied to ground, and TI recommends turning off pins 33-40 (register lvdsdata_ena) to save power."
      },
      {
        "number": "40",
        "name": "NC",
        "type": "unconnected",
        "description": "Not used; can be left open or tied to ground, and TI recommends turning off pins 33-40 (register lvdsdata_ena) to save power."
      },
      {
        "number": "41",
        "name": "RESETB",
        "type": "input",
        "description": "Active-low asynchronous serial interface reset that initializes internal registers on the high-to-low transition, with internal pullup; a reset after every power cycle may be needed to restore SPI defaults."
      },
      {
        "number": "42",
        "name": "SDENB",
        "type": "input",
        "description": "Serial data enable with internal pullup."
      },
      {
        "number": "43",
        "name": "SCLK",
        "type": "input",
        "description": "Serial interface clock with internal pulldown."
      },
      {
        "number": "44",
        "name": "SDIO",
        "type": "bidirectional",
        "description": "Bidirectional serial data in 3-pin mode (default) and input only in 4-pin mode, with internal pulldown."
      },
      {
        "number": "45",
        "name": "IOVDD",
        "type": "power_in",
        "description": "Supply voltage for CMOS IOs, 1.8 V to 3.3 V."
      },
      {
        "number": "46",
        "name": "SDO",
        "type": "output",
        "description": "Unidirectional serial data output in 4-pin mode, tri-stated in 3-pin mode (default), with internal pulldown."
      },
      {
        "number": "47",
        "name": "ALARM",
        "type": "output",
        "description": "CMOS output for ALARM condition."
      },
      {
        "number": "48",
        "name": "TXENABLE",
        "type": "input",
        "description": "Active-high transmit enable that must be high for data to reach the DAC; when low the digital logic is forced to all 0 and input data is ignored, with internal pulldown."
      },
      {
        "number": "49",
        "name": "SLEEP",
        "type": "input",
        "description": "Active-high input that puts the device in sleep, with internal pulldown."
      },
      {
        "number": "50",
        "name": "VDDA18",
        "type": "power_in",
        "description": "Analog 1.8 V supply."
      },
      {
        "number": "51",
        "name": "NC",
        "type": "unconnected",
        "description": "Not used; can be left open or tied to ground."
      },
      {
        "number": "52",
        "name": "NC",
        "type": "unconnected",
        "description": "Not used; can be left open or tied to ground."
      },
      {
        "number": "53",
        "name": "NC",
        "type": "unconnected",
        "description": "Not used; can be left open or tied to ground."
      },
      {
        "number": "54",
        "name": "NC",
        "type": "unconnected",
        "description": "Not used; can be left open or tied to ground."
      },
      {
        "number": "55",
        "name": "VDDA33",
        "type": "power_in",
        "description": "Analog 3.3 V supply."
      },
      {
        "number": "56",
        "name": "VDDA33",
        "type": "power_in",
        "description": "Analog 3.3 V supply."
      },
      {
        "number": "57",
        "name": "BIASJ",
        "type": "output",
        "description": "Full-scale output current bias; for 20-mA full-scale output current connect a 960-Ω resistor to GND."
      },
      {
        "number": "58",
        "name": "EXTIO",
        "type": "bidirectional",
        "description": "External reference input when the internal reference is disabled; requires a 0.1-µF decoupling capacitor to GND when used as reference output."
      },
      {
        "number": "59",
        "name": "VDDA33",
        "type": "power_in",
        "description": "Analog 3.3 V supply."
      },
      {
        "number": "60",
        "name": "IOUTAN",
        "type": "output",
        "description": "Negative A-channel DAC current output; 0xFFFF input gives 0 mA source and the least positive voltage on IOUTAP."
      },
      {
        "number": "61",
        "name": "IOUTAP",
        "type": "output",
        "description": "Positive A-channel DAC current output; 0x0000 input gives full-scale current source and the most positive voltage on this pin."
      },
      {
        "number": "62",
        "name": "NC",
        "type": "unconnected",
        "description": "Not used; can be left open or tied to ground."
      },
      {
        "number": "63",
        "name": "NC",
        "type": "unconnected",
        "description": "Not used; can be left open or tied to ground."
      },
      {
        "number": "64",
        "name": "VDDA18",
        "type": "power_in",
        "description": "Analog 1.8 V supply."
      },
      {
        "number": "65",
        "name": "GND",
        "type": "power_in",
        "description": "Ground pad on the backside of the package."
      }
    ],
    "provenance": {
      "extractor": "extract_pins 0.3",
      "factory_chain": {
        "factory": "2.0.0",
        "extractor": "extract_pins 0.3",
        "primary_model": "claude-haiku-5-5",
        "primary_mode": "text",
        "consensus_model": "claude-sonnet-5-5",
        "consensus": "agreed",
        "guards": "pin_guards 0.1: passed",
        "guard_notes": [
          "extractor flagged: Data pin-to-number mapping for DAC3151 (10-bit) was inferred. The printed DATA[9:0] row lists only 1; The DAC3151 datasheet text labels the MSB as DATA13P/DATA13N and LSB as DATA0P/DATA0N in the data-in; The DAC3151 NC row lists pins 33, 34, 39, 40, 51-54, 62, 63 only. Pins 35-38 are NC per the note 'tu",
          "exposed pad 65 added from the footprint"
        ],
        "pages_sent": 19,
        "cost_usd": 0.1646,
        "at": "2026-10-08T20:20:09"
      },
      "datasheet": {
        "url": "https://www.ti.com/cn/lit/gpn/dac3151",
        "pages": 64,
        "sha256": "b35f107ce06f59e4",
        "source_tier": "lcsc"
      },
      "cad": "KiCad official (CC-BY-SA 4.0)",
      "pins": {
        "total": 65,
        "described": 65,
        "cites_pages": true,
        "refuses_to_fabricate": true
      }
    },
    "viewers": {
      "symbol": "viewers/symbol.html",
      "footprint": "viewers/footprint.html"
    },
    "models_3d": [
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        "role": "plain",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          9.0,
          9.0,
          0.75
        ],
        "zmin_mm": 0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "dce07a86ec3fe3ca87eebdff13827f55e036ced5518fee01f85cec4a3f56366d",
        "checked": "2026-10-08",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      },
      {
        "file": "dac3151irgcr-etched.step",
        "role": "eda",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
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        "zmin_mm": 0.0,
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        "sha256": "19c6decb3f1c6d1f3fbb6454da245b70913a4a9dbe1fbf8485b49ea90eead560",
        "checked": "2026-10-08",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      }
    ]
  }
}