component
CY8C4246PVI-DS402
Public Made by Adomby adom
Cypress Semicon Pre-ordered Products, SSOP-28. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
main
Ray
Publish 0.1.0
54a10d6
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{
"slug": "cy8c4246pvi-ds402",
"version": "0.1.0",
"type": "component",
"description": "Cypress Semicon Pre-ordered Products, SSOP-28. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
"tags": [
"component",
"solders - accessories - batteries",
"cy8c4246pvi-ds402",
"factory-2.0.0",
"extractor-text"
],
"dependencies": {},
"hero": {
"type": "image",
"path": "docs/hero.png"
},
"files": [
"page.json",
"README.md",
"cy8c4246pvi-ds402.kicad_sym",
"cy8c4246pvi-ds402.kicad_mod",
"cy8c4246pvi-ds402.glb",
"cy8c4246pvi-ds402.step",
"cy8c4246pvi-ds402.lbr",
"docs/hero.png",
"docs/cy8c4246pvi-ds402-datasheet.pdf",
"viewers/symbol.html",
"viewers/footprint.html",
"cy8c4246pvi-ds402-hero.glb",
"cy8c4246pvi-ds402-hero.overlay.json",
"cy8c4246pvi-ds402-etched.glb"
],
"component": {
"mpn": "CY8C4246PVI-DS402",
"manufacturer": "Cypress Semicon",
"package": "SSOP-28",
"pin_count": 28,
"category": "Solders / Accessories / Batteries",
"subcategory": "Pre-ordered Products",
"datasheet": "https://datasheet.lcsc.com/datasheet/pdf/e9961a6ba5d5fbf2ed7d117245b5a13e.pdf",
"parts": {
"symbol": "cy8c4246pvi-ds402.kicad_sym",
"footprint": "cy8c4246pvi-ds402.kicad_mod",
"model_3d": "cy8c4246pvi-ds402-hero.glb",
"model_3d_plain": "cy8c4246pvi-ds402-etched.glb",
"model_3d_step": "cy8c4246pvi-ds402-etched.step",
"model_3d_step_plain": "cy8c4246pvi-ds402.step",
"lbr": "cy8c4246pvi-ds402.lbr"
},
"distributor_links": {
"lcsc": "C2956623",
"digikey": "448-CY8C4246PVI-DS402-ND",
"mouser": "727-CY8C4246PVIDS402"
},
"distributor_check": {
"checked_at": "2026-10-31T12:23:19Z",
"source": "Component Ocean /api/assign-pns",
"digikey": {
"pn": "448-CY8C4246PVI-DS402-ND",
"status": "found",
"lifecycle": "Obsolete"
},
"mouser": {
"pn": "727-CY8C4246PVIDS402",
"status": "found",
"lifecycle": "Obsolete"
}
},
"pins": [
{
"number": "1",
"name": "P1.0",
"type": "bidirectional",
"description": "GPIO port 1 bit 0 with alternate functions TCPWM2 line, SCB0 UART RX, I2C SCL or SPI MOSI."
},
{
"number": "2",
"name": "P1.1",
"type": "bidirectional",
"description": "GPIO port 1 bit 1 with alternate functions TCPWM2 complementary line, SCB0 UART TX, I2C SDA or SPI MISO."
},
{
"number": "3",
"name": "P1.2",
"type": "bidirectional",
"description": "GPIO port 1 bit 2 with alternate functions TCPWM3 line, SCB0 UART CTS or SPI clock."
},
{
"number": "4",
"name": "P1.3",
"type": "bidirectional",
"description": "GPIO port 1 bit 3 with alternate functions TCPWM3 complementary line, SCB0 UART RTS or SPI select0."
},
{
"number": "5",
"name": "P2.2",
"type": "bidirectional",
"description": "GPIO port 2 bit 2 with PRGIO io[2] and SCB2 UART RX, I2C SCL or SPI MOSI."
},
{
"number": "6",
"name": "P2.3",
"type": "bidirectional",
"description": "GPIO port 2 bit 3 with PRGIO io[3] and SCB2 UART TX, I2C SDA or SPI MISO."
},
{
"number": "7",
"name": "P2.4",
"type": "bidirectional",
"description": "GPIO port 2 bit 4 with PRGIO io[4], TCPWM0 line, SCB2 UART CTS or SPI clock, and lpcomp comp[0] output."
},
{
"number": "8",
"name": "P2.5",
"type": "bidirectional",
"description": "GPIO port 2 bit 5 with PRGIO io[5], TCPWM0 complementary line, SCB2 UART RTS or SPI select0."
},
{
"number": "9",
"name": "P2.6",
"type": "bidirectional",
"description": "GPIO port 2 bit 6 with PRGIO io[6], TCPWM1 line or SCB2 SPI select1."
},
{
"number": "10",
"name": "P2.7",
"type": "bidirectional",
"description": "GPIO port 2 bit 7 with PRGIO io[7], TCPWM1 complementary line or SCB2 SPI select2."
},
{
"number": "11",
"name": "P3.0",
"type": "bidirectional",
"description": "GPIO port 3 bit 0 with TCPWM0 line and SCB1 UART RX, I2C SCL or SPI MOSI."
},
{
"number": "12",
"name": "P3.1",
"type": "bidirectional",
"description": "GPIO port 3 bit 1 with TCPWM0 complementary line and SCB1 UART TX, I2C SDA or SPI MISO."
},
{
"number": "13",
"name": "P3.2",
"type": "bidirectional",
"description": "GPIO port 3 bit 2 with TCPWM1 line, SCB1 UART CTS or SPI clock, and SWD_IO (swd_data)."
},
{
"number": "14",
"name": "P3.3",
"type": "bidirectional",
"description": "GPIO port 3 bit 3 with TCPWM1 complementary line, SCB1 UART RTS or SPI select0, and SWD_CLK (swd_clk)."
},
{
"number": "15",
"name": "P3.4",
"type": "bidirectional",
"description": "GPIO port 3 bit 4 with SCB1 SPI select1 alternate function."
},
{
"number": "16",
"name": "NC",
"type": "unconnected",
"description": "No-connect in the 28-pin SSOP package."
},
{
"number": "17",
"name": "NC",
"type": "unconnected",
"description": "No-connect in the 28-pin SSOP package."
},
{
"number": "18",
"name": "NC",
"type": "unconnected",
"description": "No-connect in the 28-pin SSOP package."
},
{
"number": "19",
"name": "P0.0",
"type": "bidirectional",
"description": "GPIO port 0 bit 0 with lpcomp in_p[0] analog input, TCPWM2 line or SCB0 SPI select1."
},
{
"number": "20",
"name": "P0.1",
"type": "bidirectional",
"description": "GPIO port 0 bit 1 with lpcomp in_n[0] analog input, TCPWM2 complementary line or SCB0 SPI select2."
},
{
"number": "21",
"name": "P0.2",
"type": "bidirectional",
"description": "GPIO port 0 bit 2 with TCPWM3 line or SCB0 SPI select3."
},
{
"number": "22",
"name": "P0.4",
"type": "bidirectional",
"description": "GPIO port 0 bit 4 with SCB1 UART RX, I2C SCL or SPI MOSI."
},
{
"number": "23",
"name": "P0.5",
"type": "bidirectional",
"description": "GPIO port 0 bit 5 with SCB1 UART TX, I2C SDA or SPI MISO."
},
{
"number": "24",
"name": "P0.6",
"type": "bidirectional",
"description": "GPIO port 0 bit 6 with external clock input, SCB1 UART CTS or SPI clock."
},
{
"number": "25",
"name": "XRES",
"type": "input",
"description": "Dedicated external reset pin reserved to avoid configuration conflicts with multiple pin functions during power-on or reconfiguration."
},
{
"number": "26",
"name": "VCCD",
"type": "power_out",
"description": "Regulated digital supply output, 1.8 V ±5% if supplied externally, bypassed with a 0.1-µF ceramic capacitor to VSS."
},
{
"number": "27",
"name": "VDDD",
"type": "power_in",
"description": "Power supply for the chip, 1.71 to 5.5 V, bypassed with 0.1-µF ceramic at each pin plus a 1 to 10 µF bulk capacitor."
},
{
"number": "28",
"name": "VSSD",
"type": "power_in",
"description": "Ground pin."
}
],
"provenance": {
"extractor": "extract_pins 0.3",
"factory_chain": {
"factory": "2.0.0",
"extractor": "extract_pins 0.3",
"primary_model": "claude-sonnet-5-5",
"primary_mode": "text",
"consensus_model": "claude-sonnet-5-5",
"consensus": "agreed",
"guards": "pin_guards 0.1: passed",
"guard_notes": [
"extractor flagged: Table 1 pin description column for VDDD and VSSD appears swapped (pin 27 VDDD listed as 'Ground', pi; VCCD is a regulator output but can also be supplied externally (1.8 V ±5%, shorted to VDDD in regula; Datasheet revision history notes the 28-pin SSOP was removed in rev *A and re-added in *C; pin-to-fu"
],
"pages_sent": 14,
"cost_usd": 0.1915,
"at": "2026-10-31T12:22:58"
},
"datasheet": {
"url": "https://datasheet.lcsc.com/datasheet/pdf/e9961a6ba5d5fbf2ed7d117245b5a13e.pdf",
"pages": 29,
"sha256": "7313ee9c00c7c45d",
"source_tier": "lcsc"
},
"cad": "KiCad official (CC-BY-SA 4.0)",
"pins": {
"total": 28,
"described": 28,
"cites_pages": true,
"refuses_to_fabricate": true
}
},
"viewers": {
"symbol": "viewers/symbol.html",
"footprint": "viewers/footprint.html"
},
"models_3d": [
{
"file": "cy8c4246pvi-ds402.step",
"role": "plain",
"up": "Z",
"units": "mm",
"origin": "footprint origin = pad-pattern centre",
"seat": "z = 0",
"extents_mm": [
7.8,
10.2,
2.1
],
"zmin_mm": 0.0,
"centre_offset_mm": 0.0,
"footprint_binding": "identity",
"sha256": "7aa76979ae41da44bded1ed74115012868f2f3f5a757faf32bb9df4f92c1e313",
"checked": "2026-10-31",
"checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
},
{
"file": "cy8c4246pvi-ds402-etched.step",
"role": "eda",
"up": "Z",
"units": "mm",
"origin": "footprint origin = pad-pattern centre",
"seat": "z = 0",
"extents_mm": [
7.8,
10.2,
2.1
],
"zmin_mm": 0.0,
"centre_offset_mm": 0.0,
"footprint_binding": "identity",
"sha256": "5ebfcd2ff5d808e701a39e2515164816ebdf3715f74caa8bc302e42feed590aa",
"checked": "2026-10-31",
"checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
}
],
"package_dims": {
"package_code": "PV (28-pin SSOP, dwg 51-85079)",
"source_page": 23,
"e": {
"nom_mm": 0.65,
"range_mm": [
null,
null
]
},
"A": {
"nom_mm": 2.0,
"range_mm": [
null,
null
]
},
"source": "datasheet package drawing, every number found on its page (extract_pins --task dims)",
"model_check": {
"file": "cy8c4246pvi-ds402.step",
"verdict": "PASS",
"reasons": [
"height within the datasheet's package drawing"
],
"by": "factory/package_fit.py"
}
}
}
}