component
CY8C4246AZI-L433
Public Made by Adomby adom
Cypress Semicon Microcontroller Units (MCUs/MPUs/SOCs), TQFP-48(7x7). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
main
Ray
Publish 0.1.0
47e90b3
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{
"slug": "cy8c4246azi-l433",
"version": "0.1.0",
"type": "component",
"description": "Cypress Semicon Microcontroller Units (MCUs/MPUs/SOCs), TQFP-48(7x7). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
"tags": [
"component",
"single chip microcomputer-microcontroller",
"cy8c4246azi-l433",
"factory-2.0.0",
"extractor-text"
],
"dependencies": {},
"hero": {
"type": "image",
"path": "docs/hero.png"
},
"files": [
"page.json",
"README.md",
"cy8c4246azi-l433.kicad_sym",
"cy8c4246azi-l433.kicad_mod",
"cy8c4246azi-l433.glb",
"cy8c4246azi-l433.step",
"cy8c4246azi-l433.lbr",
"docs/hero.png",
"docs/cy8c4246azi-l433-datasheet.pdf",
"viewers/symbol.html",
"viewers/footprint.html",
"cy8c4246azi-l433-hero.glb",
"cy8c4246azi-l433-hero.overlay.json",
"cy8c4246azi-l433-etched.glb"
],
"component": {
"mpn": "CY8C4246AZI-L433",
"manufacturer": "Cypress Semicon",
"package": "TQFP-48(7x7)",
"pin_count": 48,
"category": "Single Chip Microcomputer/Microcontroller",
"subcategory": "Microcontroller Units (MCUs/MPUs/SOCs)",
"datasheet": "https://www.infineon.com/dgdl/Infineon-PSoC_4_PSoC_4200L_Family-DataSheet-v12_00-EN.pdf?fileId=8ac78c8c7d0d8da4017d0ed894aa5a14&utm_source=cypress&utm_medium=referral&utm_campaign=202110_globe_en_all_integration-files",
"parts": {
"symbol": "cy8c4246azi-l433.kicad_sym",
"footprint": "cy8c4246azi-l433.kicad_mod",
"model_3d": "cy8c4246azi-l433-hero.glb",
"model_3d_plain": "cy8c4246azi-l433-etched.glb",
"model_3d_step": "cy8c4246azi-l433-etched.step",
"model_3d_step_plain": "cy8c4246azi-l433.step",
"lbr": "cy8c4246azi-l433.lbr"
},
"distributor_links": {
"lcsc": "C2944636",
"digikey": "448-CY8C4246AZI-L433-ND",
"mouser": "727-CY8C4246AZI-L433"
},
"distributor_check": {
"checked_at": "2026-10-31T00:56:46Z",
"source": "Component Ocean /api/assign-pns",
"digikey": {
"pn": "448-CY8C4246AZI-L433-ND",
"status": "found"
},
"mouser": {
"pn": "727-CY8C4246AZI-L433",
"status": "found"
}
},
"pins": [
{
"number": "1",
"name": "P1.7/VREF",
"type": "bidirectional",
"description": "GPIO P1.7, which also carries CTB0 pad 7 and the external SAR reference input sar_ext_vref (Table 2)."
},
{
"number": "2",
"name": "P2.0",
"type": "bidirectional",
"description": "GPIO P2.0 with analog input sarmux_pads[0] to the SAR ADC mux, plus SCB1 UART RX / I2C SCL / SPI MOSI alternates."
},
{
"number": "3",
"name": "P2.1",
"type": "bidirectional",
"description": "GPIO P2.1 with analog input sarmux_pads[1] to the SAR ADC mux, plus SCB1 UART TX / I2C SDA / SPI MISO alternates."
},
{
"number": "4",
"name": "P2.2",
"type": "bidirectional",
"description": "GPIO P2.2 with analog input sarmux_pads[2] to the SAR ADC mux, plus SCB1 UART CTS / SPI CLK alternates."
},
{
"number": "5",
"name": "P2.3",
"type": "bidirectional",
"description": "GPIO P2.3 with analog input sarmux_pads[3] to the SAR ADC mux, plus SCB1 UART RTS / SPI SELECT0 alternates."
},
{
"number": "6",
"name": "P2.4",
"type": "bidirectional",
"description": "GPIO P2.4 with analog input sarmux_pads[4] to the SAR ADC mux, plus TCPWM line[0] and SCB1 SPI SELECT1 alternates."
},
{
"number": "7",
"name": "P2.5",
"type": "bidirectional",
"description": "GPIO P2.5 with analog input sarmux_pads[5] to the SAR ADC mux, plus TCPWM line_compl[0] and SCB1 SPI SELECT2 alternates."
},
{
"number": "8",
"name": "P2.6",
"type": "bidirectional",
"description": "GPIO P2.6 with analog input sarmux_pads[6] to the SAR ADC mux, plus TCPWM line[1] and SCB1 SPI SELECT3 alternates."
},
{
"number": "9",
"name": "P2.7",
"type": "bidirectional",
"description": "GPIO P2.7 with analog input sarmux_pads[7] to the SAR ADC mux, plus TCPWM line_compl[1] alternate."
},
{
"number": "10",
"name": "VSSD",
"type": "power_in",
"description": "Ground pin for the digital section."
},
{
"number": "11",
"name": "NC",
"type": "unconnected",
"description": "No connect on the 48-pin TQFP packages."
},
{
"number": "12",
"name": "P3.0",
"type": "bidirectional",
"description": "GPIO P3.0 with TCPWM line[0] and SCB1 UART RX / I2C SCL / SPI MOSI alternates."
},
{
"number": "13",
"name": "P3.1",
"type": "bidirectional",
"description": "GPIO P3.1 with TCPWM line_compl[0] and SCB1 UART TX / I2C SDA / SPI MISO alternates."
},
{
"number": "14",
"name": "P3.2",
"type": "bidirectional",
"description": "GPIO P3.2 with TCPWM line[1], SCB1 UART CTS / SPI CLK, and the cpuss.swd_data alternate."
},
{
"number": "15",
"name": "NC",
"type": "unconnected",
"description": "No connect on the 48-pin TQFP packages."
},
{
"number": "16",
"name": "P3.3",
"type": "bidirectional",
"description": "GPIO P3.3 with TCPWM line_compl[1], SCB1 UART RTS / SPI SELECT0, and the cpuss.swd_clk alternate."
},
{
"number": "17",
"name": "P3.4",
"type": "bidirectional",
"description": "GPIO P3.4 with TCPWM line[2] and SCB1 SPI SELECT1 alternates."
},
{
"number": "18",
"name": "P3.5",
"type": "bidirectional",
"description": "GPIO P3.5 with TCPWM line_compl[2] and SCB1 SPI SELECT2 alternates."
},
{
"number": "19",
"name": "P3.6",
"type": "bidirectional",
"description": "GPIO P3.6 with TCPWM line[3] and SCB1 SPI SELECT3 alternates."
},
{
"number": "20",
"name": "P3.7",
"type": "bidirectional",
"description": "GPIO P3.7 with TCPWM line_compl[3] alternate."
},
{
"number": "21",
"name": "VDDIO",
"type": "power_in",
"description": "I/O pin power domain; it should not be present without VDDD."
},
{
"number": "22",
"name": "P4.0",
"type": "bidirectional",
"description": "GPIO P4.0 with SCB0 UART RX / I2C SCL / SPI MOSI and CAN0 RX alternates."
},
{
"number": "23",
"name": "D+/P13.0",
"type": "bidirectional",
"description": "USB full-speed D+ data line (USBDP) on GPIO P13.0; Port 13 pins require VBUS (P13.2) to be powered."
},
{
"number": "24",
"name": "D-/P13.1",
"type": "bidirectional",
"description": "USB full-speed D- data line (USBDM) on GPIO P13.1; Port 13 pins require VBUS (P13.2) to be powered."
},
{
"number": "25",
"name": "VBUS/P13.2",
"type": "power_in",
"description": "USB VBUS input, typically 5 V (4.35 V to 5.5 V range), with no constraint relative to VDDD; it must be powered for Port 13 operation."
},
{
"number": "26",
"name": "P7.0",
"type": "bidirectional",
"description": "GPIO P7.0 with ECO input srss.eco_in, TCPWM line[0] and SCB3 UART RX / I2C SCL / SPI MOSI alternates."
},
{
"number": "27",
"name": "P7.1",
"type": "bidirectional",
"description": "GPIO P7.1 with ECO output srss.eco_out, TCPWM line_compl[0] and SCB3 UART TX / I2C SDA / SPI MISO alternates."
},
{
"number": "28",
"name": "P0.0",
"type": "bidirectional",
"description": "GPIO P0.0 with analog input lpcomp.in_p[0] and alternates can[1].can_rx and usb.vbus_valid."
},
{
"number": "29",
"name": "P0.1",
"type": "bidirectional",
"description": "GPIO P0.1 with analog input lpcomp.in_n[0] and alternates can[1].can_tx and scb[0].spi_select2."
},
{
"number": "30",
"name": "P0.2",
"type": "bidirectional",
"description": "GPIO P0.2 with analog input lpcomp.in_p[1] and alternate scb[0].spi_select3."
},
{
"number": "31",
"name": "P0.3",
"type": "bidirectional",
"description": "GPIO P0.3 with analog input lpcomp.in_n[1]."
},
{
"number": "32",
"name": "P0.4",
"type": "bidirectional",
"description": "GPIO P0.4 with watch crystal input wco_in and SCB1 UART RX / I2C SCL / SPI MOSI alternates."
},
{
"number": "33",
"name": "P0.5",
"type": "bidirectional",
"description": "GPIO P0.5 with watch crystal output wco_out and SCB1 UART TX / I2C SDA / SPI MISO alternates."
},
{
"number": "34",
"name": "P0.6",
"type": "bidirectional",
"description": "GPIO P0.6 with external clock input srss.ext_clk and SCB1 UART CTS / SPI CLK alternates."
},
{
"number": "35",
"name": "P0.7",
"type": "bidirectional",
"description": "GPIO P0.7 with SCB1 UART RTS, CAN1 tx_enb_n, srss.wakeup and SCB1 SPI SELECT0 alternates."
},
{
"number": "36",
"name": "XRES",
"type": "input",
"description": "External reset pin, reserved for external reset to avoid configuration and multiple-pin-function conflicts during power-on or reconfiguration."
},
{
"number": "37",
"name": "VCCD",
"type": "power_out",
"description": "Regulated digital supply of 1.8 V ±5%; in unregulated supply mode it must be bypassed to ground with an external 1 µF to 1.6 µF X5R ceramic capacitor."
},
{
"number": "38",
"name": "VSSD",
"type": "power_in",
"description": "Ground pin for the digital section."
},
{
"number": "39",
"name": "VDDD",
"type": "power_in",
"description": "Power supply for both analog and digital sections where there is no VDDA pin, operating over 1.71 V to 5.5 V."
},
{
"number": "40",
"name": "VDDA",
"type": "power_in",
"description": "Analog VDD pin where package pins allow; it should be present before or concurrently with VDDD and be equal to or higher than VDDD and VDDIO."
},
{
"number": "41",
"name": "VSSA",
"type": "power_in",
"description": "Analog ground pin where package pins allow; shorted to VSS otherwise."
},
{
"number": "42",
"name": "P1.0",
"type": "bidirectional",
"description": "GPIO P1.0 with CTB0 pad 0, TCPWM line[2] and SCB0 UART RX / I2C SCL / SPI MOSI alternates."
},
{
"number": "43",
"name": "P1.1",
"type": "bidirectional",
"description": "GPIO P1.1 with CTB0 pad 1, TCPWM line_compl[2] and SCB0 UART TX / I2C SDA / SPI MISO alternates."
},
{
"number": "44",
"name": "P1.2",
"type": "bidirectional",
"description": "GPIO P1.2 with CTB0 pad 2, CTB0 OA0 output (10x), TCPWM line[3] and SCB0 UART CTS / SPI CLK alternates."
},
{
"number": "45",
"name": "P1.3",
"type": "bidirectional",
"description": "GPIO P1.3 with CTB0 pad 3, CTB0 OA1 output (10x), TCPWM line_compl[3] and SCB0 UART RTS / SPI SELECT0 alternates."
},
{
"number": "46",
"name": "P1.4",
"type": "bidirectional",
"description": "GPIO P1.4 with CTB0 pad 4, TCPWM line[6] and SCB0 SPI SELECT1 alternates."
},
{
"number": "47",
"name": "P1.5",
"type": "bidirectional",
"description": "GPIO P1.5 with CTB0 pad 5, TCPWM line_compl[6] and SCB0 SPI SELECT2 alternates."
},
{
"number": "48",
"name": "P1.6",
"type": "bidirectional",
"description": "GPIO P1.6 with CTB0 pad 6, TCPWM line[7] and SCB0 SPI SELECT3 alternates."
}
],
"provenance": {
"extractor": "extract_pins 0.3",
"factory_chain": {
"factory": "2.0.0",
"extractor": "extract_pins 0.3",
"primary_model": "claude-haiku-5-5",
"primary_mode": "text",
"consensus_model": "claude-sonnet-5-5",
"consensus": "agreed",
"guards": "pin_guards 0.1: passed",
"guard_notes": [
"extractor flagged: Package variant choice: the ordering table (Table 51) lists CY8C4246AZI-L433 as 48-pin TQFP with USB; VCCD (pin 37) is typed power_out because the datasheet describes it as the internal regulator output; Pins 11 and 15 are listed as NC for the 48-pin TQFP packages, so they are included as unconnected ra",
"9/48 pins cited to the wrong page (name found elsewhere): ['8:P2.6@p22', '21:VDDIO@p25', '37:VCCD@p26', '42:P1.0@p22']"
],
"pages_sent": 26,
"cost_usd": 0.1651,
"at": "2026-10-31T00:56:34"
},
"datasheet": {
"url": "https://www.infineon.com/dgdl/Infineon-PSoC_4_PSoC_4200L_Family-DataSheet-v12_00-EN.pdf?fileId=8ac78c8c7d0d8da4017d0ed894aa5a14&utm_source=cypress&utm_medium=referral&utm_campaign=202110_globe_en_all_integration-files",
"pages": 72,
"sha256": "f1b627a0d51ff44b",
"source_tier": "mfr"
},
"cad": "KiCad official (CC-BY-SA 4.0)",
"pins": {
"total": 48,
"described": 48,
"cites_pages": true,
"refuses_to_fabricate": true
}
},
"viewers": {
"symbol": "viewers/symbol.html",
"footprint": "viewers/footprint.html"
},
"models_3d": [
{
"file": "cy8c4246azi-l433.step",
"role": "plain",
"up": "Z",
"units": "mm",
"origin": "footprint origin = pad-pattern centre",
"seat": "z = 0",
"extents_mm": [
9.0,
9.0,
1.1
],
"zmin_mm": -0.0,
"centre_offset_mm": 0.0,
"footprint_binding": "identity",
"sha256": "14ca7676e4932e92f0eca0c6d56ce3018cd28a2531204a70ab7bbacb3eeb3cf5",
"checked": "2026-10-31",
"checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
},
{
"file": "cy8c4246azi-l433-etched.step",
"role": "eda",
"up": "Z",
"units": "mm",
"origin": "footprint origin = pad-pattern centre",
"seat": "z = 0",
"extents_mm": [
9.0,
9.0,
1.1
],
"zmin_mm": -0.0,
"centre_offset_mm": 0.0,
"footprint_binding": "identity",
"sha256": "c06787b0a9f9012d5de4e28c35c31eb2752bbc2da56d606e67086f58d8f23432",
"checked": "2026-10-31",
"checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
}
]
}
}