component
CY8C4146AZI-S423
Public Made by Adomby adom
Infineon Cypress Semicon Microcontrollers (MCU/MPU/SOC), TQFP-48(7x7). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
main
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{
"slug": "cy8c4146azi-s423",
"version": "0.1.0",
"type": "component",
"description": "Infineon Cypress Semicon Microcontrollers (MCU/MPU/SOC), TQFP-48(7x7). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
"tags": [
"component",
"embedded processors & controllers",
"cy8c4146azi-s423",
"factory-2.0.0",
"extractor-text"
],
"dependencies": {},
"hero": {
"type": "image",
"path": "docs/hero.png"
},
"files": [
"page.json",
"README.md",
"cy8c4146azi-s423.kicad_sym",
"cy8c4146azi-s423.kicad_mod",
"cy8c4146azi-s423.glb",
"cy8c4146azi-s423.step",
"cy8c4146azi-s423.lbr",
"docs/hero.png",
"docs/cy8c4146azi-s423-datasheet.pdf",
"viewers/symbol.html",
"viewers/footprint.html",
"cy8c4146azi-s423-hero.glb",
"cy8c4146azi-s423-hero.overlay.json",
"cy8c4146azi-s423-etched.glb"
],
"component": {
"mpn": "CY8C4146AZI-S423",
"manufacturer": "Infineon Cypress Semicon",
"package": "TQFP-48(7x7)",
"pin_count": 48,
"category": "Embedded Processors & Controllers",
"subcategory": "Microcontrollers (MCU/MPU/SOC)",
"datasheet": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8590221893111480321",
"parts": {
"symbol": "cy8c4146azi-s423.kicad_sym",
"footprint": "cy8c4146azi-s423.kicad_mod",
"model_3d": "cy8c4146azi-s423-hero.glb",
"model_3d_plain": "cy8c4146azi-s423-etched.glb",
"model_3d_step": "cy8c4146azi-s423-etched.step",
"model_3d_step_plain": "cy8c4146azi-s423.step",
"lbr": "cy8c4146azi-s423.lbr"
},
"distributor_links": {
"lcsc": "C2959108",
"digikey": "448-CY8C4146AZI-S423-ND"
},
"distributor_check": {
"checked_at": "2026-10-18T23:38:22Z",
"source": "Component Ocean /api/assign-pns",
"digikey": {
"pn": "448-CY8C4146AZI-S423-ND",
"status": "found"
},
"mouser": {
"pn": null,
"status": "quota"
}
},
"pins": [
{
"number": "1",
"name": "P1.7/VREF",
"type": "bidirectional",
"description": "GPIO port 1 bit 7 (all port pins support GPIO), also usable as SAR external reference via sar_ext_vref0/sar_ext_vref1 and alternate functions ctb0_oa1+ and scb[2].spi_clk per Table 2."
},
{
"number": "2",
"name": "P2.0",
"type": "bidirectional",
"description": "GPIO port 2 bit 0, also SAR mux input sarmux[0], SmartIO[0].io[0], csd.comp, and scb[1] I2C/SPI alternate functions per Table 2."
},
{
"number": "3",
"name": "P2.1",
"type": "bidirectional",
"description": "GPIO port 2 bit 1, also SAR mux input sarmux[1], SmartIO[0].io[1], tcpwm.tr_in[5], and scb[1] I2C/SPI alternate functions per Table 2."
},
{
"number": "4",
"name": "P2.2",
"type": "bidirectional",
"description": "GPIO port 2 bit 2, also SAR mux input sarmux[2], SmartIO[0].io[2], and scb[1].spi_clk:2 per Table 2."
},
{
"number": "5",
"name": "P2.3",
"type": "bidirectional",
"description": "GPIO port 2 bit 3, also SAR mux input sarmux[3], SmartIO[0].io[3], and scb[1].spi_select0:2 per Table 2."
},
{
"number": "6",
"name": "P2.4",
"type": "bidirectional",
"description": "GPIO port 2 bit 4, also SAR mux input sarmux[4], SmartIO[0].io[4], tcpwm.line[0]:1, and scb[1].spi_select1:1 per Table 2."
},
{
"number": "7",
"name": "P2.5",
"type": "bidirectional",
"description": "GPIO port 2 bit 5, also SAR mux input sarmux[5], SmartIO[0].io[5], tcpwm.line_compl[0]:1, and scb[1].spi_select2:1 per Table 2."
},
{
"number": "8",
"name": "P2.6",
"type": "bidirectional",
"description": "GPIO port 2 bit 6, also SAR mux input sarmux[6], SmartIO[0].io[6], tcpwm.line[1]:1, and scb[1].spi_select3:1 per Table 2."
},
{
"number": "9",
"name": "P2.7",
"type": "bidirectional",
"description": "GPIO port 2 bit 7, also SAR mux input sarmux[7], SmartIO[0].io[7], lpcomp.comp[0]:1, and scb[2].spi_mosi per Table 2."
},
{
"number": "10",
"name": "VSSD",
"type": "power_in",
"description": "Ground pin for the digital section."
},
{
"number": "11",
"name": "NC",
"type": "unconnected",
"description": "No connect on the 48-pin TQFP package."
},
{
"number": "12",
"name": "P3.0",
"type": "bidirectional",
"description": "GPIO port 3 bit 0, also SmartIO[1].io[0], tcpwm.line[0]:0, and scb[1] UART/I2C/SPI alternate functions per Table 2."
},
{
"number": "13",
"name": "P3.1",
"type": "bidirectional",
"description": "GPIO port 3 bit 1, also SmartIO[1].io[1], tcpwm.line_compl[0]:0, and scb[1] UART/I2C/SPI alternate functions per Table 2."
},
{
"number": "14",
"name": "P3.2",
"type": "bidirectional",
"description": "GPIO port 3 bit 2, also SmartIO[1].io[2], tcpwm.line[1]:0, cpuss.swd_data, and scb[1] UART/SPI alternate functions per Table 2."
},
{
"number": "15",
"name": "NC",
"type": "unconnected",
"description": "No connect on the 48-pin TQFP package."
},
{
"number": "16",
"name": "P3.3",
"type": "bidirectional",
"description": "GPIO port 3 bit 3, also SmartIO[1].io[3], tcpwm.line_compl[1]:0, cpuss.swd_clk, and scb[1] UART/SPI alternate functions per Table 2."
},
{
"number": "17",
"name": "P3.4",
"type": "bidirectional",
"description": "GPIO port 3 bit 4, also SmartIO[1].io[4], tcpwm.line[2]:0, tcpwm.tr_in[6], and scb[1].spi_select1:0 per Table 2."
},
{
"number": "18",
"name": "P3.5",
"type": "bidirectional",
"description": "GPIO port 3 bit 5, also SmartIO[1].io[5], tcpwm.line_compl[2]:0, and scb[1].spi_select2:0 per Table 2."
},
{
"number": "19",
"name": "P3.6",
"type": "bidirectional",
"description": "GPIO port 3 bit 6, also SmartIO[1].io[6], tcpwm.line[3]:0, and scb[1].spi_select3:0 per Table 2."
},
{
"number": "20",
"name": "P3.7",
"type": "bidirectional",
"description": "GPIO port 3 bit 7, also SmartIO[1].io[7], tcpwm.line_compl[3]:0, lpcomp.comp[1]:1, and scb[2].spi_miso per Table 2."
},
{
"number": "21",
"name": "VDDD",
"type": "power_in",
"description": "Power supply for the digital section."
},
{
"number": "22",
"name": "P4.0",
"type": "bidirectional",
"description": "GPIO port 4 bit 0, also csd.vref_ext, scb[0].uart_rx:0, scb[0].i2c_scl:1, and scb[0].spi_mosi:0 per Table 2."
},
{
"number": "23",
"name": "P4.1",
"type": "bidirectional",
"description": "GPIO port 4 bit 1, also csd.cshieldpads, scb[0].uart_tx:0, scb[0].i2c_sda:1, and scb[0].spi_miso:0 per Table 2."
},
{
"number": "24",
"name": "P4.2",
"type": "bidirectional",
"description": "GPIO port 4 bit 2, also csd.cmodpad, scb[0].uart_cts:0, lpcomp.comp[0]:0, and scb[0].spi_clk:0 per Table 2."
},
{
"number": "25",
"name": "P4.3",
"type": "bidirectional",
"description": "GPIO port 4 bit 3, also csd.csh_tank, scb[0].uart_rts:0, lpcomp.comp[1]:0, and scb[0].spi_select0:0 per Table 2."
},
{
"number": "26",
"name": "NC",
"type": "unconnected",
"description": "No connect on the 48-pin TQFP package."
},
{
"number": "27",
"name": "NC",
"type": "unconnected",
"description": "No connect on the 48-pin TQFP package."
},
{
"number": "28",
"name": "P0.0",
"type": "bidirectional",
"description": "GPIO port 0 bit 0, also lpcomp.in_p[0], tcpwm.tr_in[0], scb[2].i2c_scl:0, and scb[0].spi_select1:0 per Table 2."
},
{
"number": "29",
"name": "P0.1",
"type": "bidirectional",
"description": "GPIO port 0 bit 1, also lpcomp.in_n[0], tcpwm.tr_in[1], scb[2].i2c_sda:0, and scb[0].spi_select2:0 per Table 2."
},
{
"number": "30",
"name": "P0.2",
"type": "bidirectional",
"description": "GPIO port 0 bit 2, also lpcomp.in_p[1] and scb[0].spi_select3:0 per Table 2."
},
{
"number": "31",
"name": "P0.3",
"type": "bidirectional",
"description": "GPIO port 0 bit 3, also lpcomp.in_n[1] and scb[2].spi_select0 per Table 2."
},
{
"number": "32",
"name": "P0.4",
"type": "bidirectional",
"description": "GPIO port 0 bit 4, also wco.wco_in, scb[1].uart_rx:0, scb[2].uart_rx:0, scb[1].i2c_scl:0, and scb[1].spi_mosi:1 per Table 2."
},
{
"number": "33",
"name": "P0.5",
"type": "bidirectional",
"description": "GPIO port 0 bit 5, also wco.wco_out, scb[1].uart_tx:0, scb[2].uart_tx:0, scb[1].i2c_sda:0, and scb[1].spi_miso:1 per Table 2."
},
{
"number": "34",
"name": "P0.6",
"type": "bidirectional",
"description": "GPIO port 0 bit 6, also srss.ext_clk, scb[1].uart_cts:0, scb[2].uart_tx:1, and scb[1].spi_clk:1 per Table 2."
},
{
"number": "35",
"name": "P0.7",
"type": "bidirectional",
"description": "GPIO port 0 bit 7, also tcpwm.line[0]:2, scb[1].uart_rts:0, and scb[1].spi_select0:1 per Table 2."
},
{
"number": "36",
"name": "XRES",
"type": "input",
"description": "External reset pin for the device; the provided text gives only its name and pin location in Table 1, with no electrical limits stated."
},
{
"number": "37",
"name": "VCCD",
"type": "power_out",
"description": "Regulated digital supply output of the internal 1.8 V regulator (1.8 V ±5%), which must be bypassed to ground with 0.1 µF X5R or better and must not be connected to anything else in Mode 1."
},
{
"number": "38",
"name": "VSSD",
"type": "power_in",
"description": "Ground pin for the digital section."
},
{
"number": "39",
"name": "VDDD",
"type": "power_in",
"description": "Power supply for the digital section, supplied in the 1.8 V to 5.5 V range (Mode 1) or 1.71 V to 1.89 V (Mode 2)."
},
{
"number": "40",
"name": "VDDA",
"type": "power_in",
"description": "Power supply for the analog section, which runs directly from the VDD input since there is no analog regulator."
},
{
"number": "41",
"name": "VSSA",
"type": "power_in",
"description": "Ground pin for the analog section."
},
{
"number": "42",
"name": "P1.0",
"type": "bidirectional",
"description": "GPIO port 1 bit 0, also ctb0_oa0+, tcpwm.line[2]:1, scb[0].uart_rx:1, scb[0].i2c_scl:0, and scb[0].spi_mosi:1 per Table 2."
},
{
"number": "43",
"name": "P1.1",
"type": "bidirectional",
"description": "GPIO port 1 bit 1, also ctb0_oa0-, tcpwm.line_compl[2]:1, scb[0].uart_tx:1, scb[0].i2c_sda:0, and scb[0].spi_miso:1 per Table 2."
},
{
"number": "44",
"name": "P1.2",
"type": "bidirectional",
"description": "GPIO port 1 bit 2, also ctb0_oa0_out, tcpwm.line[3]:1, scb[0].uart_cts:1, tcpwm.tr_in[2], scb[2].i2c_scl:1, and scb[0].spi_clk:1 per Table 2."
},
{
"number": "45",
"name": "P1.3",
"type": "bidirectional",
"description": "GPIO port 1 bit 3, also ctb0_oa1_out, tcpwm.line_compl[3]:1, scb[0].uart_rts:1, tcpwm.tr_in[3], scb[2].i2c_sda:1, and scb[0].spi_select0:1 per Table 2."
},
{
"number": "46",
"name": "P1.4",
"type": "bidirectional",
"description": "GPIO port 1 bit 4, also ctb0_oa1- and scb[0].spi_select1:1 per Table 2."
},
{
"number": "47",
"name": "P1.5",
"type": "bidirectional",
"description": "GPIO port 1 bit 5, also ctb0_oa1+ and scb[0].spi_select2:1 per Table 2."
},
{
"number": "48",
"name": "P1.6",
"type": "bidirectional",
"description": "GPIO port 1 bit 6, also ctb0_oa0+ and scb[0].spi_select3:1 per Table 2."
}
],
"provenance": {
"extractor": "extract_pins 0.3",
"factory_chain": {
"factory": "2.0.0",
"extractor": "extract_pins 0.3",
"primary_model": "claude-haiku-5-5",
"primary_mode": "text",
"consensus_model": "claude-sonnet-5-5",
"consensus": "agreed",
"guards": "pin_guards 0.1: passed",
"guard_notes": [
"extractor flagged: MPN CY8C4146AZI-S423 does not appear in the provided text. The ordering table excerpt (page 32) list; Table 1 text extraction is garbled in places. The 48-TQFP pin 38 row reads 'VSSD DN VSSD' and was ta; Pins 11, 15, 26 and 27 are listed as No Connect on the 48-pin TQFP per the note under Table 1."
],
"pages_sent": 17,
"cost_usd": 0.1409,
"at": "2026-10-18T23:35:54"
},
"datasheet": {
"url": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8590221893111480321",
"pages": 44,
"sha256": "ffa6972966622b0d",
"source_tier": "lcsc"
},
"cad": "KiCad official (CC-BY-SA 4.0)",
"pins": {
"total": 48,
"described": 48,
"cites_pages": true,
"refuses_to_fabricate": true
}
},
"viewers": {
"symbol": "viewers/symbol.html",
"footprint": "viewers/footprint.html"
},
"models_3d": [
{
"file": "cy8c4146azi-s423.step",
"role": "plain",
"up": "Z",
"units": "mm",
"origin": "footprint origin = pad-pattern centre",
"seat": "z = 0",
"extents_mm": [
9.0,
9.0,
1.1
],
"zmin_mm": -0.0,
"centre_offset_mm": 0.0,
"footprint_binding": "identity",
"sha256": "14ca7676e4932e92f0eca0c6d56ce3018cd28a2531204a70ab7bbacb3eeb3cf5",
"checked": "2026-10-18",
"checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
},
{
"file": "cy8c4146azi-s423-etched.step",
"role": "eda",
"up": "Z",
"units": "mm",
"origin": "footprint origin = pad-pattern centre",
"seat": "z = 0",
"extents_mm": [
9.0,
9.0,
1.1
],
"zmin_mm": -0.0,
"centre_offset_mm": 0.0,
"footprint_binding": "identity",
"sha256": "292c427d67f77b037952008c507fdc88127f476cac8459deff35094528a667db",
"checked": "2026-10-18",
"checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
}
]
}
}