CY8C4125LQS-S433

{
  "slug": "cy8c4125lqs-s433",
  "version": "0.1.0",
  "type": "component",
  "description": "Infineon/Cypress Semicon Microcontrollers (MCU/MPU/SOC), QFN-40(6x6). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
  "tags": [
    "component",
    "embedded processors & controllers",
    "cy8c4125lqs-s433",
    "factory-2.0.0",
    "extractor-text"
  ],
  "dependencies": {},
  "hero": {
    "type": "image",
    "path": "docs/hero.png"
  },
  "files": [
    "page.json",
    "README.md",
    "cy8c4125lqs-s433.kicad_sym",
    "cy8c4125lqs-s433.kicad_mod",
    "cy8c4125lqs-s433.glb",
    "cy8c4125lqs-s433.step",
    "cy8c4125lqs-s433.lbr",
    "docs/hero.png",
    "docs/cy8c4125lqs-s433-datasheet.pdf",
    "viewers/symbol.html",
    "viewers/footprint.html",
    "cy8c4125lqs-s433-hero.glb",
    "cy8c4125lqs-s433-hero.overlay.json",
    "cy8c4125lqs-s433-etched.glb"
  ],
  "component": {
    "mpn": "CY8C4125LQS-S433",
    "manufacturer": "Infineon/Cypress Semicon",
    "package": "QFN-40(6x6)",
    "pin_count": 41,
    "category": "Embedded Processors & Controllers",
    "subcategory": "Microcontrollers (MCU/MPU/SOC)",
    "datasheet": "https://www.infineon.com/assets/row/public/documents/10/49/infineon-cy8c41xx-automotive-psoc-4-psoc-4100s-family-based-on-arm-cortex--m0-cpu-datasheet-en.pdf?fileId=8ac78c8c7d0d8da4017d0ee64c786e7a",
    "parts": {
      "symbol": "cy8c4125lqs-s433.kicad_sym",
      "footprint": "cy8c4125lqs-s433.kicad_mod",
      "model_3d": "cy8c4125lqs-s433-hero.glb",
      "model_3d_plain": "cy8c4125lqs-s433-etched.glb",
      "model_3d_step": "cy8c4125lqs-s433-etched.step",
      "model_3d_step_plain": "cy8c4125lqs-s433.step",
      "lbr": "cy8c4125lqs-s433.lbr"
    },
    "distributor_links": {
      "lcsc": "C22452367",
      "digikey": "448-CY8C4125LQS-S433-ND",
      "mouser": "727-CY8C4125LQS-S433"
    },
    "distributor_check": {
      "checked_at": "2026-10-23T09:10:22Z",
      "source": "Component Ocean /api/assign-pns",
      "digikey": {
        "pn": "448-CY8C4125LQS-S433-ND",
        "status": "found"
      },
      "mouser": {
        "pn": "727-CY8C4125LQS-S433",
        "status": "found"
      }
    },
    "pins": [
      {
        "number": "1",
        "name": "P2.0",
        "type": "bidirectional",
        "description": "GPIO port 2 bit 0 with SAR mux pad 0, smart I/O prgio[0].io[0], TCPWM line[4], csd.comp, LCD com[16]/seg[16] and SCB1 I2C SCL/SPI MOSI options."
      },
      {
        "number": "2",
        "name": "P2.1",
        "type": "bidirectional",
        "description": "GPIO port 2 bit 1 with SAR mux pad 1, smart I/O prgio[0].io[1], TCPWM line_compl[4], LCD com[17]/seg[17] and SCB1 I2C SDA/SPI MISO options."
      },
      {
        "number": "3",
        "name": "P2.2",
        "type": "bidirectional",
        "description": "GPIO port 2 bit 2 with SAR mux pad 2, smart I/O prgio[0].io[2], LCD com[18]/seg[18] and SCB1 SPI clock option."
      },
      {
        "number": "4",
        "name": "P2.3",
        "type": "bidirectional",
        "description": "GPIO port 2 bit 3 with SAR mux pad 3, smart I/O prgio[0].io[3], LCD com[19]/seg[19] and SCB1 SPI select0 option."
      },
      {
        "number": "5",
        "name": "P2.4",
        "type": "bidirectional",
        "description": "GPIO port 2 bit 4 with SAR mux pad 4, smart I/O prgio[0].io[4], TCPWM line[0], LCD com[20]/seg[20] and SCB1 SPI select1 option."
      },
      {
        "number": "6",
        "name": "P2.5",
        "type": "bidirectional",
        "description": "GPIO port 2 bit 5 with SAR mux pad 5, smart I/O prgio[0].io[5], TCPWM line_compl[0], LCD com[21]/seg[21] and SCB1 SPI select2 option."
      },
      {
        "number": "7",
        "name": "P2.6",
        "type": "bidirectional",
        "description": "GPIO port 2 bit 6 with SAR mux pad 6, smart I/O prgio[0].io[6], TCPWM line[1], LCD com[22]/seg[22] and SCB1 SPI select3 option."
      },
      {
        "number": "8",
        "name": "P2.7",
        "type": "bidirectional",
        "description": "GPIO port 2 bit 7 with SAR mux pad 7, smart I/O prgio[0].io[7], TCPWM line_compl[1], LCD com[23]/seg[23], lpcomp.comp[0] and SCB2 SPI MOSI options."
      },
      {
        "number": "9",
        "name": "VSSD",
        "type": "power_in",
        "description": "Digital ground pin."
      },
      {
        "number": "10",
        "name": "P3.0",
        "type": "bidirectional",
        "description": "GPIO port 3 bit 0 with smart I/O prgio[1].io[0], TCPWM line[0], SCB1 UART RX, LCD com[24]/seg[24] and SCB1 I2C SCL/SPI MOSI options."
      },
      {
        "number": "11",
        "name": "P3.1",
        "type": "bidirectional",
        "description": "GPIO port 3 bit 1 with smart I/O prgio[1].io[1], TCPWM line_compl[0], SCB1 UART TX, LCD com[25]/seg[25] and SCB1 I2C SDA/SPI MISO options."
      },
      {
        "number": "12",
        "name": "P3.2",
        "type": "bidirectional",
        "description": "GPIO port 3 bit 2 with smart I/O prgio[1].io[2], TCPWM line[1], SCB1 UART CTS, LCD com[26]/seg[26], SWD data (cpuss.swd_data) and SCB1 SPI clock options."
      },
      {
        "number": "13",
        "name": "P3.3",
        "type": "bidirectional",
        "description": "GPIO port 3 bit 3 with smart I/O prgio[1].io[3], TCPWM line_compl[1], SCB1 UART RTS, LCD com[27]/seg[27], SWD clock (cpuss.swd_clk) and SCB1 SPI select0 options."
      },
      {
        "number": "14",
        "name": "P3.4",
        "type": "bidirectional",
        "description": "GPIO port 3 bit 4 with smart I/O prgio[1].io[4], TCPWM line[2], tcpwm.tr_in[6], LCD com[28]/seg[28] and SCB1 SPI select1 option."
      },
      {
        "number": "15",
        "name": "P3.5",
        "type": "bidirectional",
        "description": "GPIO port 3 bit 5 with smart I/O prgio[1].io[5], TCPWM line_compl[2], LCD com[29]/seg[29] and SCB1 SPI select2 option."
      },
      {
        "number": "16",
        "name": "P3.6",
        "type": "bidirectional",
        "description": "GPIO port 3 bit 6 with smart I/O prgio[1].io[6], TCPWM line[3], LCD com[30]/seg[30] and SCB1 SPI select3 option."
      },
      {
        "number": "17",
        "name": "P3.7",
        "type": "bidirectional",
        "description": "GPIO port 3 bit 7 with smart I/O prgio[1].io[7], TCPWM line_compl[3], LCD com[31]/seg[31], lpcomp.comp[1] and SCB2 SPI MISO options."
      },
      {
        "number": "18",
        "name": "P4.0",
        "type": "bidirectional",
        "description": "GPIO port 4 bit 0 with CAPSENSE external Vref (csd.vref_ext), SCB0 UART RX, LCD com[32]/seg[32] and SCB0 I2C SCL/SPI MOSI options."
      },
      {
        "number": "19",
        "name": "P4.1",
        "type": "bidirectional",
        "description": "GPIO port 4 bit 1 with CAPSENSE shield/Cmod (csd.cshield/csd.cmod), SCB0 UART TX, LCD com[33]/seg[33] and SCB0 I2C SDA/SPI MISO options."
      },
      {
        "number": "20",
        "name": "P4.2",
        "type": "bidirectional",
        "description": "GPIO port 4 bit 2 with CAPSENSE Cmod and CintA (csd.cmod/csd.CintA), SCB0 UART CTS, LCD com[34]/seg[34], lpcomp.comp[0] and SCB0 SPI clock options."
      },
      {
        "number": "21",
        "name": "P4.3",
        "type": "bidirectional",
        "description": "GPIO port 4 bit 3 with CAPSENSE shield tank and CintB (csd.csh_tank/csd.csh_CintB), SCB0 UART RTS, LCD com[35]/seg[35], lpcomp.comp[1] and SCB0 SPI select0 options."
      },
      {
        "number": "22",
        "name": "P0.0",
        "type": "bidirectional",
        "description": "GPIO port 0 bit 0 with low-power comparator input lpcomp.in_p[0], SCB2 UART CTS, tcpwm.tr_in[0], LCD com[0]/seg[0] and SCB2 I2C SCL/SCB0 SPI select1 options."
      },
      {
        "number": "23",
        "name": "P0.1",
        "type": "bidirectional",
        "description": "GPIO port 0 bit 1 with low-power comparator input lpcomp.in_n[0], SCB2 UART RTS, tcpwm.tr_in[1], LCD com[1]/seg[1] and SCB2 I2C SDA/SCB0 SPI select2 options."
      },
      {
        "number": "24",
        "name": "P0.2",
        "type": "bidirectional",
        "description": "GPIO port 0 bit 2 with low-power comparator input lpcomp.in_p[1], LCD com[2]/seg[2] and SCB0 SPI select3 option."
      },
      {
        "number": "25",
        "name": "P0.3",
        "type": "bidirectional",
        "description": "GPIO port 0 bit 3 with low-power comparator input lpcomp.in_n[1], LCD com[3]/seg[3] and SCB2 SPI select0 option."
      },
      {
        "number": "26",
        "name": "P0.4",
        "type": "bidirectional",
        "description": "GPIO port 0 bit 4 with watch crystal oscillator input (wco_in), SCB1/SCB2 UART RX, LCD com[4]/seg[4] and SCB1 I2C SCL/SPI MOSI options."
      },
      {
        "number": "27",
        "name": "P0.5",
        "type": "bidirectional",
        "description": "GPIO port 0 bit 5 with watch crystal oscillator output (wco_out), SCB1/SCB2 UART TX, LCD com[5]/seg[5] and SCB1 I2C SDA/SPI MISO options."
      },
      {
        "number": "28",
        "name": "P0.6",
        "type": "bidirectional",
        "description": "GPIO port 0 bit 6 with external clock input (srss.ext_clk), SCB1 UART CTS, SCB2 UART TX, LCD com[6]/seg[6] and SCB1 SPI clock options."
      },
      {
        "number": "29",
        "name": "P0.7",
        "type": "bidirectional",
        "description": "GPIO port 0 bit 7 with TCPWM line[0], SCB1 UART RTS, LCD com[7]/seg[7] and SCB1 SPI select0 options."
      },
      {
        "number": "30",
        "name": "XRES",
        "type": "input",
        "description": "External reset input pin."
      },
      {
        "number": "31",
        "name": "VCCD",
        "type": "power_out",
        "description": "Regulated digital supply (1.8 V ± 5%); bypass to ground with a 0.1 µF X5R ceramic capacitor and connect nothing else in the 1.8 V to 5.5 V supply mode."
      },
      {
        "number": "32",
        "name": "VSSD",
        "type": "power_in",
        "description": "Digital ground pin."
      },
      {
        "number": "33",
        "name": "VDD",
        "type": "power_in",
        "description": "Combined VDDA/VDDD supply, shorted internally; 1.8 V to 5.5 V with 0.1 µF and 1 µF decoupling (1.71 V to 1.89 V in externally regulated mode)."
      },
      {
        "number": "34",
        "name": "VSSA",
        "type": "power_in",
        "description": "Analog ground pin."
      },
      {
        "number": "35",
        "name": "P1.0",
        "type": "bidirectional",
        "description": "GPIO port 1 bit 0 with opamp pad pass.ctb0_pads[0], TCPWM line[2], SCB0 UART RX, LCD com[8]/seg[8] and SCB0 I2C SCL/SPI MOSI options."
      },
      {
        "number": "36",
        "name": "P1.1",
        "type": "bidirectional",
        "description": "GPIO port 1 bit 1 with opamp pad pass.ctb0_pads[1], TCPWM line_compl[2], SCB0 UART TX, LCD com[9]/seg[9] and SCB0 I2C SDA/SPI MISO options."
      },
      {
        "number": "37",
        "name": "P1.2",
        "type": "bidirectional",
        "description": "GPIO port 1 bit 2 with opamp pad pass.ctb0_pads[2], opamp0 10x output (ctb0_oa0_out_10x), TCPWM line[3], SCB0 UART CTS, LCD com[10]/seg[10] and SCB2 I2C SCL/SCB0 SPI clock options."
      },
      {
        "number": "38",
        "name": "P1.3",
        "type": "bidirectional",
        "description": "GPIO port 1 bit 3 with opamp pad pass.ctb0_pads[3], opamp1 10x output (ctb0_oa1_out_10x), TCPWM line_compl[3], SCB0 UART RTS, LCD com[11]/seg[11] and SCB2 I2C SDA/SCB0 SPI select0 options."
      },
      {
        "number": "39",
        "name": "P1.4",
        "type": "bidirectional",
        "description": "GPIO port 1 bit 4 with opamp pad pass.ctb0_pads[4], LCD com[12]/seg[12] and SCB0 SPI select1 option."
      },
      {
        "number": "40",
        "name": "P1.7/VREF",
        "type": "bidirectional",
        "description": "GPIO port 1 bit 7 with opamp pad pass.ctb0_pads[7], SAR ADC external Vref (pass.sar_ext_vref0/1), LCD com[15]/seg[15] and SCB2 SPI clock option."
      },
      {
        "number": "41",
        "name": "EP",
        "type": "passive",
        "description": "Exposed pad (from the footprint; not named in the datasheet pin table)."
      }
    ],
    "provenance": {
      "extractor": "extract_pins 0.3",
      "factory_chain": {
        "factory": "2.0.0",
        "extractor": "extract_pins 0.3",
        "primary_model": "claude-sonnet-5-5",
        "primary_mode": "text",
        "consensus_model": "claude-sonnet-5-5",
        "consensus": "agreed",
        "guards": "pin_guards 0.1: passed",
        "guard_notes": [
          "extractor flagged: Table 1 lists VDD twice on pin 33 (VDDA and VDDD shorted internally); entered once as a single pin.; The provided text does not list an exposed pad for the 40-pin QFN, and the package figure (Figure 5); The datasheet text gives no electrical description of XRES here, and the VCCD type (power_out) is in"
        ],
        "pages_sent": 25,
        "cost_usd": 0.3092,
        "at": "2026-10-23T09:10:00"
      },
      "datasheet": {
        "url": "https://www.infineon.com/assets/row/public/documents/10/49/infineon-cy8c41xx-automotive-psoc-4-psoc-4100s-family-based-on-arm-cortex--m0-cpu-datasheet-en.pdf?fileId=8ac78c8c7d0d8da4017d0ee64c786e7a",
        "pages": 68,
        "sha256": "4c3cc0528eecb677",
        "source_tier": "lcsc"
      },
      "cad": "KiCad official (CC-BY-SA 4.0)",
      "pins": {
        "total": 41,
        "described": 41,
        "cites_pages": true,
        "refuses_to_fabricate": true
      }
    },
    "viewers": {
      "symbol": "viewers/symbol.html",
      "footprint": "viewers/footprint.html"
    },
    "models_3d": [
      {
        "file": "cy8c4125lqs-s433.step",
        "role": "plain",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          6.0,
          6.0,
          1.0
        ],
        "zmin_mm": 0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "e5b4286c2329085d9ef7f90d5eb5bf41a435241ecc1baaf1383823b6d6a946ae",
        "checked": "2026-10-23",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      },
      {
        "file": "cy8c4125lqs-s433-etched.step",
        "role": "eda",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          6.0,
          6.0,
          1.0
        ],
        "zmin_mm": 0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "3940725454a1236c0dd25e0166e45ef9aa8e700355216a0325b1b08eed3ffb9d",
        "checked": "2026-10-23",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      }
    ]
  }
}