component
CY8C4125AXI-483
Public Made by Adomby adom
Infineon Cypress Semicon Microcontrollers (MCU/MPU/SOC), LQFP-44(10x10). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
main
123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410
{
"slug": "cy8c4125axi-483",
"version": "0.1.0",
"type": "component",
"description": "Infineon Cypress Semicon Microcontrollers (MCU/MPU/SOC), LQFP-44(10x10). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
"tags": [
"component",
"embedded processors & controllers",
"cy8c4125axi-483",
"factory-2.0.0",
"extractor-text"
],
"dependencies": {},
"hero": {
"type": "image",
"path": "docs/hero.png"
},
"files": [
"page.json",
"README.md",
"cy8c4125axi-483.kicad_sym",
"cy8c4125axi-483.kicad_mod",
"cy8c4125axi-483.glb",
"cy8c4125axi-483.step",
"cy8c4125axi-483.lbr",
"docs/hero.png",
"docs/cy8c4125axi-483-datasheet.pdf",
"viewers/symbol.html",
"viewers/footprint.html",
"cy8c4125axi-483-hero.glb",
"cy8c4125axi-483-hero.overlay.json",
"cy8c4125axi-483-etched.glb"
],
"component": {
"mpn": "CY8C4125AXI-483",
"manufacturer": "Infineon Cypress Semicon",
"package": "LQFP-44(10x10)",
"pin_count": 44,
"category": "Embedded Processors & Controllers",
"subcategory": "Microcontrollers (MCU/MPU/SOC)",
"datasheet": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8586178544468692992",
"parts": {
"symbol": "cy8c4125axi-483.kicad_sym",
"footprint": "cy8c4125axi-483.kicad_mod",
"model_3d": "cy8c4125axi-483-hero.glb",
"model_3d_plain": "cy8c4125axi-483-etched.glb",
"model_3d_step": "cy8c4125axi-483-etched.step",
"model_3d_step_plain": "cy8c4125axi-483.step",
"lbr": "cy8c4125axi-483.lbr"
},
"distributor_links": {
"lcsc": "C92090",
"digikey": "CY8C4125AXI-483-ND",
"mouser": "727-CY8C4125AXI-483"
},
"distributor_check": {
"checked_at": "2026-10-21T01:24:59Z",
"source": "Component Ocean /api/assign-pns",
"digikey": {
"pn": "CY8C4125AXI-483-ND",
"status": "found"
},
"mouser": {
"pn": "727-CY8C4125AXI-483",
"status": "found"
}
},
"pins": [
{
"number": "1",
"name": "VSS",
"type": "power_in",
"description": "Ground pin for the device."
},
{
"number": "2",
"name": "P2.0",
"type": "bidirectional",
"description": "Port 2 pin 0 GPIO, also usable as LCD, CapSense (CSD) and SAR mux analog input sarmux.0."
},
{
"number": "3",
"name": "P2.1",
"type": "bidirectional",
"description": "Port 2 pin 1 GPIO, also usable as LCD, CapSense (CSD) and SAR mux analog input sarmux.1."
},
{
"number": "4",
"name": "P2.2",
"type": "bidirectional",
"description": "Port 2 pin 2 GPIO, also usable as LCD, CapSense (CSD) and SAR mux analog input sarmux.2."
},
{
"number": "5",
"name": "P2.3",
"type": "bidirectional",
"description": "Port 2 pin 3 GPIO, also usable as LCD, CapSense (CSD) and SAR mux analog input sarmux.3."
},
{
"number": "6",
"name": "P2.4",
"type": "bidirectional",
"description": "Port 2 pin 4 GPIO, also usable as LCD, CapSense, SAR mux input sarmux.4, or PWM output tcpwm0_p[1]."
},
{
"number": "7",
"name": "P2.5",
"type": "bidirectional",
"description": "Port 2 pin 5 GPIO, also usable as LCD, CapSense, SAR mux input sarmux.5, or PWM output tcpwm0_n[1]."
},
{
"number": "8",
"name": "P2.6",
"type": "bidirectional",
"description": "Port 2 pin 6 GPIO, also usable as LCD, CapSense, SAR mux input sarmux.6, or PWM output tcpwm1_p[1]."
},
{
"number": "9",
"name": "P2.7",
"type": "bidirectional",
"description": "Port 2 pin 7 GPIO, also usable as LCD, CapSense, SAR mux input sarmux.7, or PWM output tcpwm1_n[1]."
},
{
"number": "10",
"name": "VSS",
"type": "power_in",
"description": "Ground pin for the device."
},
{
"number": "11",
"name": "P3.0",
"type": "bidirectional",
"description": "Port 3 pin 0 GPIO, also usable as LCD, CapSense, PWM tcpwm0_p[0] or SCB1 (UART/I2C/SPI) signals."
},
{
"number": "12",
"name": "P3.1",
"type": "bidirectional",
"description": "Port 3 pin 1 GPIO, also usable as LCD, CapSense, PWM tcpwm0_n[0] or SCB1 (UART/I2C/SPI) signals."
},
{
"number": "13",
"name": "P3.2",
"type": "bidirectional",
"description": "Port 3 pin 2 GPIO, also usable as LCD, CapSense, PWM tcpwm1_p[0], SWD I/O swd_io[0] or SCB1 SPI clock."
},
{
"number": "14",
"name": "P3.3",
"type": "bidirectional",
"description": "Port 3 pin 3 GPIO, also usable as LCD, CapSense, PWM tcpwm1_n[0], SWD clock swd_clk[0] or SCB1 SPI select."
},
{
"number": "15",
"name": "P3.4",
"type": "bidirectional",
"description": "Port 3 pin 4 GPIO, also usable as LCD, CapSense, PWM tcpwm2_p[0] or SCB1 SPI select."
},
{
"number": "16",
"name": "P3.5",
"type": "bidirectional",
"description": "Port 3 pin 5 GPIO, also usable as LCD, CapSense, PWM tcpwm2_n[0] or SCB1 SPI select."
},
{
"number": "17",
"name": "P3.6",
"type": "bidirectional",
"description": "Port 3 pin 6 GPIO, also usable as LCD, CapSense, PWM tcpwm3_p[0], SWD I/O swd_io[1] or SCB1 SPI select."
},
{
"number": "18",
"name": "P3.7",
"type": "bidirectional",
"description": "Port 3 pin 7 GPIO, also usable as LCD, CapSense, PWM tcpwm3_n[0] or SWD clock swd_clk[1]."
},
{
"number": "19",
"name": "VDDD",
"type": "power_in",
"description": "Digital supply voltage, 1.8 V to 5.5 V."
},
{
"number": "20",
"name": "P4.0",
"type": "bidirectional",
"description": "Port 4 pin 0 GPIO, also usable as LCD, CapSense, or SCB0 (UART RX / I2C SCL / SPI MOSI)."
},
{
"number": "21",
"name": "P4.1",
"type": "bidirectional",
"description": "Port 4 pin 1 GPIO, also usable as LCD, CapSense, or SCB0 (UART TX / I2C SDA / SPI MISO)."
},
{
"number": "22",
"name": "P4.2",
"type": "bidirectional",
"description": "Port 4 pin 2 GPIO, also usable as CapSense modulator csd_c_mod or SCB0 SPI clock."
},
{
"number": "23",
"name": "P4.3",
"type": "bidirectional",
"description": "Port 4 pin 3 GPIO, also usable as CapSense sample tank csd_c_sh_tank or SCB0 SPI select."
},
{
"number": "24",
"name": "P0.0",
"type": "bidirectional",
"description": "Port 0 pin 0 GPIO, also usable as comparator 1 non-inverting input comp1_inp, or SCB0 SPI select."
},
{
"number": "25",
"name": "P0.1",
"type": "bidirectional",
"description": "Port 0 pin 1 GPIO, also usable as comparator 1 inverting input comp1_inn, or SCB0 SPI select."
},
{
"number": "26",
"name": "P0.2",
"type": "bidirectional",
"description": "Port 0 pin 2 GPIO, also usable as comparator 2 non-inverting input comp2_inp, or SCB0 SPI select."
},
{
"number": "27",
"name": "P0.3",
"type": "bidirectional",
"description": "Port 0 pin 3 GPIO, also usable as comparator 2 inverting input comp2_inn."
},
{
"number": "28",
"name": "P0.4",
"type": "bidirectional",
"description": "Port 0 pin 4 GPIO, also usable as LCD, CapSense, or SCB1 (UART RX / I2C SCL / SPI MOSI) alternate."
},
{
"number": "29",
"name": "P0.5",
"type": "bidirectional",
"description": "Port 0 pin 5 GPIO, also usable as LCD, CapSense, or SCB1 (UART TX / I2C SDA / SPI MISO) alternate."
},
{
"number": "30",
"name": "P0.6",
"type": "bidirectional",
"description": "Port 0 pin 6 GPIO, also usable as external clock input ext_clk or SCB1 SPI clock alternate."
},
{
"number": "31",
"name": "P0.7",
"type": "bidirectional",
"description": "Port 0 pin 7 GPIO, also usable as wakeup input, or SCB1 SPI select alternate."
},
{
"number": "32",
"name": "XRES",
"type": "input",
"description": "External active-low reset input with internal pull-up; VIH is 0.7 x VDDD and VIL is 0.3 x VDDD (CMOS input)."
},
{
"number": "33",
"name": "VCCD",
"type": "power_out",
"description": "Regulated digital core supply output (nominal 1.8 V), to be bypassed with a 1 µF capacitor."
},
{
"number": "34",
"name": "VDDD",
"type": "power_in",
"description": "Digital supply voltage, 1.8 V to 5.5 V."
},
{
"number": "35",
"name": "VDDA",
"type": "power_in",
"description": "Analog supply voltage, 1.8 V to 5.5 V, equal to VDDD."
},
{
"number": "36",
"name": "VSSA",
"type": "power_in",
"description": "Analog ground pin."
},
{
"number": "37",
"name": "P1.0",
"type": "bidirectional",
"description": "Port 1 pin 0 GPIO, also usable as op-amp 0 non-inverting input ctb.oa0.inp or PWM output tcpwm2_p[1]."
},
{
"number": "38",
"name": "P1.1",
"type": "bidirectional",
"description": "Port 1 pin 1 GPIO, also usable as op-amp 0 inverting input ctb.oa0.inm or PWM output tcpwm2_n[1]."
},
{
"number": "39",
"name": "P1.2",
"type": "bidirectional",
"description": "Port 1 pin 2 GPIO, also usable as op-amp 0 output ctb.oa0.out or PWM output tcpwm3_p[1]."
},
{
"number": "40",
"name": "P1.3",
"type": "bidirectional",
"description": "Port 1 pin 3 GPIO, also usable as op-amp 1 output ctb.oa1.out or PWM output tcpwm3_n[1]."
},
{
"number": "41",
"name": "P1.4",
"type": "bidirectional",
"description": "Port 1 pin 4 GPIO, also usable as op-amp 1 inverting input ctb.oa1.inm."
},
{
"number": "42",
"name": "P1.5",
"type": "bidirectional",
"description": "Port 1 pin 5 GPIO, also usable as op-amp 1 non-inverting input ctb.oa1.inp."
},
{
"number": "43",
"name": "P1.6",
"type": "bidirectional",
"description": "Port 1 pin 6 GPIO, also usable as alternate op-amp 0 non-inverting input ctb.oa0.inp_alt."
},
{
"number": "44",
"name": "P1.7/VREF",
"type": "bidirectional",
"description": "Port 1 pin 7 GPIO; optional SAR ADC reference input/bypass (ext_vref) and alternate op-amp 1 input ctb.oa1.inp_alt."
}
],
"provenance": {
"extractor": "extract_pins 0.3",
"factory_chain": {
"factory": "2.0.0",
"extractor": "extract_pins 0.3",
"primary_model": "claude-haiku-5-5",
"primary_mode": "text",
"consensus_model": "claude-sonnet-5-5",
"consensus": "agreed",
"guards": "pin_guards 0.1: passed",
"guard_notes": [
"extractor flagged: Package selection: the ordering table (page 33) lists CY8C4125AXI-483 with 36 GPIO and a check mark ; Datasheet pin-table text labels P0.7 with 'Port 0 pin 5' in its description column (typo in source).; VCCD (pin 33) is typed power_out because it is the internal regulator output that must be bypassed. "
],
"pages_sent": 32,
"cost_usd": 0.2069,
"at": "2026-10-21T01:21:17"
},
"datasheet": {
"url": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8586178544468692992",
"pages": 43,
"sha256": "72c180760d184cef",
"source_tier": "lcsc"
},
"cad": "KiCad official (CC-BY-SA 4.0)",
"pins": {
"total": 44,
"described": 44,
"cites_pages": true,
"refuses_to_fabricate": true
}
},
"viewers": {
"symbol": "viewers/symbol.html",
"footprint": "viewers/footprint.html"
},
"models_3d": [
{
"file": "cy8c4125axi-483.step",
"role": "plain",
"up": "Z",
"units": "mm",
"origin": "footprint origin = pad-pattern centre",
"seat": "z = 0",
"extents_mm": [
12.0,
12.0,
1.5
],
"zmin_mm": 0.0,
"centre_offset_mm": 0.0,
"footprint_binding": "identity",
"sha256": "81aae6270b5c742bed79a8a35e9adf7fbed97c42e341e6b25ab20c1783b93b5d",
"checked": "2026-10-21",
"checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
},
{
"file": "cy8c4125axi-483-etched.step",
"role": "eda",
"up": "Z",
"units": "mm",
"origin": "footprint origin = pad-pattern centre",
"seat": "z = 0",
"extents_mm": [
12.0,
12.0,
1.5
],
"zmin_mm": 0.0,
"centre_offset_mm": 0.0,
"footprint_binding": "identity",
"sha256": "a0056d81f3c74812f6c1675d6175ebfa11a2cf5e52e77b235ae58a1c07b41c70",
"checked": "2026-10-21",
"checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
}
]
}
}