component
CY8C4125AXI-483
Public Made by Adomby adom
Infineon Cypress Semicon Microcontrollers (MCU/MPU/SOC), LQFP-44(10x10). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownCY8C4125AXI-483
Infineon Cypress Semicon · Microcontrollers (MCU/MPU/SOC) · LQFP-44(10x10)
CY8C4125AXI-483 from Infineon Cypress Semicon, in a LQFP-44(10x10). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VSS | power_in | Ground pin for the device. |
| 2 | P2.0 | bidirectional | Port 2 pin 0 GPIO, also usable as LCD, CapSense (CSD) and SAR mux analog input sarmux.0. |
| 3 | P2.1 | bidirectional | Port 2 pin 1 GPIO, also usable as LCD, CapSense (CSD) and SAR mux analog input sarmux.1. |
| 4 | P2.2 | bidirectional | Port 2 pin 2 GPIO, also usable as LCD, CapSense (CSD) and SAR mux analog input sarmux.2. |
| 5 | P2.3 | bidirectional | Port 2 pin 3 GPIO, also usable as LCD, CapSense (CSD) and SAR mux analog input sarmux.3. |
| 6 | P2.4 | bidirectional | Port 2 pin 4 GPIO, also usable as LCD, CapSense, SAR mux input sarmux.4, or PWM output tcpwm0_p[1]. |
| 7 | P2.5 | bidirectional | Port 2 pin 5 GPIO, also usable as LCD, CapSense, SAR mux input sarmux.5, or PWM output tcpwm0_n[1]. |
| 8 | P2.6 | bidirectional | Port 2 pin 6 GPIO, also usable as LCD, CapSense, SAR mux input sarmux.6, or PWM output tcpwm1_p[1]. |
| 9 | P2.7 | bidirectional | Port 2 pin 7 GPIO, also usable as LCD, CapSense, SAR mux input sarmux.7, or PWM output tcpwm1_n[1]. |
| 10 | VSS | power_in | Ground pin for the device. |
| 11 | P3.0 | bidirectional | Port 3 pin 0 GPIO, also usable as LCD, CapSense, PWM tcpwm0_p[0] or SCB1 (UART/I2C/SPI) signals. |
| 12 | P3.1 | bidirectional | Port 3 pin 1 GPIO, also usable as LCD, CapSense, PWM tcpwm0_n[0] or SCB1 (UART/I2C/SPI) signals. |
| 13 | P3.2 | bidirectional | Port 3 pin 2 GPIO, also usable as LCD, CapSense, PWM tcpwm1_p[0], SWD I/O swd_io[0] or SCB1 SPI clock. |
| 14 | P3.3 | bidirectional | Port 3 pin 3 GPIO, also usable as LCD, CapSense, PWM tcpwm1_n[0], SWD clock swd_clk[0] or SCB1 SPI select. |
| 15 | P3.4 | bidirectional | Port 3 pin 4 GPIO, also usable as LCD, CapSense, PWM tcpwm2_p[0] or SCB1 SPI select. |
| 16 | P3.5 | bidirectional | Port 3 pin 5 GPIO, also usable as LCD, CapSense, PWM tcpwm2_n[0] or SCB1 SPI select. |
| 17 | P3.6 | bidirectional | Port 3 pin 6 GPIO, also usable as LCD, CapSense, PWM tcpwm3_p[0], SWD I/O swd_io[1] or SCB1 SPI select. |
| 18 | P3.7 | bidirectional | Port 3 pin 7 GPIO, also usable as LCD, CapSense, PWM tcpwm3_n[0] or SWD clock swd_clk[1]. |
| 19 | VDDD | power_in | Digital supply voltage, 1.8 V to 5.5 V. |
| 20 | P4.0 | bidirectional | Port 4 pin 0 GPIO, also usable as LCD, CapSense, or SCB0 (UART RX / I2C SCL / SPI MOSI). |
| 21 | P4.1 | bidirectional | Port 4 pin 1 GPIO, also usable as LCD, CapSense, or SCB0 (UART TX / I2C SDA / SPI MISO). |
| 22 | P4.2 | bidirectional | Port 4 pin 2 GPIO, also usable as CapSense modulator csd_c_mod or SCB0 SPI clock. |
| 23 | P4.3 | bidirectional | Port 4 pin 3 GPIO, also usable as CapSense sample tank csd_c_sh_tank or SCB0 SPI select. |
| 24 | P0.0 | bidirectional | Port 0 pin 0 GPIO, also usable as comparator 1 non-inverting input comp1_inp, or SCB0 SPI select. |
| 25 | P0.1 | bidirectional | Port 0 pin 1 GPIO, also usable as comparator 1 inverting input comp1_inn, or SCB0 SPI select. |
| 26 | P0.2 | bidirectional | Port 0 pin 2 GPIO, also usable as comparator 2 non-inverting input comp2_inp, or SCB0 SPI select. |
| 27 | P0.3 | bidirectional | Port 0 pin 3 GPIO, also usable as comparator 2 inverting input comp2_inn. |
| 28 | P0.4 | bidirectional | Port 0 pin 4 GPIO, also usable as LCD, CapSense, or SCB1 (UART RX / I2C SCL / SPI MOSI) alternate. |
| 29 | P0.5 | bidirectional | Port 0 pin 5 GPIO, also usable as LCD, CapSense, or SCB1 (UART TX / I2C SDA / SPI MISO) alternate. |
| 30 | P0.6 | bidirectional | Port 0 pin 6 GPIO, also usable as external clock input ext_clk or SCB1 SPI clock alternate. |
| 31 | P0.7 | bidirectional | Port 0 pin 7 GPIO, also usable as wakeup input, or SCB1 SPI select alternate. |
| 32 | XRES | input | External active-low reset input with internal pull-up; VIH is 0.7 x VDDD and VIL is 0.3 x VDDD (CMOS input). |
| 33 | VCCD | power_out | Regulated digital core supply output (nominal 1.8 V), to be bypassed with a 1 µF capacitor. |
| 34 | VDDD | power_in | Digital supply voltage, 1.8 V to 5.5 V. |
| 35 | VDDA | power_in | Analog supply voltage, 1.8 V to 5.5 V, equal to VDDD. |
| 36 | VSSA | power_in | Analog ground pin. |
| 37 | P1.0 | bidirectional | Port 1 pin 0 GPIO, also usable as op-amp 0 non-inverting input ctb.oa0.inp or PWM output tcpwm2_p[1]. |
| 38 | P1.1 | bidirectional | Port 1 pin 1 GPIO, also usable as op-amp 0 inverting input ctb.oa0.inm or PWM output tcpwm2_n[1]. |
| 39 | P1.2 | bidirectional | Port 1 pin 2 GPIO, also usable as op-amp 0 output ctb.oa0.out or PWM output tcpwm3_p[1]. |
| 40 | P1.3 | bidirectional | Port 1 pin 3 GPIO, also usable as op-amp 1 output ctb.oa1.out or PWM output tcpwm3_n[1]. |
| 41 | P1.4 | bidirectional | Port 1 pin 4 GPIO, also usable as op-amp 1 inverting input ctb.oa1.inm. |
| 42 | P1.5 | bidirectional | Port 1 pin 5 GPIO, also usable as op-amp 1 non-inverting input ctb.oa1.inp. |
| 43 | P1.6 | bidirectional | Port 1 pin 6 GPIO, also usable as alternate op-amp 0 non-inverting input ctb.oa0.inp_alt. |
| 44 | P1.7/VREF | bidirectional | Port 1 pin 7 GPIO; optional SAR ADC reference input/bypass (ext_vref) and alternate op-amp 1 input ctb.oa1.inp_alt. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Infineon Cypress Semicon |
| Package | LQFP-44(10x10) |
| Category | Embedded Processors & Controllers |
| Pins | 44 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Digital supply voltage, absolute maximum (rel. VSSD) | VDDD_ABS | -0.5 | 6 | V | 最大绝对值 | 18 | |
| Direct digital core input voltage, absolute maximum (rel. VSSD) | VCCD_ABS | -0.5 | 1.95 | V | 最大绝对值 | 18 | |
| GPIO voltage, absolute maximum | VGPIO_ABS | -0.5 | V | 最大绝对值 | 18 | ||
| Maximum current per GPIO | IGPIO_ABS | -25 | 25 | mA | 最大绝对值 | 18 | |
| GPIO injection current | IGPIO_injection | -0.5 | 0.5 | mA | 最大绝对值，每个引脚的灌电流 | 18 | |
| ESD human body model | ESD_HBM | 2200 | V | 18 | |||
| ESD charged device model | ESD_CDM | 500 | V | 18 | |||
| Latch-up pin current | LU | -200 | 200 | mA | 18 | ||
| Operating ambient temperature | TA | -40 | 25 | 85 | °C | 35 | |
| Operating junction temperature | TJ | -40 | 100 | °C | 35 | ||
| Digital supply voltage input (regulator enabled) | VDDD | 1.8 | 5.5 | V | 使能内部电压调节器 | 18 | |
| Unregulated digital supply voltage input (regulator bypassed) | VDDD | 1.71 | 1.8 | 1.89 | V | 旁路内部电压调节器 | 18 |
| External regulator bypass capacitor | CEFC | 1 | 1.3 | 1.6 | µF | 绝缘介质为 X5R 的陶瓷或性能更好的电容 | 18 |
| CPU frequency | FCPU | 24 | MHz | 1.71 ≤ VDD ≤ 5.5 | 19 | ||
| Wakeup time from deep sleep | TDEEPSLEEP | 25 | µs | 24 MHz IMO。由特性决定 | 19 | ||
| External reset pulse width (XRES) | TRESETWIDTH | 1 | µs | 由特性决定 | 21 | ||
| LVTTL input high voltage | VIH | 2 | V | LVTTL 输入, VDDD ≥ 2.7 V | 20 | ||
| LVTTL input low voltage | VIL | 0.8 | V | LVTTL 输入, VDDD ≥ 2.7 V | 20 | ||
| Output low voltage | VOL | 0.6 | V | VDDD = 1.8 V 时, IOL = 4 mA | 20 | ||
| Output low voltage | VOL | 0.4 | V | VDDD = 3 V 时, IOL = 3 mA | 20 | ||
| GPIO pull-up resistance | RPULLUP | 3.5 | 5.6 | 8.5 | kΩ | 20 | |
| GPIO pull-down resistance | RPULLDOWN | 3.5 | 5.6 | 8.5 | kΩ | 20 | |
| Input leakage current (absolute value) | IIL | 2 | nA | 温度 = 25 °C， VDDD = 3.0 V | 20 | ||
| Input capacitance | CIN | 7 | pF | 20 | |||
| LVTTL input hysteresis | VHYSTTL | 25 | 40 | mV | VDDD ≥ 2.7 V。由特性决定 | 20 | |
| Maximum total chip source or sink current | ITOT_GPIO | 200 | mA | 由特性决定 | 20 | ||
| XRES pull-up resistance | RPULLUP | 3.5 | 5.6 | 8.5 | kΩ | 21 | |
| Rise time, fast strong drive mode | TRISEF | 2 | 12 | ns | VDDD = 3.3 V， Cload = 25 pF | 21 | |
| Rise time, slow strong drive mode | TRISES | 10 | 60 | ns | VDDD = 3.3 V， Cload = 25 pF | 21 | |
| GPIO output operating frequency, fast strong mode | FGPIOUT1 | 24 | MHz | 3.3 V ≤ VDDD ≤ 5.5 V，快速强驱动模式，90/10%、25 pF 负载、60/40 占空比 | 21 | ||
| GPIO output operating frequency, fast strong mode | FGPIOUT2 | 16.7 | MHz | 1.7 V ≤ VDDD ≤ 3.3 V，快速强驱动模式，90/10%、25 pF 负载、60/40 占空比 | 21 | ||
| GPIO output operating frequency, slow strong mode | FGPIOUT3 | 7 | MHz | 3.3 V ≤ VDDD ≤ 5.5 V，慢速强驱动模式，90/10%、25 pF 负载、60/40 占空比 | 21 | ||
| GPIO input operating frequency | FGPIOIN | 24 | MHz | 1.71 V ≤ VDDD ≤ 5.5 V，90/10% VIO | 21 | ||
| Active mode current, executing from flash at 6 MHz | IDD5 | 2.8 | mA | 活动模式，VDDD = 1.71 V ~ 5.5 V；从闪存执行；CPU 6 MHz | 18 | ||
| Active mode current, executing from flash at 12 MHz | IDD8 | 4.2 | mA | 活动模式，VDDD = 1.71 V ~ 5.5 V；从闪存执行；CPU 12 MHz | 18 | ||
| Active mode current, executing from flash at 24 MHz | IDD12 | 7.2 | mA | 活动模式，VDDD = 1.71 V ~ 5.5 V；从闪存执行；CPU 24 MHz | 18 | ||
| Sleep mode current, I2C wakeup/WDT/comparators on, 6 MHz | IDD20 | 1.3 | 1.8 | mA | 睡眠模式，VDDD = 1.7 V ~ 5.5 V；I2C 唤醒功能、WDT 和比较器打开，6 MHz | 19 | |
| Sleep mode current, I2C wakeup/WDT/comparators on, 12 MHz | IDD20A | 1.7 | 2.2 | mA | 睡眠模式，VDDD = 1.7 V ~ 5.5 V；I2C 唤醒功能、WDT 和比较器打开，12 MHz | 19 | |
| Deep sleep current, regulator enabled, 85 °C | IDD27 | 50 | µA | 深度睡眠模式，VDDD = 1.8 V ~ 3.6 V（使能电压调节器）；I2C 唤醒和 WDT 打开，温度 = 85 °C | 19 | ||
| Deep sleep current, regulator bypassed, 85 °C | IDD33 | 440 | µA | 深度睡眠模式，VDDD = 1.71 V ~ 1.89 V（旁路电压调节器）；I2C 唤醒和 WDT 打开，温度 = 85 °C | 19 | ||
| Hibernate current, GPIO and reset active, 85 °C | IDD36 | 1 | µA | 休眠模式，VDDD = 1.8 V ~ 3.6 V（电压调节器被使能）；GPIO 和复位有效，温度 = 85 °C | 19 | ||
| Stop mode current | IDD43A | 20 | 80 | nA | 停止模式下的电流；VDD = 3.6 V | 19 | |
| Supply current when triggering XRES | IDD_XR | 2 | 5 | mA | 触发 XRES 时的供电电流 | 19 | |
| Opamp module current, high power, no load | IDD_HI | 1000 | 1300 | µA | 无负载。功耗 = 高 | 22 | |
| Opamp gain-bandwidth, high power | GBW_HI | 6 | MHz | 负载 = 20 pF， 0.1 mA。VDDA = 2.7 V。功耗 = 高 | 22 | ||
| Opamp slew rate, high power | Slew_rate | 6 | V/µsec | Cload = 50 pF，功耗 = 高，VDDA ≥ 2.7 V | 22 | ||
| Opamp maximum capacitive load, stable output mode | Cload | 125 | pF | 稳定输出模式下的最大负载，Cload = 50 pF 时满足性能规范 | 22 | ||
| Comparator input offset voltage | VOFFSET2 | -4 | 4 | mV | 23 | ||
| Comparator common-mode rejection ratio | CMRR | 50 | dB | VDDD ≥ 2.7 V。由特性决定 | 23 | ||
| Comparator module current, normal mode | ICMP1 | 280 | µA | 由特性决定 | 23 | ||
| SAR ADC integral nonlinearity | A_INL | -1.7 | 2 | LSB | VDD = 1.71 ~ 5.5 V，采样率 = 806 Ksps，Vref = 1 ~ 5.5 V。 | 24 | |
| SAR ADC signal-to-noise and distortion ratio (SINAD) | A_SNDR | 65 | dB | FIN = 10 kHz | 24 | ||
| Temperature sensor accuracy | TSENSACC | -5 | 5 | °C | -40 ~ +85 °C | 23 | |
| Flash erase and program voltage | VPE | 1.71 | 5.5 | V | 擦除和编程电压 | 29 | |
| Flash row (block) write time, erase and program | TROWWRITE | 20 | ms | 行（块）= 128 个字节 | 29 | ||
| IMO frequency tolerance | FIMOTOL1 | -2 | 2 | % | 频率在 3 到 48 MHz 的范围内变化，调用 API 进行校准 | 31 | |
| External capacitor CMOD | CMOD | 2.2 | nF | 5 V 的额定电压，X7R 或 NP0 电容 | 25 | ||
| Junction-to-ambient thermal resistance (44-TQFP) | TJA | 57.16 | °C/Watt | 35 | |||
| Junction-to-case thermal resistance (44-TQFP) | TJC | 17.47 | °C/Watt | 35 |
CAD (KiCad official)
- Symbol:
CY8C4125AXI-483 - Footprint:
Package_QFP:LQFP-44_10x10mm_P0.8mm - 3D model: LQFP-44(10x10) (KiCad packages3D, STEP)
- 3D model files:
cy8c4125axi-483-etched.step/cy8c4125axi-483-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);cy8c4125axi-483.step/cy8c4125axi-483.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Infineon Cypress Semicon datasheet (43 pp, sha256
72c180760d184cef, retrieved 2026-10-21, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).