CY8C4045LQI-T412

{
  "slug": "cy8c4045lqi-t412",
  "version": "0.1.0",
  "type": "component",
  "description": "Infineon Technologies , QFN-24(4x4). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
  "tags": [
    "component",
    "ic",
    "cy8c4045lqi-t412",
    "factory-2.0.0",
    "extractor-text"
  ],
  "dependencies": {},
  "hero": {
    "type": "image",
    "path": "docs/hero.png"
  },
  "files": [
    "page.json",
    "README.md",
    "cy8c4045lqi-t412.kicad_sym",
    "cy8c4045lqi-t412.kicad_mod",
    "cy8c4045lqi-t412.glb",
    "cy8c4045lqi-t412.step",
    "cy8c4045lqi-t412.lbr",
    "docs/hero.png",
    "docs/cy8c4045lqi-t412-datasheet.pdf",
    "viewers/symbol.html",
    "viewers/footprint.html",
    "cy8c4045lqi-t412-hero.glb",
    "cy8c4045lqi-t412-hero.overlay.json",
    "cy8c4045lqi-t412-etched.glb"
  ],
  "component": {
    "mpn": "CY8C4045LQI-T412",
    "manufacturer": "Infineon Technologies",
    "package": "QFN-24(4x4)",
    "pin_count": 25,
    "category": "IC",
    "subcategory": "IC",
    "datasheet": "https://www.infineon.com/dgdl/Infineon-PSoC_4000T_MCU_datasheet-DataSheet-v09_00-EN.pdf?fileId=8ac78c8c8a44f57b018a799f5fb53b5d",
    "parts": {
      "symbol": "cy8c4045lqi-t412.kicad_sym",
      "footprint": "cy8c4045lqi-t412.kicad_mod",
      "model_3d": "cy8c4045lqi-t412-hero.glb",
      "model_3d_plain": "cy8c4045lqi-t412-etched.glb",
      "model_3d_step": "cy8c4045lqi-t412-etched.step",
      "model_3d_step_plain": "cy8c4045lqi-t412.step",
      "lbr": "cy8c4045lqi-t412.lbr"
    },
    "distributor_links": {
      "lcsc": "C28391720",
      "digikey": "448-CY8C4045LQI-T412-ND",
      "mouser": "726-CY8C4045LQI-T412"
    },
    "distributor_check": {
      "checked_at": "2026-10-30T15:35:40Z",
      "source": "Component Ocean /api/assign-pns",
      "digikey": {
        "pn": "448-CY8C4045LQI-T412-ND",
        "status": "found"
      },
      "mouser": {
        "pn": "726-CY8C4045LQI-T412",
        "status": "found"
      }
    },
    "pins": [
      {
        "number": "1",
        "name": "P2.1",
        "type": "bidirectional",
        "description": "General-purpose I/O; Table 2 lists MSCLP sense input csd.msc_gpio_ctrl_sns[8], Deep Sleep csd.msc_ddrv[8] and csd.obs_data[2] as its alternate functions."
      },
      {
        "number": "2",
        "name": "P2.2",
        "type": "bidirectional",
        "description": "General-purpose I/O; alternate functions include csd.msc_gpio_ctrl_sns[9], tcpwm.line[0]:1, scb[0].uart_rx:3, tcpwm.tr_in[4], scb[1].i2c_scl:1 and scb[0].spi_mosi:3 per Table 2."
      },
      {
        "number": "3",
        "name": "P2.3",
        "type": "bidirectional",
        "description": "General-purpose I/O; alternate functions include csd.msc_gpio_ctrl_sns[10], tcpwm.line_compl[0]:1, scb[0].uart_tx:3, tcpwm.tr_in[5], scb[1].i2c_sda:1 and scb[0].spi_miso:3 per Table 2."
      },
      {
        "number": "4",
        "name": "P2.4",
        "type": "bidirectional",
        "description": "General-purpose I/O; alternate functions include csd.msc_gpio_ctrl_sns[11], tcpwm.line[1]:1, scb[0].uart_cts:3, csd.ext_sync:1 and scb[0].spi_clk:3 per Table 2."
      },
      {
        "number": "5",
        "name": "P2.5",
        "type": "bidirectional",
        "description": "General-purpose I/O; alternate functions include csd.msc_gpio_ctrl_sns[12], tcpwm.line_compl[1]:1, scb[0].uart_rts:3, csd.ext_sync_clk:1 and scb[0].spi_select0:3 per Table 2."
      },
      {
        "number": "6",
        "name": "P3.0",
        "type": "bidirectional",
        "description": "General-purpose I/O; alternate functions include csd.msc_gpio_ctrl_sns[13], tcpwm.line[0]:0, scb[0].uart_rx:1, csd.ext_frm_start:1, scb[0].i2c_scl:1 and scb[0].spi_mosi:1 per Table 2."
      },
      {
        "number": "7",
        "name": "P3.2",
        "type": "bidirectional",
        "description": "General-purpose I/O; alternate functions include csd.msc_gpio_ctrl_sns[15], tcpwm.line[1]:0, scb[0].uart_cts:1, cpuss.swd_data:0, scb[1].i2c_sda:0 and scb[0].spi_clk:1 per Table 2."
      },
      {
        "number": "8",
        "name": "P3.3",
        "type": "bidirectional",
        "description": "General-purpose I/O; alternate functions include csd.msc_gpio_ctrl_sns[16], tcpwm.line_compl[1]:0, scb[0].uart_rts:1, cpuss.swd_clk:0, scb[1].i2c_scl:0 and scb[0].spi_select0:1 per Table 2."
      },
      {
        "number": "9",
        "name": "P4.0",
        "type": "bidirectional",
        "description": "General-purpose I/O; alternate functions include csd.msc_gpio_ctrl_sns[17], scb[0].uart_rx:0, tcpwm.tr_in[6], scb[0].i2c_scl:0 and scb[0].spi_mosi:2 per Table 2."
      },
      {
        "number": "10",
        "name": "P4.1",
        "type": "bidirectional",
        "description": "General-purpose I/O; alternate functions include csd.msc_gpio_ctrl_sns[18], scb[0].uart_tx:0, scb[0].i2c_sda:0 and scb[0].spi_miso:2 per Table 2."
      },
      {
        "number": "11",
        "name": "P4.2",
        "type": "bidirectional",
        "description": "General-purpose I/O; MSCLP control csd.msc_gpio_ctrl_cmod1 with csd.msc_cmod1_ddrv, plus alternate functions scb[0].uart_cts:0 and scb[0].spi_clk:2 per Table 2."
      },
      {
        "number": "12",
        "name": "P4.3",
        "type": "bidirectional",
        "description": "General-purpose I/O; MSCLP control csd.msc_gpio_ctrl_cmod2 with csd.msc_cmod2_ddrv, plus alternate functions scb[0].uart_rts:0 and scb[0].spi_select0:2 per Table 2."
      },
      {
        "number": "13",
        "name": "P0.0",
        "type": "bidirectional",
        "description": "General-purpose I/O; alternate functions include csd.msc_gpio_ctrl_sns[0], tcpwm.tr_in[0], csd.msc_ddrv[0], csd.ext_sync:0 and scb[0].spi_select1:0 per Table 2."
      },
      {
        "number": "14",
        "name": "P0.1",
        "type": "bidirectional",
        "description": "General-purpose I/O; alternate functions include csd.msc_gpio_ctrl_sns[1], tcpwm.tr_in[1], csd.msc_ddrv[1], csd.ext_sync_clk:0 and scb[0].spi_select2:0 per Table 2."
      },
      {
        "number": "15",
        "name": "P0.2",
        "type": "bidirectional",
        "description": "General-purpose I/O; alternate functions include csd.msc_gpio_ctrl_sns[2], scb[0].uart_rx:2, csd.msc_ddrv[2], cpuss.swd_clk:1, scb[0].i2c_scl:2 and scb[0].spi_mosi:0 per Table 2."
      },
      {
        "number": "16",
        "name": "P0.3",
        "type": "bidirectional",
        "description": "General-purpose I/O; alternate functions include csd.msc_gpio_ctrl_sns[3], scb[0].uart_tx:2, csd.msc_ddrv[3], cpuss.swd_data:1, scb[0].i2c_sda:2 and scb[0].spi_miso:0 per Table 2."
      },
      {
        "number": "17",
        "name": "P0.4",
        "type": "bidirectional",
        "description": "General-purpose I/O; alternate functions include csd.msc_gpio_ctrl_sns[4], srss.ext_clk, scb[0].uart_cts:2, csd.msc_ddrv[4], csd.ext_frm_start:0 and scb[0].spi_clk:0 per Table 2."
      },
      {
        "number": "18",
        "name": "XRES",
        "type": "input",
        "description": "Reset pin XRES as listed in Table 1 for the 24-QFN package; the excerpt gives no reset polarity, threshold or other electrical limits for it."
      },
      {
        "number": "19",
        "name": "VCCD",
        "type": "power_out",
        "description": "Regulated digital supply of 1.8 V ±5%; in Mode 1 it must be bypassed to ground with a 2.2 µF X5R ceramic (or better) capacitor and must not be connected to anything else, while in Mode 2 it is shorted to VDDD."
      },
      {
        "number": "20",
        "name": "VSSD",
        "type": "power_in",
        "description": "Ground pin for the digital section."
      },
      {
        "number": "21",
        "name": "VDDD",
        "type": "power_in",
        "description": "Power supply for the digital section, 2.0 V to 5.5 V in Mode 1 (internal regulator active) or 1.71 V to 1.89 V in Mode 2 (externally regulated 1.8 V ±5%)."
      },
      {
        "number": "22",
        "name": "VSSA",
        "type": "power_in",
        "description": "Ground pin for the CAPSENSE sections."
      },
      {
        "number": "23",
        "name": "P1.0",
        "type": "bidirectional",
        "description": "General-purpose I/O; alternate functions include csd.msc_gpio_ctrl_sns[6], tcpwm.line[1]:2, tcpwm.tr_in[2], csd.msc_ddrv[6] and scb[0].spi_select3:0 per Table 2."
      },
      {
        "number": "24",
        "name": "P2.0",
        "type": "bidirectional",
        "description": "General-purpose I/O; alternate functions include csd.msc_gpio_ctrl_sns[7], tcpwm.line_compl[1]:2, tcpwm.tr_in[3], csd.msc_ddrv[7] and csd.obs_data[3] per Table 2."
      },
      {
        "number": "25",
        "name": "EP",
        "type": "passive",
        "description": "Exposed pad (from the footprint; not named in the datasheet pin table)."
      }
    ],
    "provenance": {
      "extractor": "extract_pins 0.3",
      "factory_chain": {
        "factory": "2.0.0",
        "extractor": "extract_pins 0.3",
        "primary_model": "claude-haiku-5-5",
        "primary_mode": "text",
        "consensus_model": "claude-sonnet-5-5",
        "consensus": "agreed",
        "guards": "pin_guards 0.1: passed",
        "guard_notes": [
          "extractor flagged: The 24-QFN column of Table 1 is read by column alignment. The P2.1 row ('1 P2.1 A5 P2.1 – –') has it; The requested package is 24-QFN, which is the LQ package for CY8C4045LQI-T412 (Table 29). The excerp; The excerpt contains no pin-level electrical limits (absolute maximum or operating voltages for GPIO",
          "exposed pad 25 added from the footprint",
          "2/25 pins cited to the wrong page (name found elsewhere): ['19:VCCD@p16', '21:VDDD@p16']"
        ],
        "pages_sent": 19,
        "cost_usd": 0.1142,
        "at": "2026-10-30T15:35:01"
      },
      "datasheet": {
        "url": "https://www.infineon.com/dgdl/Infineon-PSoC_4000T_MCU_datasheet-DataSheet-v09_00-EN.pdf?fileId=8ac78c8c8a44f57b018a799f5fb53b5d",
        "pages": 46,
        "sha256": "91700ca10102b80f",
        "source_tier": "mfr"
      },
      "cad": "KiCad official (CC-BY-SA 4.0)",
      "pins": {
        "total": 25,
        "described": 25,
        "cites_pages": true,
        "refuses_to_fabricate": true
      }
    },
    "viewers": {
      "symbol": "viewers/symbol.html",
      "footprint": "viewers/footprint.html"
    },
    "models_3d": [
      {
        "file": "cy8c4045lqi-t412.step",
        "role": "plain",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          4.0,
          4.0,
          0.77
        ],
        "zmin_mm": 0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "096fc110543e6d324c5120c2d38e3dca87a389da9b6fac234f1fe40856295ef4",
        "checked": "2026-10-30",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      },
      {
        "file": "cy8c4045lqi-t412-etched.step",
        "role": "eda",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          4.0,
          4.0,
          0.77
        ],
        "zmin_mm": 0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "2fb2ad8f3593b70c7d9e4a0239eafa65bdb1fe99f1655dcf9c418f50d6bad7a7",
        "checked": "2026-10-30",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      }
    ],
    "package_dims": {
      "package_code": "BID27",
      "source_page": 35,
      "e": {
        "nom_mm": 0.5,
        "range_mm": [
          null,
          null
        ]
      },
      "source": "datasheet package drawing, every number found on its page (extract_pins --task dims)",
      "model_check": {
        "file": "cy8c4045lqi-t412.step",
        "verdict": "SKIP",
        "reasons": [
          "the datasheet dimensions give no height or body size to compare"
        ],
        "by": "factory/package_fit.py"
      }
    }
  }
}