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CY8C4045LQI-T412

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Infineon Technologies , QFN-24(4x4). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

componenticcy8c4045lqi-t412factory-2.0.0extractor-text

Verified CY8C4045LQI-T412

by Ray · last 30 Oct 2026 · 1 record · files match
SymbolFootprint3D modelPins

Verification log 1 record

30 Oct 2026RayPublished by the parts factory: tier mfr, 25 pinsfiles match
SymbolFootprint3D modelPinsfor all variants
  • ✓component-page-verify: PASS
  • ✓cad_props: Datasheet, MPN and distributor properties match page.json
  • ✓component: CY8C4045LQI-T412 · QFN-24(4x4) · 25 pins
  • ✓copper: 25 copper pads, none touching another net
  • ✓datasheet: all 25 pin names found in the 46-page datasheet
  • ✓distributor: lcsc C28391720, digikey 448-CY8C4045LQI-T412-ND, mouser 726-CY8C4045LQI-T412
  • ✓family: QFN-24-1EP_4x4mm_P0.5mm_EP2.6x2.6mm
  • ✓files: 7 declared files present
  • ✓hero: docs/hero.png 4000x2500
  • ✓lbr: OK: /tmp/cpv-aa8vw7eo/x.lbr is a valid EAGLE .lbr with complete deviceset
  • ✓license: CC-BY-SA-4.0
  • ✓models_3d: 2 records
  • •package_fit (skip): the datasheet dimensions give no height or body size to compare (datasheet p.35)
  • ✓pads: 25 pins = 25 pads
  • ✓pose: 2 STEP(s) Z-up, seated, centred
  • ✓symbol: 25 pins agree
  • ✓visibility: public, source open
Evidencedatasheet
Verified files✓ cy8c4045lqi-t412.kicad_sym✓ cy8c4045lqi-t412.kicad_mod✓ cy8c4045lqi-t412.step
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docs Publish 0.1.0 · Ray
viewers cy8c4045lqi-t412: viewers · Ray
cy8c4045lqi-t412-etched.glb Publish 0.1.0 · Ray
cy8c4045lqi-t412-etched.step cy8c4045lqi-t412: factory component page (tier=mfr) · Ray
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cy8c4045lqi-t412-hero.overlay.json Publish 0.1.0 · Ray
cy8c4045lqi-t412.glb Publish 0.1.0 · Ray
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cy8c4045lqi-t412.lbr Publish 0.1.0 · Ray
cy8c4045lqi-t412.step Publish 0.1.0 · Ray
package.json Publish 0.1.0 · Ray
page.json Set visibility: public · Ray
README.md Publish 0.1.0 · Ray
verification.json Verified: Published by the parts factory: tier mfr, 25 pins · Ray

CY8C4045LQI-T412

Infineon Technologies · IC · QFN-24(4x4)

CY8C4045LQI-T412 from Infineon Technologies, in a QFN-24(4x4). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 P2.1 bidirectional General-purpose I/O; Table 2 lists MSCLP sense input csd.msc_gpio_ctrl_sns[8], Deep Sleep csd.msc_ddrv[8] and csd.obs_data[2] as its alternate functions.
2 P2.2 bidirectional General-purpose I/O; alternate functions include csd.msc_gpio_ctrl_sns[9], tcpwm.line[0]:1, scb[0].uart_rx:3, tcpwm.tr_in[4], scb[1].i2c_scl:1 and scb[0].spi_mosi:3 per Table 2.
3 P2.3 bidirectional General-purpose I/O; alternate functions include csd.msc_gpio_ctrl_sns[10], tcpwm.line_compl[0]:1, scb[0].uart_tx:3, tcpwm.tr_in[5], scb[1].i2c_sda:1 and scb[0].spi_miso:3 per Table 2.
4 P2.4 bidirectional General-purpose I/O; alternate functions include csd.msc_gpio_ctrl_sns[11], tcpwm.line[1]:1, scb[0].uart_cts:3, csd.ext_sync:1 and scb[0].spi_clk:3 per Table 2.
5 P2.5 bidirectional General-purpose I/O; alternate functions include csd.msc_gpio_ctrl_sns[12], tcpwm.line_compl[1]:1, scb[0].uart_rts:3, csd.ext_sync_clk:1 and scb[0].spi_select0:3 per Table 2.
6 P3.0 bidirectional General-purpose I/O; alternate functions include csd.msc_gpio_ctrl_sns[13], tcpwm.line[0]:0, scb[0].uart_rx:1, csd.ext_frm_start:1, scb[0].i2c_scl:1 and scb[0].spi_mosi:1 per Table 2.
7 P3.2 bidirectional General-purpose I/O; alternate functions include csd.msc_gpio_ctrl_sns[15], tcpwm.line[1]:0, scb[0].uart_cts:1, cpuss.swd_data:0, scb[1].i2c_sda:0 and scb[0].spi_clk:1 per Table 2.
8 P3.3 bidirectional General-purpose I/O; alternate functions include csd.msc_gpio_ctrl_sns[16], tcpwm.line_compl[1]:0, scb[0].uart_rts:1, cpuss.swd_clk:0, scb[1].i2c_scl:0 and scb[0].spi_select0:1 per Table 2.
9 P4.0 bidirectional General-purpose I/O; alternate functions include csd.msc_gpio_ctrl_sns[17], scb[0].uart_rx:0, tcpwm.tr_in[6], scb[0].i2c_scl:0 and scb[0].spi_mosi:2 per Table 2.
10 P4.1 bidirectional General-purpose I/O; alternate functions include csd.msc_gpio_ctrl_sns[18], scb[0].uart_tx:0, scb[0].i2c_sda:0 and scb[0].spi_miso:2 per Table 2.
11 P4.2 bidirectional General-purpose I/O; MSCLP control csd.msc_gpio_ctrl_cmod1 with csd.msc_cmod1_ddrv, plus alternate functions scb[0].uart_cts:0 and scb[0].spi_clk:2 per Table 2.
12 P4.3 bidirectional General-purpose I/O; MSCLP control csd.msc_gpio_ctrl_cmod2 with csd.msc_cmod2_ddrv, plus alternate functions scb[0].uart_rts:0 and scb[0].spi_select0:2 per Table 2.
13 P0.0 bidirectional General-purpose I/O; alternate functions include csd.msc_gpio_ctrl_sns[0], tcpwm.tr_in[0], csd.msc_ddrv[0], csd.ext_sync:0 and scb[0].spi_select1:0 per Table 2.
14 P0.1 bidirectional General-purpose I/O; alternate functions include csd.msc_gpio_ctrl_sns[1], tcpwm.tr_in[1], csd.msc_ddrv[1], csd.ext_sync_clk:0 and scb[0].spi_select2:0 per Table 2.
15 P0.2 bidirectional General-purpose I/O; alternate functions include csd.msc_gpio_ctrl_sns[2], scb[0].uart_rx:2, csd.msc_ddrv[2], cpuss.swd_clk:1, scb[0].i2c_scl:2 and scb[0].spi_mosi:0 per Table 2.
16 P0.3 bidirectional General-purpose I/O; alternate functions include csd.msc_gpio_ctrl_sns[3], scb[0].uart_tx:2, csd.msc_ddrv[3], cpuss.swd_data:1, scb[0].i2c_sda:2 and scb[0].spi_miso:0 per Table 2.
17 P0.4 bidirectional General-purpose I/O; alternate functions include csd.msc_gpio_ctrl_sns[4], srss.ext_clk, scb[0].uart_cts:2, csd.msc_ddrv[4], csd.ext_frm_start:0 and scb[0].spi_clk:0 per Table 2.
18 XRES input Reset pin XRES as listed in Table 1 for the 24-QFN package; the excerpt gives no reset polarity, threshold or other electrical limits for it.
19 VCCD power_out Regulated digital supply of 1.8 V ±5%; in Mode 1 it must be bypassed to ground with a 2.2 µF X5R ceramic (or better) capacitor and must not be connected to anything else, while in Mode 2 it is shorted to VDDD.
20 VSSD power_in Ground pin for the digital section.
21 VDDD power_in Power supply for the digital section, 2.0 V to 5.5 V in Mode 1 (internal regulator active) or 1.71 V to 1.89 V in Mode 2 (externally regulated 1.8 V ±5%).
22 VSSA power_in Ground pin for the CAPSENSE sections.
23 P1.0 bidirectional General-purpose I/O; alternate functions include csd.msc_gpio_ctrl_sns[6], tcpwm.line[1]:2, tcpwm.tr_in[2], csd.msc_ddrv[6] and scb[0].spi_select3:0 per Table 2.
24 P2.0 bidirectional General-purpose I/O; alternate functions include csd.msc_gpio_ctrl_sns[7], tcpwm.line_compl[1]:2, tcpwm.tr_in[3], csd.msc_ddrv[7] and csd.obs_data[3] per Table 2.
25 EP passive Exposed pad (from the footprint; not named in the datasheet pin table).

Key specifications

Parameter Value
Manufacturer Infineon Technologies
Package QFN-24(4x4)
Category
Pins 25

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Analog or digital supply relative to VSS (VSSD = VSSA) VDD_ABS -0.5 6 V Absolute maximum 18
Direct digital core voltage input relative to VSSD VCCD_ABS -0.5 1.95 V Absolute maximum 18
GPIO voltage; VDDD or VDDA VGPIO_ABS -0.5 V Absolute maximum; upper limit printed as VDDD+0.5 18
Current per GPIO IGPIO_ABS -25 25 mA Absolute maximum 18
GPIO injection current per pin IGPIO_injection -0.5 0.5 mA Absolute maximum 18
Electrostatic discharge voltage (HBM) ESD_HBM -2 2 kV Human Body Model (HBM) robustness according to ANSI/ESDA/JEDEC JS-001 18
Electrostatic discharge voltage (CDM) ESD_CDM -1 1 kV Charged Device Model (CDM) robustness according to ANSI/ESDA/JEDEC JS-002; voltage level refers to test condition (TC) mentioned in the standard 18
Latch-up current limits I_LU -100 100 mA Max/min current into any input or output, pin-to-pin, pin-to-supply at 125°C ambient 18
Power supply input voltage (internal regulator enabled) VDDD 2 5.5 V With internal regulator enabled 18
Power supply input voltage (1.8 V external supply) VDDD 1.71 1.8 1.89 V Internal regulator enabled; VCCD connected to VDDD 18
Active current, execute from flash, CPU at 6 MHz IDD5 1.8 2.7 mA Active mode, VDDD = 1.71 V to 5.5 V; Typ = 25°C @ VDDD = 3.3 V, Max = 85°C @ 5.5 V 18
Active current, execute from flash, CPU at 24 MHz IDD11 3 4.8 mA Active mode, VDDD = 1.71 V to 5.5 V; Typ = 25°C @ VDDD = 3.3 V, Max = 85°C @ 5.5 V 18
Active current, execute from flash, CPU at 48 MHz IDD14 5.4 6.9 mA Active mode, VDDD = 1.71 V to 5.5 V; Typ = 25°C @ VDDD = 3.3V, Max = 85°C @ 5.5 V 18
Sleep current, I2C wakeup, WDT and comparators on, 6 MHz (VDDD 2.0 to 5.5 V) IDD17 1.7 2.2 mA Sleep mode, VDDD = 2.0 V to 5.5 V (regulator on); Typ = 25°C @ VDDD = 3.3 V, Max = 85°C @ 5.5 V 18
Sleep current, I2C wakeup, WDT and comparators on, 12 MHz (VDDD 2.0 to 5.5 V) IDD20 2.2 2.5 mA Sleep mode, VDDD = 2.0 V to 5.5 V (regulator on); Typ = 25°C @ VDDD = 3.3 V, Max = 85°C @ 5.5 V 18
Sleep current, I2C wakeup, WDT and comparators on, 6 MHz (VDDD 1.71 to 1.89 V) IDD23 1.7 2.2 mA Sleep mode, VDDD = 1.71 to 1.89 V; Typ = 25°C @ VDDD = 1.8 V, Max = 85°C @ 1.89 V 19
Sleep current, I2C wakeup, WDT and comparators on, 2 MHz (VDDD 1.71 to 1.89 V) IDD23A 2.2 2.5 mA Sleep mode, VDDD = 1.71 to 1.89 V; Typ = 25°C @ VDDD = 1.8 V, Max = 85°C @ 1.89 V 19
Deep Sleep current, I2C wakeup and WDT on (VDDD 2.0 to 3.6 V) IDD26 2.5 60 µA Deep Sleep mode, VDDD = 2.0 to 3.6 V; Typ = 25°C @ VDDD = 3.3 V, Max = 85°C @ 3.6 V 19
Deep Sleep current, I2C wakeup and WDT on (VDDD 2.0 to 3.6 V, 55°C) IDD26A 2.5 18 µA Deep Sleep mode, VDDD = 2.0 to 3.6 V; Typ = 25°C @ VDDD = 3.3 V, Max = 55°C @ 3.6 V 19
Deep Sleep current, I2C wakeup and WDT on (VDDD 3.6 to 5.5 V) IDD29 2.5 60 µA Deep Sleep mode, VDDD = 3.6 to 5.5 V; Typ = 25°C @ VDDD= 3.3 V, Max = 85°C @ 5.5 V 19
Deep Sleep current, I2C wakeup and WDT on (VDDD 3.6 to 5.5 V, 55°C) IDD29A 2.5 19 µA Deep Sleep mode, VDDD = 3.6 to 5.5 V; Typ = 25°C @ VDDD= 3.3 V, Max = 55°C @ VDDD = 5.5 V 19
Deep Sleep current, I2C wakeup and WDT on (VDDD 1.71 to 1.89 V) IDD32 2.5 65 µA Deep Sleep mode, VDDD = 1.71 to 1.89 V; Typ = 25°C @ VDDD = 1.8 V, Max = 85°C @ 1.89 V 19
Deep Sleep current, I2C wakeup and WDT on (VDDD 1.71 to 1.89 V, 55°C) IDD32A 2.5 16 µA Deep Sleep mode, VDDD = 1.71 to 1.89 V; Typ = 25°C @ VDDD = 1.8 V, Max = 55°C @ 1.89 V 19
Supply current while XRES asserted IDD_XR 2 5 mA 19
Current through protection diode to VDDD/VSS (XRES) IDIODE 100 µA 21
Reset pulse width TRESETWIDTH 1 µs 21
Wake-up time from reset release TRESETWAKE 2.7 ms 21
Input capacitance (XRES) CIN 7 pF 21
Max allowed ripple on power supply, 1 kHz to 10 MHz VDD_RIPPLE -50 50 mV VDDD ≥ 2 V (with ripple), 25°C TA, Sensitivity ≥ 50 counts/0.1 pF, 2 pF < Cs < 50 pF 22
Max allowed ripple on power supply, 1 kHz to 10 MHz (1.8 V) VDD_RIPPLE_1.8 -25 25 mV VDDD ≥ 1.75 V (with ripple), 25°C TA, sensitivity ≥ 50 counts / 0.1 µH, 0.1 µH < Lx < 150 µH 22
Modulator frequency FMOD 46 MHz All VDDD 22
MSCLP clock frequency variation at 25 MHz, 38 MHz, and 46 MHz FMSCLP_IMO_TOL -2 2.5 % All VDDD 22
Voltage range of operation (MSCLP) VMSC_LP 1.71 5.5 V 1.8 V ±5% externally regulated, 2 V to 5.5 V externally unregulated 22
Required tolerance on CMOD capacitance value CMOD -5 5 % 22
Ratio of counts of finger to noise (CAPSENSE SNR) SNR 5 Ratio Capacitance range of 5 to 50 pF, sensitivity ≥ 50 counts / 0.1 pF, VDDA ≥ 2 V 23
Capacitive sense frequency range FCAPSENSE 45 6000 kHz 23
Input capacitance range for self-capacitance CIN_Self 2 200 pF 23
Input capacitance range for mutual capacitance CIN_Mutual 0.5 30 pF 23
Supported sensor inductance range LX 0.1 200 µH 24
Signal to noise ratio (inductive sensing) SNR 5 Ratio LX range of 1 to 150 µH, sensitivity ≥ 50 counts / 0.1 µH, VDDA ≥ 2 V 24
Sensor excitation frequency FLX 40 5700 kHz 24
Refresh rate (inductive sensing) 2500 sps 1 sensors, 200 µs scan time 24
Proximity detection range RLPROX 50 100 % dOUT % of diameter/ diagonal of the sensor 24
Scan initialization time after power on TINIT 0.1 0.5 10 ms 24
SWD clock frequency, 3.3 V to 5.5 V F_SWDCLK1 14 MHz 3.3 V ≤ VDDD ≤ 5.5 V; SWDCLK ≤ 1/3 FCPU 29
SWD clock frequency, 1.71 V to 3.3 V F_SWDCLK2 7 MHz 1.71 V ≤ VDDD ≤ 3.3 V; SWDCLK ≤ 1/3 FCPU 29
IMO operating current at 48 MHz IIMO1 250 µA 29
IMO operating current at 24 MHz IIMO2 180 µA 29
IMO frequency variation at 24, 32, and 48 MHz (trimmed) FIMOTOL1 -2 2 % 29
IMO startup time TSTARTIMO 7 µs 29
ILO operating current at 32 kHz IILO2 0.3 1.05 µA ILO operating current at 32 KHz 29
ILO duty cycle TILODUTY 40 50 60 % 29
ILO frequency range FILOTRIM1 20 40 80 kHz 29
CPU frequency FCPU 48 MHz 1.71 ≤ VDDD ≤ 5.5 19
Wakeup from Deep Sleep mode TDEEPSLEEP 25 30 µs 19
Operating ambient temperature (I grade) TA -40 25 85 °C Industrial (I) grade temperature range per ordering table 30
Operating junction temperature TJ -40 25 125 °C 35
External modulator capacitor (CMOD) CMOD 2.2 nF 5 V rating 22
Package thermal resistance θJA, QFN 24 (0.5 mm pitch) TJA 20.53 °C/Watt QFN 24 (0.5 mm pitch) 35
Package thermal resistance θJC, QFN 24 (0.5 mm pitch) TJC 18.26 °C/Watt QFN 24 (0.5 mm pitch) 35

CAD (KiCad official)

  • Symbol: CY8C4045LQI-T412
  • Footprint: Package_DFN_QFN:QFN-24-1EP_4x4mm_P0.5mm_EP2.6x2.6mm
  • 3D model: QFN-24(4x4) (KiCad packages3D, STEP)
  • 3D model files: cy8c4045lqi-t412-etched.step / cy8c4045lqi-t412-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); cy8c4045lqi-t412.step / cy8c4045lqi-t412.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Infineon Technologies datasheet (46 pp, sha256 91700ca10102b80f, retrieved 2026-10-30, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF