CY8C4045LQI-S411

{
  "slug": "cy8c4045lqi-s411",
  "version": "0.1.0",
  "type": "component",
  "description": "Cypress Semicon Microcontroller Units (MCUs/MPUs/SOCs), QFN-24(4x4). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
  "tags": [
    "component",
    "single chip microcomputer-microcontroller",
    "cy8c4045lqi-s411",
    "factory-2.0.0",
    "extractor-text"
  ],
  "dependencies": {},
  "hero": {
    "type": "image",
    "path": "docs/hero.png"
  },
  "files": [
    "page.json",
    "README.md",
    "cy8c4045lqi-s411.kicad_sym",
    "cy8c4045lqi-s411.kicad_mod",
    "cy8c4045lqi-s411.glb",
    "cy8c4045lqi-s411.step",
    "cy8c4045lqi-s411.lbr",
    "docs/hero.png",
    "docs/cy8c4045lqi-s411-datasheet.pdf",
    "viewers/symbol.html",
    "viewers/footprint.html",
    "cy8c4045lqi-s411-hero.glb",
    "cy8c4045lqi-s411-hero.overlay.json",
    "cy8c4045lqi-s411-etched.glb"
  ],
  "component": {
    "mpn": "CY8C4045LQI-S411",
    "manufacturer": "Cypress Semicon",
    "package": "QFN-24(4x4)",
    "pin_count": 25,
    "category": "Single Chip Microcomputer/Microcontroller",
    "subcategory": "Microcontroller Units (MCUs/MPUs/SOCs)",
    "datasheet": "https://www.infineon.com/dgdl/Infineon-PSoC_4_PSoC_4000S_Datasheet_Programmable_System-on-Chip_(PSoC_)-DataSheet-v15_00-EN.pdf?fileId=8ac78c8c7d0d8da4017d0eda97715cf1&utm_source=cypress&utm_medium=referral&utm_campaign=202110_globe_en_all_integration-file",
    "parts": {
      "symbol": "cy8c4045lqi-s411.kicad_sym",
      "footprint": "cy8c4045lqi-s411.kicad_mod",
      "model_3d": "cy8c4045lqi-s411-hero.glb",
      "model_3d_plain": "cy8c4045lqi-s411-etched.glb",
      "model_3d_step": "cy8c4045lqi-s411-etched.step",
      "model_3d_step_plain": "cy8c4045lqi-s411.step",
      "lbr": "cy8c4045lqi-s411.lbr"
    },
    "distributor_links": {
      "lcsc": "C2953606",
      "digikey": "448-CY8C4045LQI-S411-ND",
      "mouser": "727-CY8C4045LQI-S411"
    },
    "distributor_check": {
      "checked_at": "2026-10-23T03:21:16Z",
      "source": "Component Ocean /api/assign-pns",
      "digikey": {
        "pn": "448-CY8C4045LQI-S411-ND",
        "status": "found"
      },
      "mouser": {
        "pn": "727-CY8C4045LQI-S411",
        "status": "found"
      }
    },
    "pins": [
      {
        "number": "1",
        "name": "P1.7",
        "type": "bidirectional",
        "description": "GPIO port 1 bit 7 with no alternate function listed in the pin assignment table."
      },
      {
        "number": "2",
        "name": "P2.0",
        "type": "bidirectional",
        "description": "GPIO that can be Smart I/O prgio[0].io[0], tcpwm.line[4]:0, csd.comp, tcpwm.tr_in[4], or Deep Sleep scb[1] I2C SCL:1 / SPI MOSI:2."
      },
      {
        "number": "3",
        "name": "P2.1",
        "type": "bidirectional",
        "description": "GPIO that can be Smart I/O prgio[0].io[1], tcpwm.line_compl[4]:0, tcpwm.tr_in[5], or Deep Sleep scb[1] I2C SDA:1 / SPI MISO:2."
      },
      {
        "number": "4",
        "name": "P2.6",
        "type": "bidirectional",
        "description": "GPIO that can be Smart I/O prgio[0].io[6], tcpwm.line[1]:1, or scb[1] spi_select3:1."
      },
      {
        "number": "5",
        "name": "P2.7",
        "type": "bidirectional",
        "description": "GPIO that can be Smart I/O prgio[0].io[7], tcpwm.line_compl[1]:1, or Deep Sleep lpcomp.comp[0]:1."
      },
      {
        "number": "6",
        "name": "P3.0",
        "type": "bidirectional",
        "description": "GPIO that can be Smart I/O prgio[1].io[0], tcpwm.line[0]:0, scb[1] UART RX:1, or Deep Sleep scb[1] I2C SCL:2 / SPI MOSI:0."
      },
      {
        "number": "7",
        "name": "P3.2",
        "type": "bidirectional",
        "description": "GPIO that can be Smart I/O prgio[1].io[2], tcpwm.line[1]:0, scb[1] UART CTS:1, SWD data (cpuss.swd_data), or scb[1] SPI clock:0."
      },
      {
        "number": "8",
        "name": "P3.3",
        "type": "bidirectional",
        "description": "GPIO that can be Smart I/O prgio[1].io[3], tcpwm.line_compl[1]:0, scb[1] UART RTS:1, SWD clock (cpuss.swd_clk), or scb[1] spi_select0:0."
      },
      {
        "number": "9",
        "name": "P4.0",
        "type": "bidirectional",
        "description": "GPIO that can be CAPSENSE external reference csd.vref_ext, scb[0] UART RX:0, tcpwm.tr_in[10], or Deep Sleep scb[0] I2C SCL:1 / SPI MOSI:0."
      },
      {
        "number": "10",
        "name": "P4.1",
        "type": "bidirectional",
        "description": "GPIO that can be CAPSENSE csd.cshieldpads, scb[0] UART TX:0, tcpwm.tr_in[11], or Deep Sleep scb[0] I2C SDA:1 / SPI MISO:0."
      },
      {
        "number": "11",
        "name": "P4.2",
        "type": "bidirectional",
        "description": "GPIO that can be CAPSENSE modulator capacitor pad csd.cmodpad, scb[0] UART CTS:0, lpcomp.comp[0]:0, or scb[0] SPI clock:0."
      },
      {
        "number": "12",
        "name": "P4.3",
        "type": "bidirectional",
        "description": "GPIO that can be CAPSENSE csd.csh_tank, scb[0] UART RTS:0, lpcomp.comp[1]:0, or scb[0] spi_select0:0."
      },
      {
        "number": "13",
        "name": "P0.0",
        "type": "bidirectional",
        "description": "GPIO that can be low-power comparator input lpcomp.in_p[0], tcpwm.tr_in[0], or scb[0] spi_select1:0."
      },
      {
        "number": "14",
        "name": "P0.1",
        "type": "bidirectional",
        "description": "GPIO that can be low-power comparator input lpcomp.in_n[0], tcpwm.tr_in[1], or scb[0] spi_select2:0."
      },
      {
        "number": "15",
        "name": "P0.4",
        "type": "bidirectional",
        "description": "GPIO that can be watch crystal input wco.wco_in, scb[1] UART RX:0, or Deep Sleep scb[1] I2C SCL:0 / SPI MOSI:1."
      },
      {
        "number": "16",
        "name": "P0.5",
        "type": "bidirectional",
        "description": "GPIO that can be watch crystal output wco.wco_out, scb[1] UART TX:0, or Deep Sleep scb[1] I2C SDA:0 / SPI MISO:1."
      },
      {
        "number": "17",
        "name": "P0.6",
        "type": "bidirectional",
        "description": "GPIO that can be external clock input srss.ext_clk, scb[1] UART CTS:0, or scb[1] SPI clock:1."
      },
      {
        "number": "18",
        "name": "XRES",
        "type": "input",
        "description": "External reset input pin."
      },
      {
        "number": "19",
        "name": "VCCD",
        "type": "power_out",
        "description": "Regulated digital supply (1.8 V ± 5%); must be bypassed to ground with a 0.1 µF X5R ceramic or better capacitor and not connected to anything else in the 1.8 V to 5.5 V supply mode."
      },
      {
        "number": "20",
        "name": "VSSD",
        "type": "power_in",
        "description": "Ground pin for the digital section."
      },
      {
        "number": "21",
        "name": "VDD",
        "type": "power_in",
        "description": "Power supply to all sections of the chip, 1.8 V to 5.5 V (or 1.71 V to 1.89 V when externally regulated with VCCD shorted)."
      },
      {
        "number": "22",
        "name": "VSSA",
        "type": "power_in",
        "description": "Ground pin for the analog section."
      },
      {
        "number": "23",
        "name": "P1.2",
        "type": "bidirectional",
        "description": "GPIO that can be tcpwm.line[3]:1, scb[0] UART CTS:1, tcpwm.tr_in[2], or scb[0] SPI clock:1."
      },
      {
        "number": "24",
        "name": "P1.3",
        "type": "bidirectional",
        "description": "GPIO that can be tcpwm.line_compl[3]:1, scb[0] UART RTS:1, tcpwm.tr_in[3], or scb[0] spi_select0:1."
      },
      {
        "number": "25",
        "name": "EP",
        "type": "passive",
        "description": "Exposed pad (from the footprint; not named in the datasheet pin table)."
      }
    ],
    "provenance": {
      "extractor": "extract_pins 0.3",
      "factory_chain": {
        "factory": "2.0.0",
        "extractor": "extract_pins 0.3",
        "primary_model": "claude-sonnet-5-5",
        "primary_mode": "text",
        "consensus_model": "claude-sonnet-5-5",
        "consensus": "agreed",
        "guards": "pin_guards 0.1: passed",
        "guard_notes": [
          "extractor flagged: The datasheet says the QFN center (exposed) pad should be connected to ground (VSS), or left floatin; The 24-pin QFN column of the pin list shows VSSD at pin 20 and VDD at pin 21 (the shared VDD supplie; The ordering table shows CY8C4045LQI-S411 as a 24-pin QFN part (LQ = QFN, 19 GPIO), which matches th"
        ],
        "pages_sent": 19,
        "cost_usd": 0.2071,
        "at": "2026-10-23T03:21:01"
      },
      "datasheet": {
        "url": "https://www.infineon.com/dgdl/Infineon-PSoC_4_PSoC_4000S_Datasheet_Programmable_System-on-Chip_(PSoC_)-DataSheet-v15_00-EN.pdf?fileId=8ac78c8c7d0d8da4017d0eda97715cf1&utm_source=cypress&utm_medium=referral&utm_campaign=202110_globe_en_all_integration-file",
        "pages": 58,
        "sha256": "493ab905a29a5d98",
        "source_tier": "lcsc"
      },
      "cad": "KiCad official (CC-BY-SA 4.0)",
      "pins": {
        "total": 25,
        "described": 25,
        "cites_pages": true,
        "refuses_to_fabricate": true
      }
    },
    "viewers": {
      "symbol": "viewers/symbol.html",
      "footprint": "viewers/footprint.html"
    },
    "models_3d": [
      {
        "file": "cy8c4045lqi-s411.step",
        "role": "plain",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          4.0,
          4.0,
          0.77
        ],
        "zmin_mm": 0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "096fc110543e6d324c5120c2d38e3dca87a389da9b6fac234f1fe40856295ef4",
        "checked": "2026-10-23",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      },
      {
        "file": "cy8c4045lqi-s411-etched.step",
        "role": "eda",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          4.0,
          4.0,
          0.77
        ],
        "zmin_mm": 0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "7012239f4cad83ebe96d8f6881209467af86e920892749807daa5b291e76314a",
        "checked": "2026-10-23",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      }
    ]
  }
}