CY8C4025LQI-S401T

{
  "slug": "cy8c4025lqi-s401t",
  "version": "0.1.0",
  "type": "component",
  "description": "Cypress Semicon Microcontroller Units (MCUs/MPUs/SOCs), QFN-24-EP(4x4). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
  "tags": [
    "component",
    "single chip microcomputer-microcontroller",
    "cy8c4025lqi-s401t",
    "factory-2.0.0",
    "extractor-text"
  ],
  "dependencies": {},
  "hero": {
    "type": "image",
    "path": "docs/hero.png"
  },
  "files": [
    "page.json",
    "README.md",
    "cy8c4025lqi-s401t.kicad_sym",
    "cy8c4025lqi-s401t.kicad_mod",
    "cy8c4025lqi-s401t.glb",
    "cy8c4025lqi-s401t.step",
    "cy8c4025lqi-s401t.lbr",
    "docs/hero.png",
    "docs/cy8c4025lqi-s401t-datasheet.pdf",
    "viewers/symbol.html",
    "viewers/footprint.html",
    "cy8c4025lqi-s401t-hero.glb",
    "cy8c4025lqi-s401t-hero.overlay.json",
    "cy8c4025lqi-s401t-etched.glb"
  ],
  "component": {
    "mpn": "CY8C4025LQI-S401T",
    "manufacturer": "Cypress Semicon",
    "package": "QFN-24-EP(4x4)",
    "pin_count": 25,
    "category": "Single Chip Microcomputer/Microcontroller",
    "subcategory": "Microcontroller Units (MCUs/MPUs/SOCs)",
    "datasheet": "https://www.infineon.com/dgdl/Infineon-PSoC_4_PSoC_4000S_Datasheet_Programmable_System-on-Chip_(PSoC_)-DataSheet-v15_00-EN.pdf?fileId=8ac78c8c7d0d8da4017d0eda97715cf1&utm_source=cypress&utm_medium=referral&utm_campaign=202110_globe_en_all_integration-file",
    "parts": {
      "symbol": "cy8c4025lqi-s401t.kicad_sym",
      "footprint": "cy8c4025lqi-s401t.kicad_mod",
      "model_3d": "cy8c4025lqi-s401t-hero.glb",
      "model_3d_plain": "cy8c4025lqi-s401t-etched.glb",
      "model_3d_step": "cy8c4025lqi-s401t-etched.step",
      "model_3d_step_plain": "cy8c4025lqi-s401t.step",
      "lbr": "cy8c4025lqi-s401t.lbr"
    },
    "distributor_links": {
      "lcsc": "C2952630",
      "digikey": "448-CY8C4025LQI-S401TTR-ND",
      "mouser": "727-CY8C4025LQIS401T"
    },
    "distributor_check": {
      "checked_at": "2026-10-23T12:48:52Z",
      "source": "Component Ocean /api/assign-pns",
      "digikey": {
        "pn": "448-CY8C4025LQI-S401TTR-ND",
        "status": "found"
      },
      "mouser": {
        "pn": "727-CY8C4025LQIS401T",
        "status": "found"
      }
    },
    "pins": [
      {
        "number": "1",
        "name": "P1.7",
        "type": "bidirectional",
        "description": "General-purpose I/O port 1 bit 7 with programmable drive modes; can be CAPSENSE, analog or digital, with no alternate peripheral function listed."
      },
      {
        "number": "2",
        "name": "P2.0",
        "type": "bidirectional",
        "description": "GPIO port 2 bit 0 with Smart I/O prgio[0].io[0], TCPWM line[4], csd.comp and SCB1 I2C SCL/SPI MOSI Deep Sleep alternate functions."
      },
      {
        "number": "3",
        "name": "P2.1",
        "type": "bidirectional",
        "description": "GPIO port 2 bit 1 with Smart I/O prgio[0].io[1], TCPWM line_compl[4] and SCB1 I2C SDA/SPI MISO Deep Sleep alternate functions."
      },
      {
        "number": "4",
        "name": "P2.6",
        "type": "bidirectional",
        "description": "GPIO port 2 bit 6 with Smart I/O prgio[0].io[6], TCPWM line[1] and SCB1 SPI select3 alternate functions."
      },
      {
        "number": "5",
        "name": "P2.7",
        "type": "bidirectional",
        "description": "GPIO port 2 bit 7 with Smart I/O prgio[0].io[7], TCPWM line_compl[1] and low-power comparator output lpcomp.comp[0] Deep Sleep function."
      },
      {
        "number": "6",
        "name": "P3.0",
        "type": "bidirectional",
        "description": "GPIO port 3 bit 0 with Smart I/O prgio[1].io[0], TCPWM line[0], SCB1 UART RX, I2C SCL and SPI MOSI alternate functions."
      },
      {
        "number": "7",
        "name": "P3.2",
        "type": "bidirectional",
        "description": "GPIO port 3 bit 2 with Smart I/O prgio[1].io[2], TCPWM line[1], SCB1 UART CTS/SPI clock and SWD data (cpuss.swd_data) function."
      },
      {
        "number": "8",
        "name": "P3.3",
        "type": "bidirectional",
        "description": "GPIO port 3 bit 3 with Smart I/O prgio[1].io[3], TCPWM line_compl[1], SCB1 UART RTS/SPI select0 and SWD clock (cpuss.swd_clk) function."
      },
      {
        "number": "9",
        "name": "P4.0",
        "type": "bidirectional",
        "description": "GPIO port 4 bit 0 with analog function csd.vref_ext (external CSD reference) and SCB0 UART RX, I2C SCL and SPI MOSI alternate functions."
      },
      {
        "number": "10",
        "name": "P4.1",
        "type": "bidirectional",
        "description": "GPIO port 4 bit 1 with analog function csd.cshieldpads and SCB0 UART TX, I2C SDA and SPI MISO alternate functions."
      },
      {
        "number": "11",
        "name": "P4.2",
        "type": "bidirectional",
        "description": "GPIO port 4 bit 2 with analog function csd.cmodpad (CSD modulator capacitor) and lpcomp.comp[0] and SCB0 SPI clock alternate functions."
      },
      {
        "number": "12",
        "name": "P4.3",
        "type": "bidirectional",
        "description": "GPIO port 4 bit 3 with analog function csd.csh_tank and lpcomp.comp[1] and SCB0 UART RTS/SPI select0 alternate functions."
      },
      {
        "number": "13",
        "name": "P0.0",
        "type": "bidirectional",
        "description": "GPIO port 0 bit 0 with analog low-power comparator input lpcomp.in_p[0], TCPWM trigger input tr_in[0] and SCB0 SPI select1 function."
      },
      {
        "number": "14",
        "name": "P0.1",
        "type": "bidirectional",
        "description": "GPIO port 0 bit 1 with analog low-power comparator input lpcomp.in_n[0], TCPWM trigger input tr_in[1] and SCB0 SPI select2 function."
      },
      {
        "number": "15",
        "name": "P0.4",
        "type": "bidirectional",
        "description": "GPIO port 0 bit 4 with watch crystal oscillator input (wco.wco_in), SCB1 UART RX and I2C SCL/SPI MOSI functions."
      },
      {
        "number": "16",
        "name": "P0.5",
        "type": "bidirectional",
        "description": "GPIO port 0 bit 5 with watch crystal oscillator output (wco.wco_out), SCB1 UART TX and I2C SDA/SPI MISO functions."
      },
      {
        "number": "17",
        "name": "P0.6",
        "type": "bidirectional",
        "description": "GPIO port 0 bit 6 with external clock input (srss.ext_clk), SCB1 UART CTS and SPI clock functions."
      },
      {
        "number": "18",
        "name": "XRES",
        "type": "input",
        "description": "External reset input to the device."
      },
      {
        "number": "19",
        "name": "VCCD",
        "type": "power_out",
        "description": "Regulated digital supply (1.8 V ±5%); must be bypassed to ground with a 0.1 µF X5R or better ceramic capacitor and not connected to anything else in the 1.8 V to 5.5 V supply mode."
      },
      {
        "number": "20",
        "name": "VSSD",
        "type": "power_in",
        "description": "Ground pin for the digital section."
      },
      {
        "number": "21",
        "name": "VDD",
        "type": "power_in",
        "description": "Power supply to all sections of the chip, 1.8 V to 5.5 V (or 1.8 V ±5% when externally regulated)."
      },
      {
        "number": "22",
        "name": "VSSA",
        "type": "power_in",
        "description": "Ground pin for the analog section."
      },
      {
        "number": "23",
        "name": "P1.2",
        "type": "bidirectional",
        "description": "GPIO port 1 bit 2 with TCPWM line[3], SCB0 UART CTS, tcpwm.tr_in[2] and SCB0 SPI clock functions."
      },
      {
        "number": "24",
        "name": "P1.3",
        "type": "bidirectional",
        "description": "GPIO port 1 bit 3 with TCPWM line_compl[3], SCB0 UART RTS, tcpwm.tr_in[3] and SCB0 SPI select0 functions."
      },
      {
        "number": "25",
        "name": "EP",
        "type": "passive",
        "description": "Exposed pad (from the footprint; not named in the datasheet pin table)."
      }
    ],
    "provenance": {
      "extractor": "extract_pins 0.3",
      "factory_chain": {
        "factory": "2.0.0",
        "extractor": "extract_pins 0.3",
        "primary_model": "claude-sonnet-5-5",
        "primary_mode": "text",
        "consensus_model": "claude-sonnet-5-5",
        "consensus": "agreed",
        "guards": "pin_guards 0.1: passed",
        "guard_notes": [
          "extractor flagged: MPN CY8C4025LQI-S401T is the tape-and-reel version of CY8C4025LQI-S401, which Table 36 lists as the ; The exposed pad has no pin number in the datasheet text; 'EP' is a placeholder. The package drawing ; Pin type for VCCD (regulator output vs. bypass-only pin) is inferred from the power section. The Tab"
        ],
        "pages_sent": 19,
        "cost_usd": 0.2117,
        "at": "2026-10-23T12:48:41"
      },
      "datasheet": {
        "url": "https://www.infineon.com/dgdl/Infineon-PSoC_4_PSoC_4000S_Datasheet_Programmable_System-on-Chip_(PSoC_)-DataSheet-v15_00-EN.pdf?fileId=8ac78c8c7d0d8da4017d0eda97715cf1&utm_source=cypress&utm_medium=referral&utm_campaign=202110_globe_en_all_integration-file",
        "pages": 58,
        "sha256": "493ab905a29a5d98",
        "source_tier": "lcsc"
      },
      "cad": "KiCad official (CC-BY-SA 4.0)",
      "pins": {
        "total": 25,
        "described": 25,
        "cites_pages": true,
        "refuses_to_fabricate": true
      }
    },
    "viewers": {
      "symbol": "viewers/symbol.html",
      "footprint": "viewers/footprint.html"
    },
    "models_3d": [
      {
        "file": "cy8c4025lqi-s401t.step",
        "role": "plain",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          4.0,
          4.0,
          0.77
        ],
        "zmin_mm": 0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "096fc110543e6d324c5120c2d38e3dca87a389da9b6fac234f1fe40856295ef4",
        "checked": "2026-10-23",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      },
      {
        "file": "cy8c4025lqi-s401t-etched.step",
        "role": "eda",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          4.0,
          4.0,
          0.77
        ],
        "zmin_mm": 0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "b1f90e40377b012a5cc790ce6fe7a052fa1efade8e853c58026188e239c3752f",
        "checked": "2026-10-23",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      }
    ]
  }
}