component
CY8C4014SXI-421T
Public Made by Adomby adom
Cypress Semicon Microcontroller Units (MCUs/MPUs/SOCs), SOIC-16. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
main
Ray
Publish 0.1.0
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{
"slug": "cy8c4014sxi-421t",
"version": "0.1.0",
"type": "component",
"description": "Cypress Semicon Microcontroller Units (MCUs/MPUs/SOCs), SOIC-16. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
"tags": [
"component",
"single chip microcomputer-microcontroller",
"cy8c4014sxi-421t",
"factory-2.0.0",
"extractor-text"
],
"dependencies": {},
"hero": {
"type": "image",
"path": "docs/hero.png"
},
"files": [
"page.json",
"README.md",
"cy8c4014sxi-421t.kicad_sym",
"cy8c4014sxi-421t.kicad_mod",
"cy8c4014sxi-421t.glb",
"cy8c4014sxi-421t.step",
"cy8c4014sxi-421t.lbr",
"docs/hero.png",
"docs/cy8c4014sxi-421t-datasheet.pdf",
"viewers/symbol.html",
"viewers/footprint.html",
"cy8c4014sxi-421t-hero.glb",
"cy8c4014sxi-421t-hero.overlay.json",
"cy8c4014sxi-421t-etched.glb"
],
"component": {
"mpn": "CY8C4014SXI-421T",
"manufacturer": "Cypress Semicon",
"package": "SOIC-16",
"pin_count": 16,
"category": "Single Chip Microcomputer/Microcontroller",
"subcategory": "Microcontroller Units (MCUs/MPUs/SOCs)",
"datasheet": "https://www.infineon.com/dgdl/Infineon-PSoC_4_PSoC_4000_Family_Programmable_System-on-Chip_(PSoC)-DataSheet-v06_00-EN.pdf?fileId=8ac78c8c7d0d8da4017d0ecc2b7d45ee&utm_source=cypress&utm_medium=referral&utm_campaign=202110_globe_en_all_integration-files",
"parts": {
"symbol": "cy8c4014sxi-421t.kicad_sym",
"footprint": "cy8c4014sxi-421t.kicad_mod",
"model_3d": "cy8c4014sxi-421t-hero.glb",
"model_3d_plain": "cy8c4014sxi-421t-etched.glb",
"model_3d_step": "cy8c4014sxi-421t-etched.step",
"model_3d_step_plain": "cy8c4014sxi-421t.step",
"lbr": "cy8c4014sxi-421t.lbr"
},
"distributor_links": {
"lcsc": "C2952643",
"digikey": "448-CY8C4014SXI-421TTR-ND",
"mouser": "727-CY8C4014SXI-421T"
},
"distributor_check": {
"checked_at": "2026-10-31T01:14:33Z",
"source": "Component Ocean /api/assign-pns",
"digikey": {
"pn": "448-CY8C4014SXI-421TTR-ND",
"status": "found"
},
"mouser": {
"pn": "727-CY8C4014SXI-421T",
"status": "found"
}
},
"pins": [
{
"number": "1",
"name": "P3.0/SDA/SWD_IO",
"type": "bidirectional",
"description": "Port 3 GPIO that also serves as I2C data (SDA) and SWD I/O; Port 3 pins are not available for CapSense."
},
{
"number": "2",
"name": "P3.1/SCL/SWD_CLK",
"type": "bidirectional",
"description": "Port 3 GPIO that also serves as I2C clock (SCL) and SWD clock; Port 3 pins are not available for CapSense."
},
{
"number": "3",
"name": "P0.1/TRIN1/CMPO_0",
"type": "bidirectional",
"description": "Port 0 GPIO usable as CapSense or AMUX bus pin, with TRIN1 trigger input and comparator output CMPO_0 alternate functions."
},
{
"number": "4",
"name": "P0.2/TRIN2",
"type": "bidirectional",
"description": "Port 0 GPIO usable as CapSense or AMUX bus pin, with TRIN2 trigger input alternate function."
},
{
"number": "5",
"name": "P0.4/TRIN4/CMPO_0/EXT_CLK",
"type": "bidirectional",
"description": "Port 0 GPIO usable as CapSense or AMUX bus pin, with TRIN4 trigger input, comparator output CMPO_0, external clock and CMOD capacitor alternate functions."
},
{
"number": "6",
"name": "VCCD",
"type": "power_out",
"description": "Regulated digital supply output (1.8 V ±5%); in unregulated external supply mode it must be bypassed to ground with an external 0.1 µF X5R ceramic or better capacitor placed close to the pin."
},
{
"number": "7",
"name": "VDD",
"type": "power_in",
"description": "Power supply for both analog and digital sections; 1.8 V to 5.5 V in unregulated external supply mode, or 1.71 V to 1.89 V in regulated external supply mode (VDD must not exceed 1.89 V in any condition)."
},
{
"number": "8",
"name": "VSS",
"type": "power_in",
"description": "Ground pin."
},
{
"number": "9",
"name": "P0.5",
"type": "bidirectional",
"description": "Port 0 GPIO usable as CapSense or AMUX bus pin; no additional alternate function is listed for this pin on the 16-SOIC."
},
{
"number": "10",
"name": "P0.6",
"type": "bidirectional",
"description": "Port 0 GPIO usable as CapSense or AMUX bus pin; no additional alternate function is listed for this pin on the 16-SOIC."
},
{
"number": "11",
"name": "P1.1/OUT0",
"type": "bidirectional",
"description": "Port 1 GPIO usable as CapSense or AMUX bus pin, with TCPWM PWM output OUT0."
},
{
"number": "12",
"name": "P1.2/SCL",
"type": "bidirectional",
"description": "Port 1 GPIO usable as CapSense or AMUX bus pin, used as I2C clock; I2C bus I/O is implemented in open-drain modes and GPIO cells are not overvoltage tolerant."
},
{
"number": "13",
"name": "P1.3/SDA",
"type": "bidirectional",
"description": "Port 1 GPIO usable as CapSense or AMUX bus pin, used as I2C data; I2C bus I/O is implemented in open-drain modes and GPIO cells are not overvoltage tolerant."
},
{
"number": "14",
"name": "P1.6/OVF0/UND0/nOUT0/CMPO_0",
"type": "bidirectional",
"description": "Port 1 GPIO usable as CapSense or AMUX bus pin, with TCPWM OVF0, UND0, nOUT0 and internal-reset comparator output CMPO_0 functions; it must not have a load to ground during POR (should be an output)."
},
{
"number": "15",
"name": "P1.7/MATCH/EXT_CLK",
"type": "bidirectional",
"description": "Port 1 GPIO usable as CapSense or AMUX bus pin, with MATCH output and external clock alternate functions."
},
{
"number": "16",
"name": "P2.0",
"type": "bidirectional",
"description": "Port 2 GPIO usable as CapSense or AMUX bus pin; no additional alternate function is listed for this pin."
}
],
"provenance": {
"extractor": "extract_pins 0.3",
"factory_chain": {
"factory": "2.0.0",
"extractor": "extract_pins 0.3",
"primary_model": "claude-haiku-5-5",
"primary_mode": "text",
"consensus_model": "claude-sonnet-5-5",
"consensus": "agreed",
"guards": "pin_guards 0.1: passed",
"guard_notes": [
"extractor flagged: The requested MPN is CY8C4014SXI-421T. The ordering table lists CY8C4014SXI-421 as the SOIC (SX) 16-; The pinout was reconstructed from a garbled text extraction of Table 1 and cross-checked against the; Pin types are KiCad classes derived from the datasheet descriptions. VCCD is classed as power_out be"
],
"pages_sent": 19,
"cost_usd": 0.1112,
"at": "2026-10-31T01:13:59"
},
"datasheet": {
"url": "https://www.infineon.com/dgdl/Infineon-PSoC_4_PSoC_4000_Family_Programmable_System-on-Chip_(PSoC)-DataSheet-v06_00-EN.pdf?fileId=8ac78c8c7d0d8da4017d0ecc2b7d45ee&utm_source=cypress&utm_medium=referral&utm_campaign=202110_globe_en_all_integration-files",
"pages": 36,
"sha256": "6c7edf8ac0f0328f",
"source_tier": "mfr"
},
"cad": "KiCad official (CC-BY-SA 4.0)",
"pins": {
"total": 16,
"described": 16,
"cites_pages": true,
"refuses_to_fabricate": true
}
},
"viewers": {
"symbol": "viewers/symbol.html",
"footprint": "viewers/footprint.html"
},
"models_3d": [
{
"file": "cy8c4014sxi-421t.step",
"role": "plain",
"up": "Z",
"units": "mm",
"origin": "footprint origin = pad-pattern centre",
"seat": "z = 0",
"extents_mm": [
6.0,
9.9,
1.75
],
"zmin_mm": -0.0,
"centre_offset_mm": 0.0,
"footprint_binding": "identity",
"sha256": "d5eeddb4c0b304dc61950919b126fc61d7586abd5f16ab71a2a79759ec6498bf",
"checked": "2026-10-31",
"checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
},
{
"file": "cy8c4014sxi-421t-etched.step",
"role": "eda",
"up": "Z",
"units": "mm",
"origin": "footprint origin = pad-pattern centre",
"seat": "z = 0",
"extents_mm": [
6.0,
9.9,
1.75
],
"zmin_mm": -0.0,
"centre_offset_mm": 0.0,
"footprint_binding": "identity",
"sha256": "c163095c29a555966c5a642f43c5b352846be99f277afa2ed4b3c77ff591ad64",
"checked": "2026-10-31",
"checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
}
]
}
}