CY8C4014LQI-422T

{
  "slug": "cy8c4014lqi-422t",
  "version": "0.1.0",
  "type": "component",
  "description": "Infineon Cypress Semicon Microcontrollers (MCU/MPU/SOC), QFN-24-EP(4x4). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
  "tags": [
    "component",
    "embedded processors & controllers",
    "cy8c4014lqi-422t",
    "factory-2.0.0",
    "extractor-text"
  ],
  "dependencies": {},
  "hero": {
    "type": "image",
    "path": "docs/hero.png"
  },
  "files": [
    "page.json",
    "README.md",
    "cy8c4014lqi-422t.kicad_sym",
    "cy8c4014lqi-422t.kicad_mod",
    "cy8c4014lqi-422t.glb",
    "cy8c4014lqi-422t.step",
    "cy8c4014lqi-422t.lbr",
    "docs/hero.png",
    "docs/cy8c4014lqi-422t-datasheet.pdf",
    "viewers/symbol.html",
    "viewers/footprint.html",
    "cy8c4014lqi-422t-hero.glb",
    "cy8c4014lqi-422t-hero.overlay.json",
    "cy8c4014lqi-422t-etched.glb"
  ],
  "component": {
    "mpn": "CY8C4014LQI-422T",
    "manufacturer": "Infineon Cypress Semicon",
    "package": "QFN-24-EP(4x4)",
    "pin_count": 25,
    "category": "Embedded Processors & Controllers",
    "subcategory": "Microcontrollers (MCU/MPU/SOC)",
    "datasheet": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588883852420505600",
    "parts": {
      "symbol": "cy8c4014lqi-422t.kicad_sym",
      "footprint": "cy8c4014lqi-422t.kicad_mod",
      "model_3d": "cy8c4014lqi-422t-hero.glb",
      "model_3d_plain": "cy8c4014lqi-422t-etched.glb",
      "model_3d_step": "cy8c4014lqi-422t-etched.step",
      "model_3d_step_plain": "cy8c4014lqi-422t.step",
      "lbr": "cy8c4014lqi-422t.lbr"
    },
    "distributor_links": {
      "lcsc": "C382040",
      "digikey": "448-CY8C4014LQI-422TTR-ND"
    },
    "distributor_check": {
      "checked_at": "2026-10-18T23:52:11Z",
      "source": "Component Ocean /api/assign-pns",
      "digikey": {
        "pn": "448-CY8C4014LQI-422TTR-ND",
        "status": "found"
      },
      "mouser": {
        "pn": null,
        "status": "quota"
      }
    },
    "pins": [
      {
        "number": "1",
        "name": "P0.0/TRIN0",
        "type": "bidirectional",
        "description": "Port 0 bit 0 GPIO (CapSense/analog mux capable) with TCPWM trigger input 0 (TRIN0)."
      },
      {
        "number": "2",
        "name": "P0.1/TRIN1/CMPO_0",
        "type": "bidirectional",
        "description": "Port 0 bit 1 GPIO with TCPWM trigger input 1 (TRIN1) and sense comparator output CMPO_0."
      },
      {
        "number": "3",
        "name": "P0.2/TRIN2",
        "type": "bidirectional",
        "description": "Port 0 bit 2 GPIO with TCPWM trigger input 2 (TRIN2)."
      },
      {
        "number": "4",
        "name": "P0.3/TRIN3",
        "type": "bidirectional",
        "description": "Port 0 bit 3 GPIO with TCPWM trigger input 3 (TRIN3)."
      },
      {
        "number": "5",
        "name": "P0.4/TRIN4/CMPO_0/EXT_CLK",
        "type": "bidirectional",
        "description": "Port 0 bit 4 GPIO with trigger input 4 (TRIN4), sense comparator output CMPO_0, external clock EXT_CLK and CMOD capacitor connection."
      },
      {
        "number": "6",
        "name": "VCCD",
        "type": "power_out",
        "description": "Regulated digital supply (1.8 V ±5%) that must be bypassed to ground with a 0.1 µF X5R or better ceramic capacitor (printed as VCC in Table 1)."
      },
      {
        "number": "7",
        "name": "VDD",
        "type": "power_in",
        "description": "Power supply for both analog and digital sections, 1.8 V to 5.5 V unregulated or 1.71 V to 1.89 V regulated."
      },
      {
        "number": "8",
        "name": "VSS",
        "type": "power_in",
        "description": "Ground pin."
      },
      {
        "number": "9",
        "name": "P0.5",
        "type": "bidirectional",
        "description": "Port 0 bit 5 GPIO (CapSense/analog mux capable)."
      },
      {
        "number": "10",
        "name": "P0.6",
        "type": "bidirectional",
        "description": "Port 0 bit 6 GPIO (CapSense/analog mux capable)."
      },
      {
        "number": "11",
        "name": "P0.7",
        "type": "bidirectional",
        "description": "Port 0 bit 7 GPIO (CapSense/analog mux capable)."
      },
      {
        "number": "12",
        "name": "P1.0",
        "type": "bidirectional",
        "description": "Port 1 bit 0 GPIO (CapSense/analog mux capable)."
      },
      {
        "number": "13",
        "name": "P1.1/OUT0",
        "type": "bidirectional",
        "description": "Port 1 bit 1 GPIO with TCPWM PWM output OUT0."
      },
      {
        "number": "14",
        "name": "P1.2/SCL",
        "type": "bidirectional",
        "description": "Port 1 bit 2 GPIO with I2C clock (SCL), implemented in open-drain mode."
      },
      {
        "number": "15",
        "name": "P1.3/SDA",
        "type": "bidirectional",
        "description": "Port 1 bit 3 GPIO with I2C data (SDA), implemented in open-drain mode."
      },
      {
        "number": "16",
        "name": "P1.4/UND0",
        "type": "bidirectional",
        "description": "Port 1 bit 4 GPIO with TCPWM underflow output UND0."
      },
      {
        "number": "17",
        "name": "P1.5/OVF0",
        "type": "bidirectional",
        "description": "Port 1 bit 5 GPIO with TCPWM overflow output OVF0."
      },
      {
        "number": "18",
        "name": "P1.6/OVF0/UND0/nOUT0/CMPO_0",
        "type": "bidirectional",
        "description": "Port 1 bit 6 GPIO with OVF0, UND0, complementary PWM output nOUT0 and CMPO_0 internal reset function, which must not have a load to ground during POR (should be an output)."
      },
      {
        "number": "19",
        "name": "P1.7/MATCH/EXT_CLK",
        "type": "bidirectional",
        "description": "Port 1 bit 7 GPIO with TCPWM match output MATCH and external clock EXT_CLK."
      },
      {
        "number": "20",
        "name": "P2.0",
        "type": "bidirectional",
        "description": "Port 2 bit 0 GPIO (CapSense/analog mux capable)."
      },
      {
        "number": "21",
        "name": "P3.0/SDA/SWD_IO",
        "type": "bidirectional",
        "description": "Port 3 bit 0 GPIO with I2C data (SDA) and SWD I/O (SWD_IO) for programming and debug."
      },
      {
        "number": "22",
        "name": "P3.1/SCL/SWD_CLK",
        "type": "bidirectional",
        "description": "Port 3 bit 1 GPIO with I2C clock (SCL) and SWD clock (SWD_CLK) for programming and debug."
      },
      {
        "number": "23",
        "name": "P3.2",
        "type": "bidirectional",
        "description": "Port 3 bit 2 GPIO, which is also listed with PWM output OUT0 in the Table 1 alternate-function column."
      },
      {
        "number": "24",
        "name": "XRES",
        "type": "input",
        "description": "External reset input."
      },
      {
        "number": "25",
        "name": "EP",
        "type": "passive",
        "description": "Exposed pad (from the footprint; not named in the datasheet pin table)."
      }
    ],
    "provenance": {
      "extractor": "extract_pins 0.3",
      "factory_chain": {
        "factory": "2.0.0",
        "extractor": "extract_pins 0.3",
        "primary_model": "claude-haiku-5-5",
        "primary_mode": "text",
        "consensus_model": "claude-sonnet-5-5",
        "consensus": "agreed",
        "guards": "pin_guards 0.1: passed",
        "guard_notes": [
          "extractor flagged: Pin 24 is XRES and the datasheet text does not give its input threshold or electrical limits; only t; The exposed thermal pad (EP) of the QFN-24-EP(4x4) package is not identified in the provided text. P; VCC appears in the 24-pin QFN column of Table 1 but the datasheet text supplied does not define its ",
          "exposed pad 25 added from the footprint"
        ],
        "pages_sent": 17,
        "cost_usd": 0.1115,
        "at": "2026-10-18T23:49:57"
      },
      "datasheet": {
        "url": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588883852420505600",
        "pages": 35,
        "sha256": "d8f010e7d78eade9",
        "source_tier": "lcsc"
      },
      "cad": "KiCad official (CC-BY-SA 4.0)",
      "pins": {
        "total": 25,
        "described": 25,
        "cites_pages": true,
        "refuses_to_fabricate": true
      }
    },
    "viewers": {
      "symbol": "viewers/symbol.html",
      "footprint": "viewers/footprint.html"
    },
    "models_3d": [
      {
        "file": "cy8c4014lqi-422t.step",
        "role": "plain",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          4.0,
          4.0,
          0.77
        ],
        "zmin_mm": 0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "f7d256794c4147daf24dcae0554fae18510315e565ad1e239b475be7fef80d8b",
        "checked": "2026-10-18",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      },
      {
        "file": "cy8c4014lqi-422t-etched.step",
        "role": "eda",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          4.0,
          4.0,
          0.77
        ],
        "zmin_mm": 0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "3c01c4165cda02713e741aaf54fccd33ccff911b6f44906184ac38286c0d44d4",
        "checked": "2026-10-18",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      }
    ]
  }
}