component
CY7C68013A-56LTXC
Public Made by Adomby adom
Infineon Cypress Semicon Microcontrollers (MCU/MPU/SOC), QFN-56-EP(8x8). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
main
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{
"schema_version": 1,
"type": "component",
"slug": "cy7c68013a-56ltxc",
"title": "CY7C68013A-56LTXC",
"brief": "Infineon Cypress Semicon Microcontrollers (MCU/MPU/SOC), QFN-56-EP(8x8). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
"version": "0.1.0",
"license": "CC-BY-SA-4.0",
"tags": [
"component",
"embedded processors & controllers",
"cy7c68013a-56ltxc",
"factory-2.0.0",
"extractor-text"
],
"component": {
"mpn": "CY7C68013A-56LTXC",
"manufacturer": "Infineon Cypress Semicon",
"package": "QFN-56-EP(8x8)",
"pin_count": 57,
"category": "Embedded Processors & Controllers",
"subcategory": "Microcontrollers (MCU/MPU/SOC)",
"datasheet": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588858312440098816",
"parts": {
"symbol": "cy7c68013a-56ltxc.kicad_sym",
"footprint": "cy7c68013a-56ltxc.kicad_mod",
"model_3d": "cy7c68013a-56ltxc-hero.glb",
"model_3d_plain": "cy7c68013a-56ltxc-etched.glb",
"model_3d_step": "cy7c68013a-56ltxc-etched.step",
"model_3d_step_plain": "cy7c68013a-56ltxc.step",
"lbr": "cy7c68013a-56ltxc.lbr"
},
"distributor_links": {
"lcsc": "C14912",
"digikey": "448-CY7C68013A-56LTXC-ND",
"mouser": "727-CY7C68013A56LTXC"
},
"distributor_check": {
"checked_at": "2026-10-18T00:35:04Z",
"source": "Component Ocean /api/assign-pns",
"digikey": {
"pn": "448-CY7C68013A-56LTXC-ND",
"status": "found"
},
"mouser": {
"pn": "727-CY7C68013A56LTXC",
"status": "found",
"lifecycle": "Obsolete"
}
},
"pins": [
{
"number": "1",
"name": "RDY0/SLRD",
"type": "input",
"description": "GPIF ready input RDY0; SLRD is the input-only slave FIFO read strobe with programmable polarity (FIFOPINPOLAR.3)."
},
{
"number": "2",
"name": "RDY1/SLWR",
"type": "input",
"description": "GPIF ready input RDY1; SLWR is the input-only slave FIFO write strobe with programmable polarity (FIFOPINPOLAR.2)."
},
{
"number": "3",
"name": "AVCC",
"type": "power_in",
"description": "Analog VCC; connect to a 3.3V power source to supply the analog section of the chip."
},
{
"number": "4",
"name": "XTALOUT",
"type": "output",
"description": "Crystal output for a 24 MHz parallel-resonant fundamental-mode crystal with load capacitor to GND; leave open if an external clock drives XTALIN."
},
{
"number": "5",
"name": "XTALIN",
"type": "input",
"description": "Crystal input for a 24 MHz parallel-resonant crystal, or a 3.3V square-wave 24 MHz external clock."
},
{
"number": "6",
"name": "AGND",
"type": "power_in",
"description": "Analog ground; connect to ground with as short a path as possible."
},
{
"number": "7",
"name": "AVCC",
"type": "power_in",
"description": "Analog VCC; connect to a 3.3V power source to supply the analog section of the chip."
},
{
"number": "8",
"name": "DPLUS",
"type": "bidirectional",
"description": "USB D+ signal; connect to the USB D+ signal."
},
{
"number": "9",
"name": "DMINUS",
"type": "bidirectional",
"description": "USB D- signal; connect to the USB D- signal."
},
{
"number": "10",
"name": "AGND",
"type": "power_in",
"description": "Analog ground; connect to ground with as short a path as possible."
},
{
"number": "11",
"name": "VCC",
"type": "power_in",
"description": "VCC; connect to a 3.3V power source."
},
{
"number": "12",
"name": "GND",
"type": "power_in",
"description": "Ground."
},
{
"number": "13",
"name": "IFCLK",
"type": "bidirectional",
"description": "Interface clock for slave FIFO and GPIF timing, which can be configured as a 30/48 MHz output when internally clocked; on CY7C68015A/16A this pin is PE0 instead."
},
{
"number": "14",
"name": "RESERVED",
"type": "input",
"description": "Reserved; connect to ground."
},
{
"number": "15",
"name": "SCL",
"type": "bidirectional",
"description": "Clock for the I2C interface; connect to VCC with a 2.2K resistor even if no I2C peripheral is attached."
},
{
"number": "16",
"name": "SDA",
"type": "bidirectional",
"description": "Data for the I2C compatible interface; connect to VCC with a 2.2K resistor even if no I2C compatible peripheral is attached."
},
{
"number": "17",
"name": "VCC",
"type": "power_in",
"description": "VCC; connect to a 3.3V power source."
},
{
"number": "18",
"name": "PB0/FD0",
"type": "bidirectional",
"description": "Port B bit 0 (PB0) or FIFO/GPIF data bus bit FD[0], selected by IFCONFIG[1..0]."
},
{
"number": "19",
"name": "PB1/FD1",
"type": "bidirectional",
"description": "Port B bit 1 (PB1) or FIFO/GPIF data bus bit FD[1], selected by IFCONFIG[1..0]."
},
{
"number": "20",
"name": "PB2/FD2",
"type": "bidirectional",
"description": "Port B bit 2 (PB2) or FIFO/GPIF data bus bit FD[2], selected by IFCONFIG[1..0]."
},
{
"number": "21",
"name": "PB3/FD3",
"type": "bidirectional",
"description": "Port B bit 3 (PB3) or FIFO/GPIF data bus bit FD[3], selected by IFCONFIG[1..0]."
},
{
"number": "22",
"name": "PB4/FD4",
"type": "bidirectional",
"description": "Port B bit 4 (PB4) or FIFO/GPIF data bus bit FD[4], selected by IFCONFIG[1..0]."
},
{
"number": "23",
"name": "PB5/FD5",
"type": "bidirectional",
"description": "Port B bit 5 (PB5) or FIFO/GPIF data bus bit FD[5], selected by IFCONFIG[1..0]."
},
{
"number": "24",
"name": "PB6/FD6",
"type": "bidirectional",
"description": "Port B bit 6 (PB6) or FIFO/GPIF data bus bit FD[6], selected by IFCONFIG[1..0]."
},
{
"number": "25",
"name": "PB7/FD7",
"type": "bidirectional",
"description": "Port B bit 7 (PB7) or FIFO/GPIF data bus bit FD[7], selected by IFCONFIG[1..0]."
},
{
"number": "26",
"name": "GND",
"type": "power_in",
"description": "Ground."
},
{
"number": "27",
"name": "VCC",
"type": "power_in",
"description": "VCC; connect to a 3.3V power source."
},
{
"number": "28",
"name": "GND",
"type": "power_in",
"description": "Ground."
},
{
"number": "29",
"name": "CTL0/FLAGA",
"type": "tri_state",
"description": "GPIF control output CTL0; alternate function is FLAGA, a programmable slave FIFO status flag that defaults to the FIFO selected by FIFOADR[1:0]."
},
{
"number": "30",
"name": "CTL1/FLAGB",
"type": "tri_state",
"description": "GPIF control output CTL1; alternate function is FLAGB, a programmable slave FIFO status flag that defaults to FULL for the FIFO selected by FIFOADR[1:0]."
},
{
"number": "31",
"name": "CTL2/FLAGC",
"type": "tri_state",
"description": "GPIF control output CTL2; alternate function is FLAGC, a programmable slave FIFO status flag that defaults to EMPTY for the FIFO selected by FIFOADR[1:0]."
},
{
"number": "32",
"name": "VCC",
"type": "power_in",
"description": "VCC; connect to a 3.3V power source."
},
{
"number": "33",
"name": "PA0/INT0#",
"type": "bidirectional",
"description": "Port A bit 0 (PA0) or active-LOW 8051 INT0 interrupt input, which is edge triggered (IT0 = 1) or level triggered (IT0 = 0)."
},
{
"number": "34",
"name": "PA1/INT1#",
"type": "bidirectional",
"description": "Port A bit 1 (PA1) or active-LOW 8051 INT1 interrupt input, which is edge triggered (IT1 = 1) or level triggered (IT1 = 0)."
},
{
"number": "35",
"name": "PA2/SLOE",
"type": "bidirectional",
"description": "Port A bit 2 (PA2) or SLOE, an input-only slave FIFO output enable with programmable polarity (FIFOPINPOLAR.4)."
},
{
"number": "36",
"name": "PA3/WU2",
"type": "bidirectional",
"description": "Port A bit 3 (PA3) or WU2, an alternate USB wakeup source enabled by WU2EN (WAKEUP.1) with polarity set by WU2POL (WAKEUP.4)."
},
{
"number": "37",
"name": "PA4/FIFOADR0",
"type": "bidirectional",
"description": "Port A bit 4 (PA4) or FIFOADR0, an input-only address select for the slave FIFOs."
},
{
"number": "38",
"name": "PA5/FIFOADR1",
"type": "bidirectional",
"description": "Port A bit 5 (PA5) or FIFOADR1, an input-only address select for the slave FIFOs."
},
{
"number": "39",
"name": "PA6/PKTEND",
"type": "bidirectional",
"description": "Port A bit 6 (PA6) or PKTEND, an input that commits FIFO packet data to the endpoint, with polarity programmable via FIFOPINPOLAR.5."
},
{
"number": "40",
"name": "PA7/FLAGD/SLCS#",
"type": "bidirectional",
"description": "Port A bit 7 (PA7), or FLAGD (programmable slave FIFO status flag), or SLCS#, which gates all other slave FIFO enable/strobes."
},
{
"number": "41",
"name": "GND",
"type": "power_in",
"description": "Ground."
},
{
"number": "42",
"name": "RESET#",
"type": "input",
"description": "Active-LOW reset that resets the entire chip."
},
{
"number": "43",
"name": "VCC",
"type": "power_in",
"description": "VCC; connect to a 3.3V power source."
},
{
"number": "44",
"name": "WAKEUP",
"type": "input",
"description": "USB wakeup; when the 8051 is suspended, asserting this pin starts the oscillator and interrupts the 8051, and holding it asserted inhibits suspend; polarity is programmable (WAKEUP.4)."
},
{
"number": "45",
"name": "PD0/FD8",
"type": "bidirectional",
"description": "Port D bit 0 (PD0) or FIFO/GPIF data bus bit FD[8], selected by IFCONFIG[1..0] and EPxFIFOCFG.0 (wordwide)."
},
{
"number": "46",
"name": "PD1/FD9",
"type": "bidirectional",
"description": "Port D bit 1 (PD1) or FIFO/GPIF data bus bit FD[9], selected by IFCONFIG[1..0] and EPxFIFOCFG.0 (wordwide)."
},
{
"number": "47",
"name": "PD2/FD10",
"type": "bidirectional",
"description": "Port D bit 2 (PD2) or FIFO/GPIF data bus bit FD[10], selected by IFCONFIG[1..0] and EPxFIFOCFG.0 (wordwide)."
},
{
"number": "48",
"name": "PD3/FD11",
"type": "bidirectional",
"description": "Port D bit 3 (PD3) or FIFO/GPIF data bus bit FD[11], selected by IFCONFIG[1..0] and EPxFIFOCFG.0 (wordwide)."
},
{
"number": "49",
"name": "PD4/FD12",
"type": "bidirectional",
"description": "Port D bit 4 (PD4) or FIFO/GPIF data bus bit FD[12], selected by IFCONFIG[1..0] and EPxFIFOCFG.0 (wordwide)."
},
{
"number": "50",
"name": "PD5/FD13",
"type": "bidirectional",
"description": "Port D bit 5 (PD5) or FIFO/GPIF data bus bit FD[13], selected by IFCONFIG[1..0] and EPxFIFOCFG.0 (wordwide)."
},
{
"number": "51",
"name": "PD6/FD14",
"type": "bidirectional",
"description": "Port D bit 6 (PD6) or FIFO/GPIF data bus bit FD[14], selected by IFCONFIG[1..0] and EPxFIFOCFG.0 (wordwide)."
},
{
"number": "52",
"name": "PD7/FD15",
"type": "bidirectional",
"description": "Port D bit 7 (PD7) or FIFO/GPIF data bus bit FD[15], selected by IFCONFIG[1..0] and EPxFIFOCFG.0 (wordwide)."
},
{
"number": "53",
"name": "GND",
"type": "power_in",
"description": "Ground."
},
{
"number": "54",
"name": "CLKOUT",
"type": "tri_state",
"description": "CLKOUT 12/24/48 MHz clock phase locked to the 24 MHz input, which the 8051 may three-state via CPUCS.1; on CY7C68015A/16A this pin is PE1, a bidirectional I/O port pin."
},
{
"number": "55",
"name": "VCC",
"type": "power_in",
"description": "VCC; connect to a 3.3V power source."
},
{
"number": "56",
"name": "GND",
"type": "power_in",
"description": "Ground."
},
{
"number": "57",
"name": "EP",
"type": "passive",
"description": "Exposed pad (from the footprint; not named in the datasheet pin table)."
}
],
"provenance": {
"extractor": "extract_pins 0.3",
"factory_chain": {
"factory": "2.0.0",
"extractor": "extract_pins 0.3",
"primary_model": "claude-haiku-5-5",
"primary_mode": "text",
"consensus_model": "claude-sonnet-5-5",
"consensus": "agreed",
"guards": "pin_guards 0.1: passed",
"guard_notes": [
"extractor flagged: Pin 13 is IFCLK on CY7C68013A/14A but PE0 on CY7C68015A/16A; pin 54 is CLKOUT on CY7C68013A/14A but ; Datasheet Table 11 gives no 56-pin QFN pin for these signals, so they are omitted: A0-A15, D0-D7, PS; Pin types were mapped by judgement from the datasheet's I/O codes: I/O/Z and open-drain (SCL, SDA, D",
"exposed pad 57 added from the footprint"
],
"pages_sent": 29,
"cost_usd": 0.2325,
"at": "2026-10-18T00:32:45"
},
"datasheet": {
"url": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588858312440098816",
"pages": 62,
"sha256": "d1cbe447c12a74fb",
"source_tier": "lcsc"
},
"cad": "KiCad official (CC-BY-SA 4.0)",
"pins": {
"total": 57,
"described": 57,
"cites_pages": true,
"refuses_to_fabricate": true
}
},
"viewers": {
"symbol": "viewers/symbol.html",
"footprint": "viewers/footprint.html"
},
"models_3d": [
{
"file": "cy7c68013a-56ltxc.step",
"role": "plain",
"up": "Z",
"units": "mm",
"origin": "footprint origin = pad-pattern centre",
"seat": "z = 0",
"extents_mm": [
8,
8,
1
],
"zmin_mm": 0,
"centre_offset_mm": 0,
"footprint_binding": "identity",
"sha256": "54eb482f12c9d8b70c1bfc78306a1c34f412f3556e225cbd097840e5abdb7981",
"checked": "2026-10-18",
"checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
},
{
"file": "cy7c68013a-56ltxc-etched.step",
"role": "eda",
"up": "Z",
"units": "mm",
"origin": "footprint origin = pad-pattern centre",
"seat": "z = 0",
"extents_mm": [
8,
8,
1
],
"zmin_mm": 0,
"centre_offset_mm": 0,
"footprint_binding": "identity",
"sha256": "fa2a281029f5e4ee9b99ee62e14c7ec8da57f1461ee0c9ca91fb38ee2cb14214",
"checked": "2026-10-18",
"checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
}
]
},
"metadata": {
"specs": {
"Manufacturer": "Infineon Cypress Semicon",
"Package": "QFN-56-EP(8x8)",
"Category": "Embedded Processors & Controllers",
"Pins": "57"
},
"characteristics": {
"version": 1,
"source": "datasheet",
"datasheet_sha256": "d1cbe447c12a74fb67084a62b5b2c6a4038d53d3f446aae0736b6168612c2947",
"rows": [
{
"name": "VCC Supply Voltage",
"symbol": "VCC",
"kind": "electrical",
"unit": "V",
"min": 3,
"typ": 3.3,
"max": 3.6,
"conditions": "",
"source_page": 37,
"source": "datasheet"
},
{
"name": "VCC Ramp Up",
"symbol": "",
"kind": "timing",
"unit": "μs",
"min": 200,
"typ": null,
"max": null,
"conditions": "0 to 3.3V",
"source_page": 37,
"source": "datasheet"
},
{
"name": "Input HIGH Voltage",
"symbol": "VIH",
"kind": "electrical",
"unit": "V",
"min": 2,
"typ": null,
"max": 5.25,
"conditions": "",
"source_page": 37,
"source": "datasheet"
},
{
"name": "Input LOW Voltage",
"symbol": "VIL",
"kind": "electrical",
"unit": "V",
"min": -0.5,
"typ": null,
"max": 0.8,
"conditions": "",
"source_page": 37,
"source": "datasheet"
},
{
"name": "Crystal Input HIGH Voltage",
"symbol": "VIH_X",
"kind": "electrical",
"unit": "V",
"min": 2,
"typ": null,
"max": 5.25,
"conditions": "",
"source_page": 37,
"source": "datasheet"
},
{
"name": "Crystal Input LOW Voltage",
"symbol": "VIL_X",
"kind": "electrical",
"unit": "V",
"min": -0.5,
"typ": null,
"max": 0.8,
"conditions": "",
"source_page": 37,
"source": "datasheet"
},
{
"name": "Input Leakage Current",
"symbol": "II",
"kind": "electrical",
"unit": "μA",
"min": -10,
"typ": null,
"max": 10,
"conditions": "0< VIN < VCC",
"source_page": 37,
"source": "datasheet"
},
{
"name": "Output Voltage HIGH",
"symbol": "VOH",
"kind": "electrical",
"unit": "V",
"min": 2.4,
"typ": null,
"max": null,
"conditions": "IOUT = 4 mA",
"source_page": 37,
"source": "datasheet"
},
{
"name": "Output LOW Voltage",
"symbol": "VOL",
"kind": "electrical",
"unit": "V",
"min": null,
"typ": null,
"max": 0.4,
"conditions": "IOUT = –4 mA",
"source_page": 37,
"source": "datasheet"
},
{
"name": "Input Pin Capacitance (except D+/D–)",
"symbol": "CIN",
"kind": "electrical",
"unit": "pF",
"min": null,
"typ": null,
"max": 10,
"conditions": "Except D+/D–",
"source_page": 37,
"source": "datasheet"
},
{
"name": "Input Pin Capacitance (D+/D–)",
"symbol": "CIN",
"kind": "electrical",
"unit": "pF",
"min": null,
"typ": null,
"max": 15,
"conditions": "D+/D–",
"source_page": 37,
"source": "datasheet"
},
{
"name": "Suspend Current (connected)",
"symbol": "ISUSP",
"kind": "electrical",
"unit": "μA",
"min": null,
"typ": 300,
"max": 380,
"conditions": "Connected; note 16: measured at Max VCC, 25°C",
"source_page": 37,
"source": "datasheet"
},
{
"name": "Suspend Current (disconnected, CY7C68013/CY7C68015 row)",
"symbol": "ISUSP",
"kind": "electrical",
"unit": "mA",
"min": null,
"typ": 0.3,
"max": 1,
"conditions": "CY7C68013/CY7C68015 Disconnected; note 16: measured at Max VCC, 25°C",
"source_page": 37,
"source": "datasheet"
},
{
"name": "Supply Current (8051 running, USB HS)",
"symbol": "ICC",
"kind": "electrical",
"unit": "mA",
"min": null,
"typ": 50,
"max": 85,
"conditions": "8051 running, connected to USB HS",
"source_page": 37,
"source": "datasheet"
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