CY22393FXIT

{
  "schema_version": 1,
  "type": "component",
  "slug": "cy22393fxit",
  "title": "CY22393FXIT",
  "brief": "Infineon Clock Generators / Frequency Synthesizers / PLL, TSSOP-16. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.",
  "version": "0.1.0",
  "license": "CC-BY-SA-4.0",
  "tags": [
    "component",
    "rtc",
    "cy22393fxit"
  ],
  "component": {
    "mpn": "CY22393FXIT",
    "manufacturer": "Infineon",
    "package": "TSSOP-16",
    "pin_count": 16,
    "category": "RTC",
    "subcategory": "Clock Generators / Frequency Synthesizers / PLL",
    "datasheet": "https://datasheet.lcsc.com/datasheet/pdf/5f24cb1302bb05eff2ffba26fb943a0d.pdf",
    "parts": {
      "symbol": "cy22393fxit.kicad_sym",
      "footprint": "cy22393fxit.kicad_mod",
      "model_3d": "cy22393fxit-etched.glb",
      "model_3d_plain": "cy22393fxit.glb",
      "model_3d_step": "cy22393fxit-etched.step",
      "model_3d_step_plain": "cy22393fxit.step",
      "lbr": "cy22393fxit.lbr"
    },
    "distributor_links": {},
    "pins": [
      {
        "number": "1",
        "name": "CLKC",
        "type": "output",
        "description": "Configurable clock output C. CMOS clock output routable from any of the three PLLs or the reference through the 4x4 crosspoint switch and 7-bit divider."
      },
      {
        "number": "2",
        "name": "VDD",
        "type": "power_in",
        "description": "Digital 3.3 V power supply."
      },
      {
        "number": "3",
        "name": "AGND",
        "type": "power_in",
        "description": "Analog ground for PLLs and crystal oscillator."
      },
      {
        "number": "4",
        "name": "XTALIN",
        "type": "input",
        "description": "Reference crystal input or external reference clock input. Connect to one terminal of an 8-30 MHz crystal, or drive with an external 1-166 MHz reference clock."
      },
      {
        "number": "5",
        "name": "XTALOUT",
        "type": "output",
        "description": "Reference crystal feedback. Connect to the second crystal terminal; leave floating when driving XTALIN with an external reference."
      },
      {
        "number": "6",
        "name": "XBUF",
        "type": "output",
        "description": "Buffered reference clock output. CMOS-level replica of the reference (crystal or external) clock, enabled via Xbuf_OE."
      },
      {
        "number": "7",
        "name": "CLKD",
        "type": "output",
        "description": "Configurable clock output D. CMOS clock output routable from any of the three PLLs or the reference through the 4x4 crosspoint switch and 7-bit divider."
      },
      {
        "number": "8",
        "name": "CLKE",
        "type": "output",
        "description": "Configurable clock output E. CMOS clock output with a /2, /3, or /4 divider stage after the 4x4 crosspoint switch."
      },
      {
        "number": "9",
        "name": "CLKB",
        "type": "output",
        "description": "Configurable clock output B. CMOS clock output routable from any of the three PLLs or the reference through the 4x4 crosspoint switch and 7-bit divider."
      },
      {
        "number": "10",
        "name": "CLKA",
        "type": "output",
        "description": "Configurable clock output A. CMOS clock output routable from any of the three PLLs or the reference through the 4x4 crosspoint switch and 7-bit divider."
      },
      {
        "number": "11",
        "name": "GND",
        "type": "power_in",
        "description": "Digital ground."
      },
      {
        "number": "12",
        "name": "SDAT/S0",
        "type": "bidirectional",
        "description": "Serial port data (two-wire serial interface). Doubles as a general-purpose frequency-select input: the S0 logic level is latched during start-up."
      },
      {
        "number": "13",
        "name": "SCLK/S1",
        "type": "input",
        "description": "Serial port clock (two-wire serial interface). Doubles as a general-purpose frequency-select input: the S1 logic level is latched during start-up."
      },
      {
        "number": "14",
        "name": "AVDD",
        "type": "power_in",
        "description": "Analog 3.3 V power supply for the PLLs and crystal oscillator. Should be filtered from VDD for lowest jitter."
      },
      {
        "number": "15",
        "name": "S2/SUSPEND",
        "type": "input",
        "description": "General-purpose frequency-select input (bit S2), latched at start-up. Optionally configurable as SUSPEND mode control input to place the device in low-power state."
      },
      {
        "number": "16",
        "name": "SHUTDOWN/OE",
        "type": "input",
        "description": "Active-low SHUTDOWN or output-enable control. Default: LOW places all outputs in tristate and shuts down the chip. Optionally configurable as OE only: LOW tristates outputs without shutting down internal circuitry."
      }
    ],
    "provenance": {
      "extractor": "ds2sf",
      "datasheet": {
        "url": "https://datasheet.lcsc.com/datasheet/pdf/5f24cb1302bb05eff2ffba26fb943a0d.pdf",
        "pages": 27,
        "sha256": "2f0310f940ea8fe3",
        "source_tier": "mfr"
      },
      "cad": "KiCad official (CC-BY-SA 4.0)",
      "pins": {
        "total": 16,
        "described": 16,
        "cites_pages": true,
        "refuses_to_fabricate": true
      }
    },
    "viewers": {
      "symbol": "viewers/symbol.html",
      "footprint": "viewers/footprint.html"
    },
    "models_3d": [
      {
        "file": "cy22393fxit.step",
        "role": "plain",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          6.4,
          5,
          1.1
        ],
        "zmin_mm": 0,
        "centre_offset_mm": 0,
        "footprint_binding": "identity",
        "sha256": "6ad5e98224d02a427d9a6b929a28dbc158b9925fba5adec12db05079f1016948",
        "checked": "2026-10-07",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      },
      {
        "file": "cy22393fxit-etched.step",
        "role": "eda",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          6.4,
          5,
          1.1
        ],
        "zmin_mm": 0,
        "centre_offset_mm": 0,
        "footprint_binding": "identity",
        "sha256": "5d679df569607c79200b8d2c9aae7f69c59a39a2ab3b6e0ac6fc71e590b85757",
        "checked": "2026-10-07",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      }
    ]
  },
  "metadata": {
    "specs": {
      "Manufacturer": "Infineon",
      "Package": "TSSOP-16",
      "Category": "RTC",
      "Pins": "16"
    }
  },
  "variants": [
    {
      "mpn": "CY22393FXITZXC",
      "kind": "packaging"
    },
    {
      "mpn": "CY22393FXITZXCT",
      "kind": "packaging"
    },
    {
      "mpn": "CY22393FXITZXI",
      "kind": "packaging"
    },
    {
      "mpn": "CY22393FXITZXIT",
      "kind": "packaging"
    },
    {
      "mpn": "CY22393FXITFXC",
      "kind": "packaging"
    },
    {
      "mpn": "CY22393FXITFXCT",
      "kind": "packaging"
    },
    {
      "mpn": "CY22393FXIT",
      "kind": "packaging"
    }
  ],
  "sections": [
    "hero",
    "viewers",
    "readme",
    "breadcrumbs",
    "info"
  ],
  "discovery_triggers": [
    "cy22393fxit"
  ],
  "discovery_pitch": "CY22393FXIT (Infineon) component page with datasheet-verified CAD.",
  "author": {
    "name": "Ray"
  },
  "dependencies": {},
  "hero": {
    "type": "image",
    "path": "docs/hero.png"
  },
  "files": [
    "page.json",
    "README.md",
    "cy22393fxit.kicad_sym",
    "cy22393fxit.kicad_mod",
    "cy22393fxit.glb",
    "cy22393fxit.step",
    "cy22393fxit.lbr",
    "docs/hero.png",
    "docs/cy22393fxit-datasheet.pdf",
    "viewers/symbol.html",
    "viewers/footprint.html"
  ],
  "visibility": {
    "public": true
  },
  "updated_at": "2026-09-24T19:35:42.733Z"
}