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CW32L083RCT6

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CW Microcontrollers (MCU/MPU/SOC), LQFP-64(10x10). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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CW32L083RCT6

CW · Microcontrollers (MCU/MPU/SOC) · LQFP-64(10x10)

CW32L083RCT6 from CW, in a LQFP-64(10x10). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 Vcore power_out Internal core-voltage regulator output (VCORE) that supplies the core logic, to be decoupled with ceramic capacitors placed close to the pin as stated for all power pairs.
2 PC13 bidirectional Standard I/O (TC structure), high-impedance input after reset; alternate functions PLL_OUT, RTC_1Hz, UART1_CTS, RTC_OUT, BTIM_ETR, GTIM3_ETR, RTC_TAMP.
3 PC14 bidirectional Standard I/O (TC structure) that doubles as OSC32_IN (low-speed oscillator input); alternate functions AUTOTRIM_ETR, GTIM4_CH4, UART1_RTS, UART4_TXD, SPI2_MISO, GTIM3_TOGP, GTIM3_CH1.
4 PC15 bidirectional Standard I/O (TC structure) that doubles as OSC32_OUT (low-speed oscillator output); alternate functions HSE_OUT, GTIM4_CH3, GTIM4_ETR, UART4_RXD, SPI2_MOSI, GTIM3_TOGN, GTIM3_CH2.
5 PF00 bidirectional Standard I/O (TC structure) that doubles as OSC_IN (high-speed oscillator input); alternate functions AUTOTRIM_ETR, GTIM4_CH2, I2C1_SDA, BTIM1_TOGN, SPI2_SCK, GTIM2_TOGP, GTIM3_CH3.
6 PF01 bidirectional Standard I/O (TC structure) that doubles as OSC_OUT (high-speed oscillator output); alternate functions LSE_OUT, GTIM4_CH1, I2C1_SCL, BTIM1_TOGP, SPI2_CS, GTIM2_TOGN, GTIM3_CH4.
7 NRST input Chip reset input with an internal permanent pull-up of 7 to 9 kΩ; VIL(NRST) maximum is 0.3VDD and the minimum reset pulse width is 20 µs.
8 PC00 bidirectional Analog-capable I/O (TTa structure) with analog function SEG23; alternate functions UART4_CTS, GTIM2_CH4, SPI1_CS, LPTIM_CH1, UART5_RXD, ATIM_CH1A, I2C2_SCL.
9 PC01 bidirectional Analog-capable I/O (TTa structure) with analog function SEG22; alternate functions UART4_RTS, GTIM2_CH3, SPI1_SCK, LPTIM_OUT, UART5_TXD, ATIM_CH2A, I2C2_SDA.
10 PC02 bidirectional Analog-capable I/O (TTa structure) with analog function SEG21; alternate functions UART4_RXD, GTIM2_CH2, SPI1_MISO, LPTIM_CH2, UART1_TXD, ATIM_CH3A.
11 PC03 bidirectional Analog-capable I/O (TTa structure) with analog function SEG20; alternate functions UART4_TXD, GTIM2_CH1, SPI1_MOSI, LPTIM_ETR, UART1_RXD, ATIM_BK.
12 VSSA power_in Analog ground (模拟地) for the analog supply domain.
13 VDDA power_in Analog supply, 1.65 V to 5.5 V, powering the ADC, reset circuit, internal RC oscillator and PLL; VDDA must always be greater than or equal to VDD.
14 PA00 bidirectional Analog-capable I/O (TTa structure) with analog functions ADC_AIN0, VC1_CH0, LVD_CH1; alternate functions UART3_CTS, UART6_CTS, RTC_TAMP, VC1_OUT, SPI2_MISO, GTIM2_CH1, GTIM2_ETR.
15 PA01 bidirectional Analog-capable I/O (TTa structure) with analog functions ADC_AIN1, VC1_CH1, SEG19; alternate functions UART3_RTS, UART6_RTS, I2C2_SCL, LVD_OUT, SPI2_MOSI, GTIM2_CH2, RTC_TAMP.
16 PA02 bidirectional Analog-capable I/O (TTa structure) with analog functions ADC_AIN2, VC1_CH2, SEG18; alternate functions UART3_TXD, UART6_TXD, I2C2_SDA, VC2_OUT, SPI2_SCK, GTIM2_CH3, AUTOTRIM_ETR.
17 PA03 bidirectional Analog-capable I/O (TTa structure) with analog functions ADC_AIN3, VC1_CH3, SEG17; alternate functions UART3_RXD, UART6_RXD, GTIM2_CH2, PCLK_OUT, SPI2_CS, GTIM2_CH4, ATIM_CH3A.
18 PF04 bidirectional Standard I/O (TC structure); alternate functions UART1_TXD, GTIM4_CH2, UART5_RXD.
19 PF05 bidirectional Standard I/O (TC structure); alternate functions UART1_RXD, BTIM_ETR, UART5_TXD, AUTOTRIM_ETR.
20 PA04 bidirectional Analog-capable I/O (TTa structure) with analog functions ADC_AIN4, VC1_CH4; alternate functions UART4_TXD, UART2_CTS, I2C2_SCL, HCLK_OUT, SPI1_CS, GTIM2_ETR, ATIM_CH2A.
21 PA05 bidirectional Analog-capable I/O (TTa structure) with analog functions ADC_AIN5, VC1_CH5; alternate functions GTIM2_ETR, UART2_RTS, I2C2_SDA, BTIM2_TOGN, SPI1_SCK, GTIM2_CH1, ATIM_CH1A.
22 PA06 bidirectional Analog-capable I/O (TTa structure) with analog functions ADC_AIN6, VC1_CH6, SEG16; alternate functions GTIM3_CH1, UART2_TXD, VC1_OUT, BTIM2_TOGP, SPI1_MISO, GTIM1_CH1, ATIM_BK.
23 PA07 bidirectional Analog-capable I/O (TTa structure) with analog functions ADC_AIN7, VC1_CH7, SEG15; alternate functions GTIM4_CH1, UART2_RXD, VC2_OUT, BTIM1_TOGN, SPI1_MOSI, GTIM1_CH2, ATIM_CH1B.
24 PC04 bidirectional Analog-capable I/O (TTa structure) with analog functions ADC_AIN8, SEG14; alternate functions UART1_TXD, UART6_RXD, IR_OUT, LSI_OUT.
25 PC05 bidirectional Analog-capable I/O (TTa structure) with analog functions ADC_AIN9, SEG13; alternate functions UART1_RXD, UART6_TXD, MCO_OUT, LPTIM_ETR, LPTIM_OUT.
26 PB00 bidirectional Analog-capable I/O (TTa structure) with analog functions ADC_AIN10/ExRef, VC2_CH0, LVD_CH2, SEG12; alternate functions UART5_RXD, UART1_CTS, I2C2_SCL, BTIM1_TOGP, HSIOSC_OUT, GTIM1_CH3, ATIM_CH2B.
27 PB01 bidirectional Analog-capable I/O (TTa structure) with analog functions ADC_AIN11, VC2_CH1, SEG11; alternate functions UART5_TXD, UART1_RTS, I2C2_SDA, GTIM4_TOGP, BTIM3_TOGN, GTIM1_CH4, ATIM_CH3B.
28 PB02 bidirectional Analog-capable I/O (TTa structure) with analog functions ADC_AIN12, VC2_CH2; alternate functions UART2_CTS, UART1_TXD, LPTIM_OUT, GTIM4_TOGN, BTIM3_TOGP, GTIM1_ETR, ATIM_CH1A.
29 PB10 bidirectional Analog-capable I/O (TTa structure) with analog functions VC2_CH3, SEG10; alternate functions UART2_RTS, UART4_RXD, I2C1_SCL, I2C2_SCL, SPI2_SCK, GTIM2_CH3, ATIM_CH2A.
30 PB11 bidirectional Analog-capable I/O (TTa structure) with analog functions LVD_CH3, SEG9; alternate functions GTIM4_ETR, UART4_TXD, I2C1_SDA, I2C2_SDA, BTIM_ETR, GTIM2_CH4, ATIM_CH3A.
31 VSS power_in Digital ground (数字地).
32 VDD power_in Digital supply for the I/O and internal regulator, 1.65 V to 5.5 V; all VDD pins must be powered at the same voltage.
33 PB12 bidirectional Analog-capable I/O (TTa structure) with analog function SEG8; alternate functions GTIM2_TOGP, GTIM4_CH4, LSE_OUT, SPI2_CS, SPI1_CS, GTIM1_TOGP, ATIM_BK.
34 PB13 bidirectional Analog-capable I/O (TTa structure) with analog function SEG7; alternate functions GTIM2_TOGN, GTIM4_CH3, I2C2_SCL, SPI2_SCK, SPI1_SCK, GTIM1_TOGN, ATIM_CH1B.
35 PB14 bidirectional Analog-capable I/O (TTa structure) with analog function SEG6; alternate functions GTIM2_CH1, GTIM4_CH2, I2C2_SDA, SPI2_MISO, SPI1_MISO, RTC_OUT, ATIM_CH2B.
36 PB15 bidirectional Analog-capable I/O (TTa structure) with analog function SEG5; alternate functions GTIM2_CH2, GTIM4_CH1, BTIM2_TOGN, SPI2_MOSI, SPI1_MOSI, RTC_1Hz, ATIM_CH3B.
37 PC06 bidirectional Analog-capable I/O (TTa structure) with analog function SEG4; alternate functions UART4_RXD, UART3_TXD, BTIM2_TOGP, GTIM2_CH4, ATIM_CH1B.
38 PC07 bidirectional Analog-capable I/O (TTa structure) with analog function SEG3; alternate functions UART4_TXD, UART3_RXD, BTIM2_TOGN, GTIM2_CH3, ATIM_CH2B.
39 PC08 bidirectional Analog-capable I/O (TTa structure) with analog function SEG2; alternate functions UART4_CTS, UART6_TXD, GTIM4_ETR, GTIM2_CH2, ATIM_CH3B.
40 PC09 bidirectional Analog-capable I/O (TTa structure) with analog function SEG1; alternate functions UART4_RTS, UART6_RXD, I2C1_SDA, GTIM2_CH1, ATIM_ETR.
41 PA08 bidirectional Analog-capable I/O (TTa structure) with analog functions VC2_CH4, SEG0; alternate functions LPTIM_ETR, UART1_TXD, BTIM2_TOGP, MCO_OUT, LVD_OUT, GTIM3_ETR, ATIM_CH1A.
42 PA09 bidirectional Analog-capable I/O (TTa structure) with analog functions VC2_CH5, COM0; alternate functions UART3_TXD, UART1_RXD, I2C1_SCL, BTIM1_TOGN, SPI1_CS, GTIM3_CH1, ATIM_CH2A.
43 PA10 bidirectional Analog-capable I/O (TTa structure) with analog functions VC2_CH6, COM1; alternate functions UART3_RXD, UART1_CTS, I2C1_SDA, BTIM1_TOGP, SPI1_SCK, GTIM3_CH2, ATIM_CH3A.
44 PA11 bidirectional Analog-capable I/O (TTa structure) with analog functions VC2_CH7, COM2; alternate functions UART3_CTS, UART1_RTS, I2C2_SCL, VC1_OUT, SPI1_MISO, GTIM3_CH3.
45 PA12 bidirectional Analog-capable I/O (TTa structure) with analog function COM3; alternate functions UART3_RTS, BTIM_ETR, I2C2_SDA, VC2_OUT, SPI1_MOSI, GTIM3_CH4, ATIM_ETR.
46 PA13/SWDIO bidirectional Standard I/O (TC structure) that is configured as SWDIO with the internal pull-up enabled after reset; alternate functions I2C1_SDA, UART1_RXD, UART2_TXD, I2C2_SCL, IR_OUT.
47 PF06 bidirectional Standard I/O (TC structure); alternate functions UART6_CTS, I2C1_SCL, GTIM4_TOGP, UART2_CTS, I2C2_SCL, GTIM3_TOGP, BTIM3_TOGN.
48 PF07 bidirectional Standard I/O (TC structure); alternate functions UART6_RTS, I2C1_SDA, GTIM4_TOGN, UART2_RTS, I2C2_SDA, GTIM3_TOGN, BTIM3_TOGP.
49 PA14/SWCLK bidirectional Standard I/O (TC structure) that is configured as SWCLK with the internal pull-up enabled after reset; alternate functions UART3_TXD, I2C1_SCL, UART1_TXD, UART2_RXD, I2C2_SDA.
50 PA15 bidirectional Analog-capable I/O (TTa structure) with analog function SEG55; alternate functions UART3_RXD, GTIM2_CH1, UART1_RXD, UART2_TXD, SPI1_CS, GTIM2_ETR, ATIM_CH1B.
51 PC10 bidirectional Analog-capable I/O (TTa structure) with analog functions SEG31/COM4; alternate functions UART4_TXD, GTIM3_CH1, HCLK_OUT, BTIM1_TOGP, VC1_OUT, LPTIM_CH1, ATIM_CH2B.
52 PC11 bidirectional Analog-capable I/O (TTa structure) with analog functions SEG30/COM5; alternate functions UART4_RXD, GTIM3_CH2, IR_OUT, BTIM1_TOGN, VC2_OUT, LPTIM_CH2, ATIM_CH3B.
53 PC12 bidirectional Analog-capable I/O (TTa structure) with analog functions SEG29/COM6; alternate functions UART5_TXD, PCLK_OUT, LVD_OUT, UART6_RXD, PLL_OUT, HSIOSC_OUT.
54 PD02 bidirectional Analog-capable I/O (TTa structure) with analog functions SEG28/COM7; alternate functions UART5_RXD, GTIM4_CH1, BTIM_ETR, UART6_TXD, RTC_1Hz, GTIM3_ETR, ATIM_ETR.
55 PB03 bidirectional Analog-capable I/O (TTa structure) with analog functions SEG27/VLCD4; alternate functions UART3_RTS, GTIM2_CH2, UART4_CTS, UART2_TXD, SPI1_SCK, GTIM1_ETR, ATIM_CH2B.
56 PB04 bidirectional Analog-capable I/O (TTa structure) with analog functions SEG26/VLCD3; alternate functions UART3_CTS, GTIM4_ETR, UART4_RTS, UART2_RXD, SPI1_MISO, GTIM1_CH1, ATIM_CH3B.
57 PB05 bidirectional Analog-capable I/O (TTa structure) with analog functions SEG25/VLCD2; alternate functions UART4_RXD, GTIM3_CH4, LPTIM_CH1, UART2_RTS, SPI1_MOSI, GTIM1_CH2, ATIM_CH1A.
58 PB06 bidirectional Analog-capable I/O (TTa structure) with analog functions SEG24/VLCD1; alternate functions UART6_TXD, GTIM3_CH3, LPTIM_ETR, I2C1_SCL, SPI2_MOSI, GTIM1_TOGP, ATIM_CH2A.
59 PB07 bidirectional Analog-capable I/O (TTa structure); alternate functions UART6_RXD, GTIM3_CH2, LPTIM_CH2, I2C1_SDA, SPI2_MISO, GTIM1_TOGN, ATIM_CH3A.
60 PF03/BOOT input Dedicated BOOT pin sampled at startup to select between running the internal Bootloader and running the user program.
61 PB08 bidirectional Analog-capable I/O (TTa structure) with analog function SEG53; alternate functions I2C1_SCL, GTIM3_CH1, UART5_TXD, GTIM4_CH2, SPI2_SCK, GTIM1_CH3, ATIM_ETR.
62 PB09 bidirectional Analog-capable I/O (TTa structure) with analog function SEG52; alternate functions I2C1_SDA, GTIM4_CH1, UART5_RXD, IR_OUT, SPI2_CS, GTIM1_CH4, ATIM_BK.
63 VSS power_in Digital ground (数字地).
64 VDD power_in Digital supply for the I/O and internal regulator, 1.65 V to 5.5 V; all VDD pins must be powered at the same voltage.

Key specifications

Parameter Value
Manufacturer CW
Package LQFP-64(10x10)
Category Embedded Processors & Controllers
Pins 64

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
VDD-VSS supply voltage (abs max) VDD-VSS -0.3 6 V 45
VDDA-VSS analog supply voltage (abs max) VDDA-VSS -0.3 6 V 45
Max VDD-VDDA difference when VDD > VDDA VDD-VDDA 0.3 V 45
Difference between VDD pins /ΔVDDx/ 0.05 V 45
Difference between VSS pins /VSSX-VSS/ 0.05 V 45
Sum of current into all VDD supply lines ΣIVDD 120 mA 45
Sum of current out of all VSS supply lines ΣIVSS -120 mA 45
Current into a single VDD supply line IVDD(PIN) 100 mA 45
Current out of a single VSS supply line IVSS(PIN) -100 mA 45
Sink current, single I/O or control pin IIO(PIN) 25 mA 45
Source current, single I/O or control pin IIO(PIN) -25 mA 45
Sum of sink current, all I/O or control pins ΣIIO(PIN) 80 mA 45
Injection current, TC and RST pins IINJ(PIN) -5 5 mA 45
Injection current, TTa pin IINJ(PIN) -5 5 mA 45
Sum of injection current, all I/O or control pins ΣIINJ(PIN) -25 25 mA 45
Storage temperature range TSTG -65 150 ℃ 46
Maximum junction temperature TJ 105 ℃ 46
ESD voltage, human body model VESD(HBM) 8 kV TA=+25℃, JESD22-A115C 57
fHCLK internal AHB bus frequency fHCLK 0 64 MHz VDD ≥ 1.8V 47
fPCLK internal APB bus frequency fPCLK 0 64 MHz VDD ≥ 1.8V 47
fHCLK internal AHB bus frequency fHCLK 0 24 MHz 1.65V ≤ VDD < 1.8V 47
fPCLK internal APB bus frequency fPCLK 0 24 MHz 1.65V ≤ VDD < 1.8V 47
Standard operating voltage VDD 1.65 5.5 V 47
Analog operating voltage (must equal VDD) VDDA 1.65 5.5 V 须等于 VDD 47
Ambient temperature (temperature grade 6) TA -40 85 ℃ Maximum power dissipation 47
Ambient temperature, low power dissipation TA -40 105 ℃ Low power dissipation 47
Junction temperature range (grade 6) TJ -40 105 ℃ 温度标号 6 47
Power dissipation, LQFP64 PD 435 mW TA=85℃ 47
VDD fall rate tVDD 20 μs/V 47
VDDA fall rate tVDDA 20 μs/V 47
Power-on/brown-out reset threshold, falling edge VPOR/BOR 1.45 1.5 1.55 V 48
Power-on/brown-out reset threshold, rising edge VPOR/BOR 1.5 1.55 1.6 V 48
Reset duration tRSTTEMPO 4 6.5 13 ms 48
Internal 1.5V reference voltage VREFINT1V5 1.485 1.5 1.515 V -40℃ < TA < +85℃ 48
Internal 2.5V reference voltage VREFINT2V5 2.475 2.5 2.525 V -40℃ < TA < +85℃ 48
Internal reference voltage spread over full temperature range ΔVREFINT 10 mV VDDA = 3V 48
Internal reference temperature coefficient TCoeff -60 60 ppm/℃ 48
Run-mode supply current, code from FLASH, 64 MHz, all peripherals on IDD 13.6 15 mA VDD=VDDA=5.5V, TA=85℃, HSI/HSE, PLL on 49
Run-mode supply current, code from RAM, 64 MHz, all peripherals on IDD 12.5 13.7 mA VDD=VDDA=5.5V, TA=85℃, HSI/HSE, PLL on 49
Sleep-mode supply current, 64 MHz, all peripherals on IDD 9.2 10.2 mA VDD=VDDA=5.5V, TA=85℃, HSI/HSE, PLL on 49
DeepSleep supply current, regulator in run mode, all oscillators off IDD 0.6 8 μA Typ @3.6V; max @TA=85℃ 50
DeepSleep supply current, LSI and IWDT on IDD 1.7 9 μA Typ @3.6V; max @TA=85℃ 50
DeepSleep supply current, LSE on IDD 1.3 8.8 μA Typ @3.6V; max @TA=85℃ 50
Wake-up time from DeepSleep tWUDEEP 4 5 μs 稳压器处于运行模式 51
User external high-speed clock frequency fHSE_EXT 1 32 MHz 52
HSE oscillator frequency fOSC_IN 4 8 32 MHz 54
HSE oscillator current during startup IDD 900 μA Startup (first 2/3 of tsu(HSE)) 54
HSI duty cycle DutyHSI 45 55 % 55
HSI factory calibration accuracy ACCHSI -2 2 % TA = -40℃ ~ +85℃ 55
HSI factory calibration accuracy ACCHSI -0.5 0.5 % TA = +25℃ 55
LSI factory calibration accuracy ACCLSI -3 3 % TA = -40℃ ~ +85℃ 55
PLL input frequency fPLL_IN 4 24 MHz 56
PLL output frequency fPLL_OUT 8 64 MHz 56
PLL lock time tLOCK 100 200 μs 56
NRST weak pull-up equivalent resistance RPU 7 8 9 kΩ VIN = VSS 61
I/O weak pull-up equivalent resistance RPU 50 80 180 kΩ VIN = VSS 58
I/O weak pull-down equivalent resistance RPD 20 30 45 kΩ VIN = VDDIOx 58
High-level output voltage VOH 3.02 V Sourcing 10mA, VDD = 3.3V 59
Low-level output voltage VOL 0.23 V Sinking 10mA, VDD = 3.3V 59
ADC total (integral) accuracy ET -3 3 LSB fADC = 24MHz, VDDA = 1.65V5.5V, TA = -40℃+85℃ 63

CAD (KiCad official)

  • Symbol: CW32L083RCT6
  • Footprint: Package_QFP:LQFP-64_10x10mm_P0.5mm
  • 3D model: LQFP-64(10x10) (KiCad packages3D, STEP)
  • 3D model files: cw32l083rct6-etched.step / cw32l083rct6-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); cw32l083rct6.step / cw32l083rct6.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: CW datasheet (83 pp, sha256 7673e3c02dbf8cdf, retrieved 2026-10-19, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF