CW32L052C8T6

{
  "slug": "cw32l052c8t6",
  "version": "0.1.0",
  "type": "component",
  "description": "CW Microcontrollers (MCU/MPU/SOC), LQFP-48(7x7). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
  "tags": [
    "component",
    "embedded processors & controllers",
    "cw32l052c8t6",
    "factory-2.0.0",
    "extractor-text"
  ],
  "dependencies": {},
  "hero": {
    "type": "image",
    "path": "docs/hero.png"
  },
  "files": [
    "page.json",
    "README.md",
    "cw32l052c8t6.kicad_sym",
    "cw32l052c8t6.kicad_mod",
    "cw32l052c8t6.glb",
    "cw32l052c8t6.step",
    "cw32l052c8t6.lbr",
    "docs/hero.png",
    "docs/cw32l052c8t6-datasheet.pdf",
    "viewers/symbol.html",
    "viewers/footprint.html",
    "cw32l052c8t6-hero.glb",
    "cw32l052c8t6-hero.overlay.json",
    "cw32l052c8t6-etched.glb"
  ],
  "component": {
    "mpn": "CW32L052C8T6",
    "manufacturer": "CW",
    "package": "LQFP-48(7x7)",
    "pin_count": 48,
    "category": "Embedded Processors & Controllers",
    "subcategory": "Microcontrollers (MCU/MPU/SOC)",
    "datasheet": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8590918278330609664",
    "parts": {
      "symbol": "cw32l052c8t6.kicad_sym",
      "footprint": "cw32l052c8t6.kicad_mod",
      "model_3d": "cw32l052c8t6-hero.glb",
      "model_3d_plain": "cw32l052c8t6-etched.glb",
      "model_3d_step": "cw32l052c8t6-etched.step",
      "model_3d_step_plain": "cw32l052c8t6.step",
      "lbr": "cw32l052c8t6.lbr"
    },
    "distributor_links": {
      "lcsc": "C20539241"
    },
    "distributor_check": {
      "checked_at": "2026-10-17T21:10:42Z",
      "source": "Component Ocean /api/assign-pns",
      "digikey": {
        "pn": null,
        "status": "quota"
      },
      "mouser": {
        "pn": null,
        "status": "quota"
      }
    },
    "pins": [
      {
        "number": "1",
        "name": "Vcore",
        "type": "power_out",
        "description": "Internal regulator supply output that must be connected to ground through a 1 µF capacitor and is for internal circuit use only."
      },
      {
        "number": "2",
        "name": "PC13",
        "type": "bidirectional",
        "description": "Standard TC I/O with reset-default function PC13; alternate functions RTC_1Hz, UART1_CTS, RTC_OUT, BTIM_ETR, GTIM3_ETR and RTC_TAMP are selected through GPIOC_AFRy."
      },
      {
        "number": "3",
        "name": "PC14",
        "type": "bidirectional",
        "description": "Standard TC I/O with reset-default function PC14 that doubles as the OSC32_IN low-speed oscillator input; digital alternates AUTOTRIM_ETR, GTIM1_CH4, UART1_RTS, UART1_TXD, SPI2_MISO, GTIM3_TOGP and GTIM3_CH1 are selected through GPIOC_AFRy."
      },
      {
        "number": "4",
        "name": "PC15",
        "type": "bidirectional",
        "description": "Standard TC I/O with reset-default function PC15 that doubles as the OSC32_OUT low-speed oscillator output; digital alternates HSE_OUT, GTIM1_CH3, GTIM1_ETR, UART1_RXD, SPI2_MOSI, GTIM3_TOGN and GTIM3_CH2 are selected through GPIOC_AFRy."
      },
      {
        "number": "5",
        "name": "PF00",
        "type": "bidirectional",
        "description": "Standard TC I/O with reset-default function PF00 that doubles as the OSC_IN high-speed oscillator input; digital alternates AUTOTRIM_ETR, GTIM1_CH2, I2C1_SDA, BTIM1_TOGN, SPI2_SCK, GTIM2_TOGP and GTIM3_CH3 are selected through GPIOF_AFRy."
      },
      {
        "number": "6",
        "name": "PF01",
        "type": "bidirectional",
        "description": "Standard TC I/O with reset-default function PF01 that doubles as the OSC_OUT high-speed oscillator output; digital alternates LSE_OUT, GTIM1_CH1, I2C1_SCL, BTIM1_TOGP, SPI2_CS, GTIM2_TOGN and GTIM3_CH4 are selected through GPIOF_AFRy."
      },
      {
        "number": "7",
        "name": "NRST",
        "type": "input",
        "description": "Chip reset input with internal pull-up of 7-9 kΩ; the reset pulse must be at least 20 µs and the input low level must be below 0.3VDD."
      },
      {
        "number": "8",
        "name": "VSSA",
        "type": "power_in",
        "description": "Analog ground."
      },
      {
        "number": "9",
        "name": "VDDA",
        "type": "power_in",
        "description": "Analog supply for the ADC, reset circuit and internal RC oscillator, 1.65 V to 5.5 V, which must always be greater than or equal to VDD."
      },
      {
        "number": "10",
        "name": "PA00",
        "type": "bidirectional",
        "description": "TTa I/O with analog functions ADC_AIN0, VC1_CH0 and LVD_CH1 set by peripheral registers; digital alternates UART3_CTS, UART2_CTS, RTC_TAMP, VC1_OUT, SPI2_MISO, GTIM2_CH1 and GTIM2_ETR are selected through GPIOA_AFRy."
      },
      {
        "number": "11",
        "name": "PA01",
        "type": "bidirectional",
        "description": "TTa I/O with analog functions ADC_AIN1, VC1_CH1 and SEG19 set by peripheral registers; digital alternates UART3_RTS, UART2_RTS, I2C2_SCL, LVD_OUT, SPI2_MOSI, GTIM2_CH2 and RTC_TAMP are selected through GPIOA_AFRy."
      },
      {
        "number": "12",
        "name": "PA02",
        "type": "bidirectional",
        "description": "TTa I/O with analog functions ADC_AIN2, VC1_CH2 and SEG18 set by peripheral registers; digital alternates UART3_TXD, UART2_TXD, I2C2_SDA, VC2_OUT, SPI2_SCK, GTIM2_CH3 and AUTOTRIM_ETR are selected through GPIOA_AFRy."
      },
      {
        "number": "13",
        "name": "PA03",
        "type": "bidirectional",
        "description": "TTa I/O with analog functions ADC_AIN3, VC1_CH3 and SEG17 set by peripheral registers; digital alternates UART3_RXD, UART2_RXD, GTIM2_CH2, PCLK_OUT, SPI2_CS, GTIM2_CH4 and ATIM_CH3A are selected through GPIOA_AFRy."
      },
      {
        "number": "14",
        "name": "PA04",
        "type": "bidirectional",
        "description": "TTa I/O with analog functions ADC_AIN4 and VC1_CH4 set by peripheral registers; digital alternates UART1_TXD, UART2_CTS, I2C2_SCL, HCLK_OUT, SPI1_CS, GTIM2_ETR and ATIM_CH2A are selected through GPIOA_AFRy."
      },
      {
        "number": "15",
        "name": "PA05",
        "type": "bidirectional",
        "description": "TTa I/O with analog functions ADC_AIN5 and VC1_CH5 set by peripheral registers; digital alternates GTIM2_ETR, UART2_RTS, I2C2_SDA, BTIM2_TOGN, SPI1_SCK, GTIM2_CH1 and ATIM_CH1A are selected through GPIOA_AFRy."
      },
      {
        "number": "16",
        "name": "PA06",
        "type": "bidirectional",
        "description": "TTa I/O with analog functions ADC_AIN6, VC1_CH6 and SEG16 set by peripheral registers; digital alternates GTIM3_CH1, UART2_TXD, VC1_OUT, BTIM2_TOGP, SPI1_MISO, GTIM1_CH1 and ATIM_BK are selected through GPIOA_AFRy."
      },
      {
        "number": "17",
        "name": "PA07",
        "type": "bidirectional",
        "description": "TTa I/O with analog functions ADC_AIN7, VC1_CH7 and SEG15 set by peripheral registers; digital alternates GTIM2_CH1, UART2_RXD, VC2_OUT, BTIM1_TOGN, SPI1_MOSI, GTIM1_CH2 and ATIM_CH1B are selected through GPIOA_AFRy."
      },
      {
        "number": "18",
        "name": "PB00",
        "type": "bidirectional",
        "description": "TTa I/O with analog functions ADC_AIN10/ExRef, VC2_CH0, LVD_CH2 and SEG12 set by peripheral registers; digital alternates UART2_RXD, UART1_CTS, I2C2_SCL, BTIM1_TOGP, HSIOSC_OUT, GTIM1_CH3 and ATIM_CH2B are selected through GPIOB_AFRy."
      },
      {
        "number": "19",
        "name": "PB01",
        "type": "bidirectional",
        "description": "TTa I/O with analog functions ADC_AIN11, VC2_CH1 and SEG11 set by peripheral registers; digital alternates UART2_TXD, UART1_RTS, I2C2_SDA, GTIM2_TOGP, BTIM3_TOGN, GTIM1_CH4 and ATIM_CH3B are selected through GPIOB_AFRy."
      },
      {
        "number": "20",
        "name": "PB02",
        "type": "bidirectional",
        "description": "TTa I/O with analog functions ADC_AIN12 and VC2_CH2 set by peripheral registers; digital alternates UART2_CTS, UART1_TXD, LPTIM_OUT, GTIM2_TOGN, BTIM3_TOGP, GTIM1_ETR and ATIM_CH1A are selected through GPIOB_AFRy."
      },
      {
        "number": "21",
        "name": "PB10",
        "type": "bidirectional",
        "description": "TTa I/O with analog functions VC2_CH3 and SEG10 set by peripheral registers; digital alternates UART2_RTS, UART1_RXD, I2C1_SCL, I2C2_SCL, SPI2_SCK, GTIM2_CH3 and ATIM_CH2A are selected through GPIOB_AFRy."
      },
      {
        "number": "22",
        "name": "PB11",
        "type": "bidirectional",
        "description": "TTa I/O with analog functions LVD_CH3 and SEG9 set by peripheral registers; digital alternates GTIM3_ETR, UART1_TXD, I2C1_SDA, I2C2_SDA, BTIM_ETR, GTIM2_CH4 and ATIM_CH3A are selected through GPIOB_AFRy."
      },
      {
        "number": "23",
        "name": "VSS",
        "type": "power_in",
        "description": "Digital ground."
      },
      {
        "number": "24",
        "name": "VDD",
        "type": "power_in",
        "description": "Digital supply for the I/O ports and internal regulator, 1.65 V to 5.5 V; all VDD pins must be powered at the same voltage."
      },
      {
        "number": "25",
        "name": "PB12",
        "type": "bidirectional",
        "description": "TTa I/O with analog function SEG8 set by peripheral registers; digital alternates GTIM2_TOGP, GTIM3_CH4, LSE_OUT, SPI2_CS, SPI1_CS, GTIM1_TOGP and ATIM_BK are selected through GPIOB_AFRy."
      },
      {
        "number": "26",
        "name": "PB13",
        "type": "bidirectional",
        "description": "TTa I/O with analog function SEG7 set by peripheral registers; digital alternates GTIM2_TOGN, GTIM3_CH3, I2C2_SCL, SPI2_SCK, SPI1_SCK, GTIM1_TOGN and ATIM_CH1B are selected through GPIOB_AFRy."
      },
      {
        "number": "27",
        "name": "PB14",
        "type": "bidirectional",
        "description": "TTa I/O with analog function SEG6 set by peripheral registers; digital alternates GTIM2_CH1, GTIM3_CH2, I2C2_SDA, SPI2_MISO, SPI1_MISO, RTC_OUT and ATIM_CH2B are selected through GPIOB_AFRy."
      },
      {
        "number": "28",
        "name": "PB15",
        "type": "bidirectional",
        "description": "TTa I/O with analog function SEG5 set by peripheral registers; digital alternates GTIM2_CH2, GTIM3_CH1, BTIM2_TOGN, SPI2_MOSI, SPI1_MOSI, RTC_1Hz and ATIM_CH3B are selected through GPIOB_AFRy."
      },
      {
        "number": "29",
        "name": "PA08",
        "type": "bidirectional",
        "description": "TTa I/O with analog functions VC2_CH4 and SEG0 set by peripheral registers; digital alternates LPTIM_ETR, UART1_TXD, BTIM2_TOGP, MCO_OUT, LVD_OUT, GTIM3_ETR and ATIM_CH1A are selected through GPIOA_AFRy."
      },
      {
        "number": "30",
        "name": "PA09",
        "type": "bidirectional",
        "description": "TTa I/O with analog functions VC2_CH5 and COM0 set by peripheral registers; digital alternates UART3_TXD, UART1_RXD, I2C1_SCL, BTIM1_TOGN, SPI1_CS, GTIM3_CH1 and ATIM_CH2A are selected through GPIOA_AFRy."
      },
      {
        "number": "31",
        "name": "PA10",
        "type": "bidirectional",
        "description": "TTa I/O with analog functions VC2_CH6 and COM1 set by peripheral registers; digital alternates UART3_RXD, UART1_CTS, I2C1_SDA, BTIM1_TOGP, SPI1_SCK, GTIM3_CH2 and ATIM_CH3A are selected through GPIOA_AFRy."
      },
      {
        "number": "32",
        "name": "PA11",
        "type": "bidirectional",
        "description": "TTa I/O with analog functions VC2_CH7 and COM2 set by peripheral registers; digital alternates UART3_CTS, UART1_RTS, I2C2_SCL, VC1_OUT, SPI1_MISO and GTIM3_CH3 are selected through GPIOA_AFRy."
      },
      {
        "number": "33",
        "name": "PA12",
        "type": "bidirectional",
        "description": "TTa I/O with analog function COM3 set by peripheral registers; digital alternates UART3_RTS, BTIM_ETR, I2C2_SDA, VC2_OUT, SPI1_MOSI, GTIM3_CH4 and ATIM_ETR are selected through GPIOA_AFRy."
      },
      {
        "number": "34",
        "name": "PA13/SWDIO",
        "type": "bidirectional",
        "description": "Standard TC I/O that is configured as the SWDIO debug pin after reset with its internal pull-up enabled by default; alternates I2C1_SDA, UART1_RXD, UART2_TXD, I2C2_SCL and IR_OUT are selected through GPIOA_AFRy."
      },
      {
        "number": "35",
        "name": "PF06",
        "type": "bidirectional",
        "description": "Standard TC I/O with digital alternates UART3_CTS, I2C1_SCL, GTIM1_TOGP, UART2_CTS, I2C2_SCL, GTIM3_TOGP and BTIM3_TOGN selected through GPIOF_AFRy."
      },
      {
        "number": "36",
        "name": "PF07",
        "type": "bidirectional",
        "description": "Standard TC I/O with digital alternates UART3_RTS, I2C1_SDA, GTIM1_TOGN, UART2_RTS, I2C2_SDA, GTIM3_TOGN and BTIM3_TOGP selected through GPIOF_AFRy."
      },
      {
        "number": "37",
        "name": "PA14/SWCLK",
        "type": "bidirectional",
        "description": "Standard TC I/O that is configured as the SWCLK debug pin after reset with its internal pull-up enabled by default; alternates UART3_TXD, I2C1_SCL, UART1_TXD, UART2_RXD and I2C2_SDA are selected through GPIOA_AFRy."
      },
      {
        "number": "38",
        "name": "PA15",
        "type": "bidirectional",
        "description": "TTa I/O with analog function SEG55 set by peripheral registers; digital alternates UART3_RXD, GTIM2_CH1, UART1_RXD, UART2_TXD, SPI1_CS, GTIM2_ETR and ATIM_CH1B are selected through GPIOA_AFRy."
      },
      {
        "number": "39",
        "name": "PB03",
        "type": "bidirectional",
        "description": "TTa I/O with analog functions SEG27 and VLCD4 set by peripheral registers; digital alternates UART3_RTS, GTIM2_CH2, UART1_CTS, UART2_TXD, SPI1_SCK, GTIM1_ETR and ATIM_CH2B are selected through GPIOB_AFRy."
      },
      {
        "number": "40",
        "name": "PB04",
        "type": "bidirectional",
        "description": "TTa I/O with analog functions SEG26 and VLCD3 set by peripheral registers; digital alternates UART3_CTS, GTIM2_ETR, UART1_RTS, UART2_RXD, SPI1_MISO, GTIM1_CH1 and ATIM_CH3B are selected through GPIOB_AFRy."
      },
      {
        "number": "41",
        "name": "PB05",
        "type": "bidirectional",
        "description": "TTa I/O with analog functions SEG25 and VLCD2 set by peripheral registers; digital alternates UART1_RXD, GTIM3_CH4, LPTIM_CH1, UART2_RTS, SPI1_MOSI, GTIM1_CH2 and ATIM_CH1A are selected through GPIOB_AFRy."
      },
      {
        "number": "42",
        "name": "PB06",
        "type": "bidirectional",
        "description": "TTa I/O with analog functions SEG24 and VLCD1 set by peripheral registers; digital alternates UART3_TXD, GTIM3_CH3, LPTIM_ETR, I2C1_SCL, SPI2_MOSI, GTIM1_TOGP and ATIM_CH2A are selected through GPIOB_AFRy."
      },
      {
        "number": "43",
        "name": "PB07",
        "type": "bidirectional",
        "description": "TTa I/O with digital alternates UART3_RXD, GTIM3_CH2, LPTIM_CH2, I2C1_SDA, SPI2_MISO, GTIM1_TOGN and ATIM_CH3A selected through GPIOB_AFRy."
      },
      {
        "number": "44",
        "name": "PF03/BOOT",
        "type": "input",
        "description": "Dedicated BOOT pin that selects at startup between running the internal Bootloader and running the user program."
      },
      {
        "number": "45",
        "name": "PB08",
        "type": "bidirectional",
        "description": "TTa I/O with analog function SEG53 set by peripheral registers; digital alternates I2C1_SCL, GTIM3_CH1, UART2_TXD, GTIM2_CH2, SPI2_SCK, GTIM1_CH3 and ATIM_ETR are selected through GPIOB_AFRy."
      },
      {
        "number": "46",
        "name": "PB09",
        "type": "bidirectional",
        "description": "TTa I/O with analog function SEG52 set by peripheral registers; digital alternates I2C1_SDA, GTIM2_CH1, UART2_RXD, IR_OUT, SPI2_CS, GTIM1_CH4 and ATIM_BK are selected through GPIOB_AFRy."
      },
      {
        "number": "47",
        "name": "VSS",
        "type": "power_in",
        "description": "Digital ground."
      },
      {
        "number": "48",
        "name": "VDD",
        "type": "power_in",
        "description": "Digital supply for the I/O ports and internal regulator, 1.65 V to 5.5 V; all VDD pins must be powered at the same voltage."
      }
    ],
    "provenance": {
      "extractor": "extract_pins 0.3",
      "factory_chain": {
        "factory": "2.0.0",
        "extractor": "extract_pins 0.3",
        "primary_model": "claude-haiku-5-5",
        "primary_mode": "text",
        "consensus_model": "claude-sonnet-5-5",
        "consensus": "agreed",
        "guards": "pin_guards 0.1: passed",
        "guard_notes": [
          "extractor flagged: Package is LQFP48 (7mm×7mm). Ordering table (page 77) lists CW32L052C8T6, and the family table (page; Pin descriptions are built from the Table 5-2 functions and the Table 5-3 to 5-7 alternate-function ; PF03/BOOT (pin 44) is typed as input (I) with BOOT structure in Table 5-2, and it lists no digital o"
        ],
        "pages_sent": 70,
        "cost_usd": 0.2622,
        "at": "2026-10-17T21:08:56"
      },
      "datasheet": {
        "url": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8590918278330609664",
        "pages": 79,
        "sha256": "eed9d435f5af5b43",
        "source_tier": "lcsc"
      },
      "cad": "KiCad official (CC-BY-SA 4.0)",
      "pins": {
        "total": 48,
        "described": 48,
        "cites_pages": true,
        "refuses_to_fabricate": true
      }
    },
    "viewers": {
      "symbol": "viewers/symbol.html",
      "footprint": "viewers/footprint.html"
    },
    "models_3d": [
      {
        "file": "cw32l052c8t6.step",
        "role": "plain",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          9.0,
          9.0,
          1.5
        ],
        "zmin_mm": -0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "9dea352d93177c2904afd7d7b68ea8855ce1ab691f69f8b3e13655600514b6bf",
        "checked": "2026-10-17",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      },
      {
        "file": "cw32l052c8t6-etched.step",
        "role": "eda",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          9.0,
          9.0,
          1.5
        ],
        "zmin_mm": -0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "7dc4a4c2fe8219940f54d7daa66eccd06670ca02f3c2930720beb3f70549d227",
        "checked": "2026-10-17",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      }
    ]
  }
}