component
CSD88537ND
Public Made by Adomby adom
Texas Instruments MOSFETs, SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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CSD88537ND
Texas Instruments · MOSFETs · SOIC-8
CSD88537ND from Texas Instruments, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | S1 | passive | Source terminal of N-channel MOSFET 1 in the dual half-bridge; the datasheet gives no separate pin-level electrical limit for this terminal beyond the device absolute maximum ratings (VDS 60 V, VGS ±20 V). |
| 2 | G1 | input | Gate of N-channel MOSFET 1; the datasheet specifies VGS absolute maximum of ±20 V for the device. |
| 3 | G2 | input | Gate of N-channel MOSFET 2; the datasheet specifies VGS absolute maximum of ±20 V for the device. |
| 4 | S2 | passive | Source terminal of N-channel MOSFET 2 in the dual half-bridge; the datasheet gives no separate pin-level electrical limit for this terminal beyond the device absolute maximum ratings (VDS 60 V, VGS ±20 V). |
| 5 | D2 | passive | Drain of N-channel MOSFET 2; pins 5 and 6 are both D2 and are internally common, with the device rated for VDS 60 V. |
| 6 | D2 | passive | Drain of N-channel MOSFET 2; pins 5 and 6 are both D2 and are internally common, with the device rated for VDS 60 V. |
| 7 | D1 | passive | Drain of N-channel MOSFET 1; pins 7 and 8 are both D1 and are internally common, with the device rated for VDS 60 V. |
| 8 | D1 | passive | Drain of N-channel MOSFET 1; pins 7 and 8 are both D1 and are internally common, with the device rated for VDS 60 V. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SOIC-8 |
| Category | Transistors/Thyristors |
| Pins | 8 |
CAD (KiCad official)
- Symbol:
CSD88537ND - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SOIC-8 (KiCad packages3D, STEP)
- 3D model files:
csd88537nd-etched.step/csd88537nd-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);csd88537nd.step/csd88537nd.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (11 pp, sha256
549c0b241a9c3fbd, retrieved 2026-10-08, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# CSD88537ND
**Texas Instruments** · MOSFETs · SOIC-8
CSD88537ND from Texas Instruments, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | S1 | passive | Source terminal of N-channel MOSFET 1 in the dual half-bridge; the datasheet gives no separate pin-level electrical limit for this terminal beyond the device absolute maximum ratings (VDS 60 V, VGS ±20 V). |
| 2 | G1 | input | Gate of N-channel MOSFET 1; the datasheet specifies VGS absolute maximum of ±20 V for the device. |
| 3 | G2 | input | Gate of N-channel MOSFET 2; the datasheet specifies VGS absolute maximum of ±20 V for the device. |
| 4 | S2 | passive | Source terminal of N-channel MOSFET 2 in the dual half-bridge; the datasheet gives no separate pin-level electrical limit for this terminal beyond the device absolute maximum ratings (VDS 60 V, VGS ±20 V). |
| 5 | D2 | passive | Drain of N-channel MOSFET 2; pins 5 and 6 are both D2 and are internally common, with the device rated for VDS 60 V. |
| 6 | D2 | passive | Drain of N-channel MOSFET 2; pins 5 and 6 are both D2 and are internally common, with the device rated for VDS 60 V. |
| 7 | D1 | passive | Drain of N-channel MOSFET 1; pins 7 and 8 are both D1 and are internally common, with the device rated for VDS 60 V. |
| 8 | D1 | passive | Drain of N-channel MOSFET 1; pins 7 and 8 are both D1 and are internally common, with the device rated for VDS 60 V. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SOIC-8 |
| Category | Transistors/Thyristors |
| Pins | 8 |
## CAD (KiCad official)
- Symbol: `CSD88537ND`
- Footprint: `Package_SO:SOIC-8_3.9x4.9mm_P1.27mm`
- 3D model: SOIC-8 (KiCad packages3D, STEP)
- 3D model files: `csd88537nd-etched.step` / `csd88537nd-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `csd88537nd.step` / `csd88537nd.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/lit/ds/symlink/csd88537nd.pdf) (11 pp, sha256 `549c0b241a9c3fbd`, retrieved 2026-10-08, tier: manufacturer)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/csd88537nd-datasheet.pdf)