Loads on click. Unloads only if this page sits in the background.

Symbol & Footprint

Schematic Symbol

Open full view ↗
Loads on click. Unloads only if this page sits in the background.

PCB Footprint

Open full view ↗
Loads on click. Unloads only if this page sits in the background.
Loads on click. Unloads only if this page sits in the background.
Download PDF
Contents

README

markdown

CSD88537ND

Texas Instruments · MOSFETs · SOIC-8

CSD88537ND from Texas Instruments, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 S1 passive Source terminal of N-channel MOSFET 1 in the dual half-bridge; the datasheet gives no separate pin-level electrical limit for this terminal beyond the device absolute maximum ratings (VDS 60 V, VGS ±20 V).
2 G1 input Gate of N-channel MOSFET 1; the datasheet specifies VGS absolute maximum of ±20 V for the device.
3 G2 input Gate of N-channel MOSFET 2; the datasheet specifies VGS absolute maximum of ±20 V for the device.
4 S2 passive Source terminal of N-channel MOSFET 2 in the dual half-bridge; the datasheet gives no separate pin-level electrical limit for this terminal beyond the device absolute maximum ratings (VDS 60 V, VGS ±20 V).
5 D2 passive Drain of N-channel MOSFET 2; pins 5 and 6 are both D2 and are internally common, with the device rated for VDS 60 V.
6 D2 passive Drain of N-channel MOSFET 2; pins 5 and 6 are both D2 and are internally common, with the device rated for VDS 60 V.
7 D1 passive Drain of N-channel MOSFET 1; pins 7 and 8 are both D1 and are internally common, with the device rated for VDS 60 V.
8 D1 passive Drain of N-channel MOSFET 1; pins 7 and 8 are both D1 and are internally common, with the device rated for VDS 60 V.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package SOIC-8
Category Transistors/Thyristors
Pins 8

CAD (KiCad official)

  • Symbol: CSD88537ND
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOIC-8 (KiCad packages3D, STEP)
  • 3D model files: csd88537nd-etched.step / csd88537nd-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); csd88537nd.step / csd88537nd.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (11 pp, sha256 549c0b241a9c3fbd, retrieved 2026-10-08, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF