component

CSD87502Q2

Public Made by Adom

by adom

Texas Instruments MOSFETs, WSON-6(2x2). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

componenttransistorscsd87502q2factory-2.0.0extractor-text
Overview Files Discover Packages Releases Dependencies Issues Breadcrumbs Pull Requests Activity
main
Download ZIP Propose a change
Generated by kicad-footprint-generator · KiCad file format 20260206
Name Last commit message Last updated
docs Publish 0.1.0 · Ray 7h ago
viewers csd87502q2: viewers · Ray 7h ago
csd87502q2-etched.glb Publish 0.1.0 · Ray 7h ago
csd87502q2-etched.step csd87502q2: factory component page (tier=mfr) · Ray 7h ago
csd87502q2-hero.glb csd87502q2: hero GLB from the etched model (keeps the MPN mark) · Ray 7h ago
csd87502q2-hero.overlay.json Publish 0.1.0 · Ray 7h ago
csd87502q2.glb Publish 0.1.0 · Ray 7h ago
csd87502q2.kicad_mod Publish 0.1.0 · Ray 7h ago
csd87502q2.kicad_sym Publish 0.1.0 · Ray 7h ago
csd87502q2.lbr Publish 0.1.0 · Ray 7h ago
csd87502q2.step Publish 0.1.0 · Ray 7h ago
package.json Publish 0.1.0 · Ray 7h ago
page.json Set visibility: public · Ray 7h ago
README.md Publish 0.1.0 · Ray 7h ago

CSD87502Q2

Texas Instruments · MOSFETs · WSON-6(2x2)

CSD87502Q2 from Texas Instruments, in a WSON-6(2x2). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 S1 passive Source of FET 1 (Q1), pin 1 index corner on the top view; the dual FETs are rated 30 V VDS.
2 G1 input Gate of FET 1 (Q1); VGS rated ±20 V, optimized for 5 V gate drive.
3 D2 passive Drain of FET 2 (Q2), connected to the central D2 pad; VDS rated 30 V.
4 S2 passive Source of FET 2 (Q2).
5 G2 input Gate of FET 2 (Q2); VGS rated ±20 V, optimized for 5 V gate drive.
6 D1 passive Drain of FET 1 (Q1), connected to the central D1 pad; VDS rated 30 V.
7 EP passive Exposed pad (from the footprint; not named in the datasheet pin table).

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package WSON-6(2x2)
Category Transistors
Pins 7

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Drain-to-Source Voltage VDS 30 V TA = 25°C 1
Gate-to-Source Voltage VGS -20 20 V TA = 25°C 1
Continuous Drain Current (Package limited) ID 5 A TA = 25°C 1
Pulsed Drain Current IDM 23 A Max RθJA = 185 °C/W, pulse duration ≤100 μs, duty cycle ≤1% 1
Power Dissipation PD 2.3 W Typical RθJA = 55 °C/W on 1 inch2, 2 oz. Cu pad on 0.06 inch FR4 1
Operating Junction and Storage Temperature TJ, Tstg -55 150 °C TA = 25°C 1
Avalanche Energy, single pulse EAS 3.1 mJ ID = 7.9 A, L = 0.1 mH, RG = 25 Ω 1
Drain-to-source voltage BVDSS 30 V VGS = 0 V, ID = 250 μA 3
Drain-to-source leakage current IDSS 1 μA VGS = 0 V, VDS = 24 V 3
Gate-to-source leakage current IGSS 4 μA VDS = 0 V, VGS = 20 V 3
Gate-to-source threshold voltage VGS(th) 1.2 1.6 2 V VDS = VGS, ID = 250 μA 3
Drain-to-source on-resistance RDS(on) 42 60 mΩ VGS = 3.8 V, ID = 4 A 3
Drain-to-source on-resistance RDS(on) 35.5 42 mΩ VGS = 4.5 V, ID = 4 A 3
Drain-to-source on-resistance RDS(on) 27 32.4 mΩ VGS = 10 V, ID = 4 A 3
Input capacitance Ciss 272 353 pF VGS = 0 V, VDS = 15 V, ƒ = 1 MHz 3
Output capacitance Coss 42 55 pF VGS = 0 V, VDS = 15 V, ƒ = 1 MHz 3
Reverse transfer capacitance Crss 22 29 pF VGS = 0 V, VDS = 15 V, ƒ = 1 MHz 3
Gate charge total (4.5 V) Qg 2.2 2.9 nC VDS = 15 V, ID = 4 A 3
Gate charge total (10 V) Qg 4.6 6 nC VDS = 15 V, ID = 4 A 3
Diode forward voltage VSD 0.85 1 V ISD = 4 A, VGS = 0 V 3
Junction-to-ambient thermal resistance (1 inch2 Cu) RθJA 70 °C/W Device mounted on FR4 with 1 inch2 (6.45 cm2), 2 oz. Cu 3
Junction-to-ambient thermal resistance (min Cu) RθJA 185 °C/W Device mounted on FR4 with minimum Cu mounting area 3
Transconductance gfs 75 S VDS = 3 V, ID = 4 A 3
Series gate resistance RG 6.9 Ω 3
Gate charge gate to drain Qgd 0.5 nC VDS = 15 V, ID = 4 A 3
Gate charge gate to source Qgs 1 nC VDS = 15 V, ID = 4 A 3
Gate charge at Vth Qg(th) 0.5 nC VDS = 15 V, ID = 4 A 3
Output charge Qoss 1.4 nC VDS = 15 V, VGS = 0 V 3
Turn on delay time td(on) 3 ns VDS = 15 V, VGS = 5 V, IDS = 4 A, RG = 0 Ω 3
Rise time tr 11 ns VDS = 15 V, VGS = 5 V, IDS = 4 A, RG = 0 Ω 3
Turn off delay time td(off) 12 ns VDS = 15 V, VGS = 5 V, IDS = 4 A, RG = 0 Ω 3
Fall time tf 3 ns VDS = 15 V, VGS = 5 V, IDS = 4 A, RG = 0 Ω 3
Reverse recovery charge Qrr 4 nC VDS = 15 V, IF = 4 A, di/dt = 300 A/μs 3
Reverse recovery time trr 6.4 ns VDS = 15 V, IF = 4 A, di/dt = 300 A/μs 3

CAD (KiCad official)

  • Symbol: CSD87502Q2
  • Footprint: Package_SON:WSON-6-1EP_2x2mm_P0.65mm_EP1x1.6mm
  • 3D model: WSON-6(2x2) (KiCad packages3D, STEP)
  • 3D model files: csd87502q2-etched.step / csd87502q2-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); csd87502q2.step / csd87502q2.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (12 pp, sha256 13fc9b3d62f81f47, retrieved 2026-10-22, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text+vision), consensus claude-opus-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF