component
CS32F103CBT7
Public Made by Adomby adom
CHIPSEA New Arrivals, LQFP-48(7x7). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
main
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{
"slug": "cs32f103cbt7",
"version": "0.1.0",
"type": "component",
"description": "CHIPSEA New Arrivals, LQFP-48(7x7). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
"tags": [
"component",
"others",
"cs32f103cbt7",
"factory-2.0.0",
"extractor-text"
],
"dependencies": {},
"hero": {
"type": "image",
"path": "docs/hero.png"
},
"files": [
"page.json",
"README.md",
"cs32f103cbt7.kicad_sym",
"cs32f103cbt7.kicad_mod",
"cs32f103cbt7.glb",
"cs32f103cbt7.step",
"cs32f103cbt7.lbr",
"docs/hero.png",
"docs/cs32f103cbt7-datasheet.pdf",
"viewers/symbol.html",
"viewers/footprint.html",
"cs32f103cbt7-hero.glb",
"cs32f103cbt7-hero.overlay.json",
"cs32f103cbt7-etched.glb"
],
"component": {
"mpn": "CS32F103CBT7",
"manufacturer": "CHIPSEA",
"package": "LQFP-48(7x7)",
"pin_count": 48,
"category": "Others",
"subcategory": "New Arrivals",
"datasheet": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8590903623004344320",
"parts": {
"symbol": "cs32f103cbt7.kicad_sym",
"footprint": "cs32f103cbt7.kicad_mod",
"model_3d": "cs32f103cbt7-hero.glb",
"model_3d_plain": "cs32f103cbt7-etched.glb",
"model_3d_step": "cs32f103cbt7-etched.step",
"model_3d_step_plain": "cs32f103cbt7.step",
"lbr": "cs32f103cbt7.lbr"
},
"distributor_links": {
"lcsc": "C5361146"
},
"distributor_check": {
"checked_at": "2026-10-20T18:25:13Z",
"source": "Component Ocean /api/assign-pns",
"digikey": {
"pn": null,
"status": "no match"
},
"mouser": {
"pn": null,
"status": "no match"
}
},
"pins": [
{
"number": "1",
"name": "VDD",
"type": "power_in",
"description": "Power supply for the I/O pins and internal voltage regulator, specified at 2.0 V to 3.6 V."
},
{
"number": "2",
"name": "PC13",
"type": "bidirectional",
"description": "GPIO PC13 with TAMPER-RTC function; it is powered through a power switch that sinks only 3 mA, so only one of PC13 to PC15 may be an output at a time, limited to 2 MHz with a 30 pF load, and it cannot be used as a current source such as an LED driver."
},
{
"number": "3",
"name": "PC14",
"type": "bidirectional",
"description": "GPIO PC14 that doubles as OSC32_IN for the 32.768 kHz low-speed oscillator, with the same 3 mA power-switch and output limits as PC13 to PC15."
},
{
"number": "4",
"name": "PC15",
"type": "bidirectional",
"description": "GPIO PC15 that doubles as OSC32_OUT for the 32.768 kHz low-speed oscillator, with the same 3 mA power-switch and output limits as PC13 to PC15."
},
{
"number": "5",
"name": "OSC_IN",
"type": "input",
"description": "High-speed external oscillator input for a 4 to 16 MHz crystal or resonator; after reset this pin is OSC_IN and software can reconfigure it as PD0."
},
{
"number": "6",
"name": "OSC_OUT",
"type": "output",
"description": "High-speed external oscillator output for a 4 to 16 MHz crystal or resonator; after reset this pin is OSC_OUT and software can reconfigure it as PD1."
},
{
"number": "7",
"name": "NRST",
"type": "input",
"description": "Active-low reset input with an internal pull-up of about 80 kΩ; the datasheet gives VIL max 0.8 V and VIH min 2 V."
},
{
"number": "8",
"name": "VSSA",
"type": "power_in",
"description": "Analog ground for the ADC, reset block, RC oscillators and PLL, which must be connected to VSS."
},
{
"number": "9",
"name": "VDDA",
"type": "power_in",
"description": "Analog supply for the ADC, reset block, RC oscillators and PLL, specified at 2.0 V to 3.6 V and at least 2.4 V when the ADC is used, and must be connected to VDD."
},
{
"number": "10",
"name": "PA0-WKUP",
"type": "bidirectional",
"description": "GPIO PA0 with WKUP wake-up function and alternates ADC12_IN0, USART2_CTS and TIM2_CH1_ETR (TIM2_TI1 or TIM2_ETR); it is not marked as 5 V tolerant."
},
{
"number": "11",
"name": "PA1",
"type": "bidirectional",
"description": "GPIO PA1 with alternates USART2_RTS, ADC12_IN1 and TIM2_CH2; it is not marked as 5 V tolerant."
},
{
"number": "12",
"name": "PA2",
"type": "bidirectional",
"description": "GPIO PA2 with alternates USART2_TX, ADC12_IN2 and TIM2_CH3; it is not marked as 5 V tolerant."
},
{
"number": "13",
"name": "PA3",
"type": "bidirectional",
"description": "GPIO PA3 with alternates USART2_RX, ADC12_IN3 and TIM2_CH4; it is not marked as 5 V tolerant."
},
{
"number": "14",
"name": "PA4",
"type": "bidirectional",
"description": "GPIO PA4 with alternates SPI1_NSS, USART2_CK and ADC12_IN4; it is not marked as 5 V tolerant."
},
{
"number": "15",
"name": "PA5",
"type": "bidirectional",
"description": "GPIO PA5 with alternates SPI1_SCK and ADC12_IN5; it is not marked as 5 V tolerant."
},
{
"number": "16",
"name": "PA6",
"type": "bidirectional",
"description": "GPIO PA6 with alternates SPI1_MISO, ADC12_IN6, TIM3_CH1 and TIM1_BKIN; it is not marked as 5 V tolerant."
},
{
"number": "17",
"name": "PA7",
"type": "bidirectional",
"description": "GPIO PA7 with alternates SPI1_MOSI, ADC12_IN7, TIM3_CH2 and TIM1_CHIN; it is not marked as 5 V tolerant."
},
{
"number": "18",
"name": "PB0",
"type": "bidirectional",
"description": "GPIO PB0 with alternates ADC12_IN8, TIM3_CH3 and TIM1_CH2N; it is not marked as 5 V tolerant."
},
{
"number": "19",
"name": "PB1",
"type": "bidirectional",
"description": "GPIO PB1 with alternates ADC12_IN9, TIM3_CH4 and TIM1_CH3N; it is not marked as 5 V tolerant."
},
{
"number": "20",
"name": "PB2/BOOT1",
"type": "bidirectional",
"description": "5 V-tolerant GPIO PB2 that also serves as the BOOT1 boot-mode pin."
},
{
"number": "21",
"name": "PB10",
"type": "bidirectional",
"description": "5 V-tolerant GPIO PB10 with alternates I2C2_SCL, USART3_TX and TIM2_CH3."
},
{
"number": "22",
"name": "PB11",
"type": "bidirectional",
"description": "5 V-tolerant GPIO PB11 with alternates I2C2_SDA, USART3_RX and TIM2_CH4."
},
{
"number": "23",
"name": "VSS",
"type": "power_in",
"description": "Ground reference; all VSS pins must be connected to the external supply within the permitted range, and the difference between ground pins must not exceed 50 mV."
},
{
"number": "24",
"name": "VDD",
"type": "power_in",
"description": "Power supply for the I/O pins and internal voltage regulator, specified at 2.0 V to 3.6 V."
},
{
"number": "25",
"name": "PB12",
"type": "bidirectional",
"description": "5 V-tolerant GPIO PB12 with alternates SPI2_NSS, I2C2_SMBA, USART3_CK and TIM1_BKIN."
},
{
"number": "26",
"name": "PB13",
"type": "bidirectional",
"description": "5 V-tolerant GPIO PB13 with alternates SPI2_SCK, USART3_CTS and TIM1_CH1N."
},
{
"number": "27",
"name": "PB14",
"type": "bidirectional",
"description": "5 V-tolerant GPIO PB14 with alternates SPI2_MISO, USART3_RTS and TIM1_CH2N."
},
{
"number": "28",
"name": "PB15",
"type": "bidirectional",
"description": "5 V-tolerant GPIO PB15 with alternates SPI2_MOSI and TIM1_CH3N."
},
{
"number": "29",
"name": "PA8",
"type": "bidirectional",
"description": "5 V-tolerant GPIO PA8 with alternates USART1_CK, TIM1_CH1 and MCO."
},
{
"number": "30",
"name": "PA9",
"type": "bidirectional",
"description": "5 V-tolerant GPIO PA9 with alternates USART1_TX and TIM1_CH2."
},
{
"number": "31",
"name": "PA10",
"type": "bidirectional",
"description": "5 V-tolerant GPIO PA10 with alternates USART1_RX and TIM1_CH3."
},
{
"number": "32",
"name": "PA11",
"type": "bidirectional",
"description": "5 V-tolerant GPIO PA11 with alternates USART1_CTS, USBDM, CANRX and TIM1_CH4."
},
{
"number": "33",
"name": "PA12",
"type": "bidirectional",
"description": "5 V-tolerant GPIO PA12 with alternates USART1_RTS, USBDP, CANTX and TIM1_ETR."
},
{
"number": "34",
"name": "PA13",
"type": "bidirectional",
"description": "5 V-tolerant pin with JTMS/SWDIO serial-wire debug function (SWJ-DP), usable as GPIO PA13 when SWJ is not used."
},
{
"number": "35",
"name": "VSS",
"type": "power_in",
"description": "Ground reference; all VSS pins must be connected to the external supply within the permitted range, and the difference between ground pins must not exceed 50 mV."
},
{
"number": "36",
"name": "VDD",
"type": "power_in",
"description": "Power supply for the I/O pins and internal voltage regulator, specified at 2.0 V to 3.6 V."
},
{
"number": "37",
"name": "PA14",
"type": "bidirectional",
"description": "5 V-tolerant pin with JTCK/SWCLK serial-wire debug function, usable as GPIO PA14 when SWJ is not used."
},
{
"number": "38",
"name": "PA15",
"type": "bidirectional",
"description": "5 V-tolerant pin that defaults to the JTDI JTAG function with alternates TIM2_CH1_ETR and SPI1_NSS; SWJ must be disabled before it can be used as a normal GPIO."
},
{
"number": "39",
"name": "PB3",
"type": "bidirectional",
"description": "5 V-tolerant pin with JTDO/TRACESWO function and alternates TIM2_CH2 and SPI1_SCK, usable as GPIO PB3 when not used for debug."
},
{
"number": "40",
"name": "PB4",
"type": "bidirectional",
"description": "5 V-tolerant pin with NJTRST function and alternates TIM3_CH1 and SPI1_MISO, usable as GPIO PB4 when not used for debug."
},
{
"number": "41",
"name": "PB5",
"type": "bidirectional",
"description": "GPIO PB5 with alternates I2C1_SMBA, TIM3_CH2 and SPI1_MOSI; it is not marked as 5 V tolerant."
},
{
"number": "42",
"name": "PB6",
"type": "bidirectional",
"description": "5 V-tolerant GPIO PB6 with alternates I2C1_SCL, TIM4_CH1 and USART1_TX."
},
{
"number": "43",
"name": "PB7",
"type": "bidirectional",
"description": "5 V-tolerant GPIO PB7 with alternates I2C1_SDA, TIM4_CH2 and USART1_RX."
},
{
"number": "44",
"name": "BOOT0",
"type": "input",
"description": "Boot mode selection pin, specified from 0 to 5.5 V and used with BOOT1 to select boot from main Flash, system memory or internal SRAM at startup."
},
{
"number": "45",
"name": "PB8",
"type": "bidirectional",
"description": "5 V-tolerant GPIO PB8 with alternates TIM4_CH3, I2C1_SCL and CANRX."
},
{
"number": "46",
"name": "PB9",
"type": "bidirectional",
"description": "5 V-tolerant GPIO PB9 with alternates TIM4_CH4, I2C1_SDA and CANTX."
},
{
"number": "47",
"name": "VSS",
"type": "power_in",
"description": "Ground reference; all VSS pins must be connected to the external supply within the permitted range, and the difference between ground pins must not exceed 50 mV."
},
{
"number": "48",
"name": "VDD",
"type": "power_in",
"description": "Power supply for the I/O pins and internal voltage regulator, specified at 2.0 V to 3.6 V."
}
],
"provenance": {
"extractor": "extract_pins 0.3",
"factory_chain": {
"factory": "2.0.0",
"extractor": "extract_pins 0.3",
"primary_model": "claude-haiku-5-5",
"primary_mode": "text",
"consensus_model": "claude-sonnet-5-5",
"consensus": "agreed",
"guards": "pin_guards 0.1: passed",
"guard_notes": [
"extractor flagged: The datasheet's LQFP48 pin-assignment figure (Figure 4, page 9) is image-only, so this pinout was re; Table 2 lists NRST as type I/O; it is recorded here as input because Section 4.3.11 describes it as ; Footnote 6 says the default OSC functions on pins 5 and 6 can be reassigned to PD0 and PD1 by softwa"
],
"pages_sent": 56,
"cost_usd": 0.2688,
"at": "2026-10-20T18:23:07"
},
"datasheet": {
"url": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8590903623004344320",
"pages": 66,
"sha256": "c63c9196e83fb8cd",
"source_tier": "lcsc"
},
"cad": "KiCad official (CC-BY-SA 4.0)",
"pins": {
"total": 48,
"described": 48,
"cites_pages": true,
"refuses_to_fabricate": true
}
},
"viewers": {
"symbol": "viewers/symbol.html",
"footprint": "viewers/footprint.html"
},
"models_3d": [
{
"file": "cs32f103cbt7.step",
"role": "plain",
"up": "Z",
"units": "mm",
"origin": "footprint origin = pad-pattern centre",
"seat": "z = 0",
"extents_mm": [
9.0,
9.0,
1.5
],
"zmin_mm": -0.0,
"centre_offset_mm": 0.0,
"footprint_binding": "identity",
"sha256": "9dea352d93177c2904afd7d7b68ea8855ce1ab691f69f8b3e13655600514b6bf",
"checked": "2026-10-20",
"checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
},
{
"file": "cs32f103cbt7-etched.step",
"role": "eda",
"up": "Z",
"units": "mm",
"origin": "footprint origin = pad-pattern centre",
"seat": "z = 0",
"extents_mm": [
9.0,
9.0,
1.5
],
"zmin_mm": -0.0,
"centre_offset_mm": 0.0,
"footprint_binding": "identity",
"sha256": "78f599f476d3382a85030932ef732de4736de01a399961bfc7ad063c9ac96c8e",
"checked": "2026-10-20",
"checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
}
]
}
}