main
Ray cs2300cp-czzr: component.models_3d pose record per STEP (Z-up, seated z=0, pad-centre origin, identity binding) e1cdf55
{
  "slug": "cs2300cp-czzr",
  "version": "0.1.0",
  "type": "component",
  "description": "Cirrus Logic Clock Generators, PLLs, Frequency Synthesizers, MSOP-10. Datasheet-verified pinout, KiCad symbol/footprint/3D.",
  "tags": [
    "component",
    "clock-timing",
    "cs2300cp-czzr",
    "factory-2.0.0",
    "extractor-text"
  ],
  "dependencies": {},
  "hero": {
    "type": "image",
    "path": "docs/hero.png"
  },
  "files": [
    "page.json",
    "README.md",
    "cs2300cp-czzr.kicad_sym",
    "cs2300cp-czzr.kicad_mod",
    "cs2300cp-czzr.glb",
    "cs2300cp-czzr.step",
    "cs2300cp-czzr.lbr",
    "docs/hero.png",
    "docs/cs2300cp-czzr-datasheet.pdf",
    "viewers/symbol.html",
    "viewers/footprint.html"
  ],
  "component": {
    "mpn": "CS2300CP-CZZR",
    "manufacturer": "Cirrus Logic",
    "package": "MSOP-10",
    "pin_count": 10,
    "category": "Clock/Timing",
    "subcategory": "Clock Generators, PLLs, Frequency Synthesizers",
    "datasheet": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8590155685980626944",
    "parts": {
      "symbol": "cs2300cp-czzr.kicad_sym",
      "footprint": "cs2300cp-czzr.kicad_mod",
      "model_3d": "cs2300cp-czzr-etched.glb",
      "model_3d_plain": "cs2300cp-czzr.glb",
      "model_3d_step": "cs2300cp-czzr-etched.step",
      "model_3d_step_plain": "cs2300cp-czzr.step",
      "lbr": "cs2300cp-czzr.lbr"
    },
    "distributor_links": {
      "lcsc": "C2663260"
    },
    "pins": [
      {
        "number": "1",
        "name": "VD",
        "type": "power_in",
        "description": "Digital power supply input (3.1-3.5 V) for digital and analog sections."
      },
      {
        "number": "2",
        "name": "GND",
        "type": "power_in",
        "description": "Ground reference."
      },
      {
        "number": "3",
        "name": "CLK_OUT",
        "type": "output",
        "description": "PLL clock output providing low-jitter clock at 6-75 MHz."
      },
      {
        "number": "4",
        "name": "AUX_OUT",
        "type": "output",
        "description": "Auxiliary output selectable as buffered CLK_IN, CLK_OUT, or lock indicator via register configuration."
      },
      {
        "number": "5",
        "name": "CLK_IN",
        "type": "input",
        "description": "Frequency reference clock input (50 Hz-30 MHz) for Digital PLL."
      },
      {
        "number": "6",
        "name": "FILTP",
        "type": "bidirectional",
        "description": "LC oscillator filter positive pin; connect 0.1 µF capacitor to FILTN for external supply filtering."
      },
      {
        "number": "7",
        "name": "FILTN",
        "type": "bidirectional",
        "description": "LC oscillator filter negative pin; connect 0.1 µF capacitor to FILTP and tie to GND."
      },
      {
        "number": "8",
        "name": "AD0/CS",
        "type": "input",
        "description": "Address/chip select input; I²C mode via permanent connection to VD or GND, SPI mode via high-to-low transition after power-up."
      },
      {
        "number": "9",
        "name": "SCL/CCLK",
        "type": "input",
        "description": "Serial clock input; 100 kHz maximum (I²C) or 6 MHz maximum (SPI)."
      },
      {
        "number": "10",
        "name": "SDA/CDIN",
        "type": "bidirectional",
        "description": "Serial data line; bidirectional in I²C mode (SDA) or input-only in SPI mode (CDIN) with open-drain driver."
      }
    ],
    "provenance": {
      "extractor": "extract_pins 0.2",
      "factory_chain": {
        "factory": "2.0.0",
        "extractor": "extract_pins 0.2",
        "primary_model": "claude-haiku-4-5-20251001",
        "primary_mode": "text",
        "consensus_model": "claude-sonnet-4-6",
        "consensus": "agreed",
        "guards": "pin_guards 0.1: passed",
        "guard_notes": [],
        "pages_sent": 32,
        "cost_usd": 0.2491,
        "at": "2026-09-21T19:04:22"
      },
      "datasheet": {
        "url": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8590155685980626944",
        "pages": 32,
        "sha256": "2938c833dd2affd8",
        "source_tier": "lcsc"
      },
      "cad": "KiCad official (CC-BY-SA 4.0)",
      "pins": {
        "total": 10,
        "described": 10,
        "cites_pages": true,
        "refuses_to_fabricate": true
      }
    },
    "viewers": {
      "symbol": "viewers/symbol.html",
      "footprint": "viewers/footprint.html"
    },
    "models_3d": [
      {
        "file": "cs2300cp-czzr.step",
        "role": "plain",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          4.9,
          3.0,
          1.1
        ],
        "zmin_mm": -0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "b8f88eac3ce221c2ccb0b5048f9ad49c2ef4af148f8ae50c4e232e357683f547",
        "checked": "2026-10-07",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      },
      {
        "file": "cs2300cp-czzr-etched.step",
        "role": "eda",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          4.9,
          3.0,
          1.1
        ],
        "zmin_mm": -0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "3b2e2450c31beb6ff0b2244252be907ce7b9941f88323a3385538684b996d1ec",
        "checked": "2026-10-07",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      }
    ]
  }
}