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John Lauer Laser mark by the planner (adom-aiflow 0.1.49): re-etched, outlines regenerated, GLB / hero / outline symbol rebuilt; l… ba7e474 17d ago
{
 "tool": "build_cr0402.py",
 "name": "CR0402-FX-4700GLF",
 "doc": "Bourns CR0402 thick film chip resistor 3D model built from the datasheet dimensions (AI-generated, 2026-10-03).\n\nBourns publishes no 3D model for the CR series (bourns.com carries the datasheet only; the Ultra Librarian\nand ComponentSearchEngine models are third-party builds), so this is built with OpenCascade (OCP) from the\nBourns CR Series datasheet REV. 03/21, p.2 \"Product Dimensions\" (CR0402 row, nominal values):\n\n  L 1.00 +/- 0.05   W 0.50 +/- 0.05   T 0.32 +/- 0.05   C (top terminal) 0.20 +/- 0.10   D (bottom terminal) 0.25 +/- 0.10\n\nConstruction (real chip resistor anatomy, plating thickness 0.012 mm is illustrative):\n  - white alumina substrate between the end caps;\n  - black protective overcoat on top between the top terminals (0.60 long = L - 2C), reaching T;\n  - two tin-plated wrap-around terminals: top pad C long, the end face, bottom pad D long.\n\nFrame: mm, Z up, seated on z = 0, origin at the package centre, length along X (pad 1 at -X, matching the\npage footprint). Usage: build_cr0402.py OUT.step REPORT.json [--name MPN]",
 "source": {
  "doc": "Bourns CR Series Thick Film Chip Resistors datasheet REV. 03/21",
  "url": "https://www.bourns.com/docs/product-datasheets/cr.pdf",
  "page": 2,
  "table": "Product Dimensions, CR0402 row"
 },
 "dims_mm": {
  "L": 1.0,
  "W": 0.5,
  "T": 0.32,
  "C": 0.2,
  "D": 0.25,
  "plating": 0.012,
  "substrate_top": 0.29
 },
 "parts": [
  {
   "name": "alumina_substrate",
   "srgb": [
    0.94,
    0.94,
    0.92
   ]
  },
  {
   "name": "overcoat",
   "srgb": [
    0.06,
    0.06,
    0.07
   ]
  },
  {
   "name": "terminal_1",
   "srgb": [
    0.8,
    0.81,
    0.83
   ]
  },
  {
   "name": "terminal_2",
   "srgb": [
    0.8,
    0.81,
    0.83
   ]
  }
 ]
}