# CMU4N65

**Cmos** · MOSFETs · TO-251

CMU4N65 from Cmos, in a TO-251. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | G | input | Gate; gate-source voltage is rated at ±30 V (VGSS) per the absolute maximum ratings. |
| 2 | D | passive | Drain; drain-source voltage is rated at 650 V (VDSS) with continuous drain current of 4 A at TC = 25°C (2.6 A at TC = 100°C). |
| 3 | S | passive | Source; maximum continuous drain-source diode forward current is 4 A (IS) and pulsed diode current is 12 A (ISM). |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | Cmos |
| Package | TO-251 |
| Category | Triode/MOS Tube/Transistor |
| Pins | 3 |

## Electrical characteristics

Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).

| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Drain-Source Breakdown Voltage | BVDSS | 650 |  |  | V | VGS = 0 V, ID = 250 µA | 2 |
| Zero Gate Voltage Drain Current | IDSS |  |  | 10 | µA | VDS = 650 V, VGS = 0 V | 2 |
| Gate-Body Leakage Current, Forward | IGSSF |  |  | 100 | nA | VGS = 30 V, VDS = 0 V | 2 |
| Gate-Body Leakage Current, Reverse | IGSSR |  |  | -100 | nA | VGS = -30 V, VDS = 0 V | 2 |
| Gate Threshold Voltage | VGS(th) | 2.5 |  | 4.5 | V | VDS = VGS, ID = 250 µA | 2 |
| Static Drain-Source On-Resistance | RDS(on) |  |  | 2.6 | Ω | VGS = 10 V, ID = 2A | 2 |
| Maximum Continuous Drain-Source Diode Forward Current | IS |  |  | 4 | A |  | 2 |
| Maximum Pulsed Drain-Source Diode Forward Current | ISM |  |  | 12 | A |  | 2 |
| Drain-Source Diode Forward Voltage | VSD |  |  | 1 | V | VGS = 0 V, IS = 1A | 2 |
| Drain-Source Voltage | VDSS |  |  | 650 | V |  | 1 |
| Drain Current - Continuous | ID |  |  | 2.6 | A | TC = 100°C | 1 |
| Drain Current - Pulsed | IDM |  |  | 12 | A |  | 1 |
| Gate-Source Voltage | VGSS | -30 |  | 30 | V |  | 1 |
| Avalanche Current | IAR |  |  | 4 | A |  | 1 |
| Power Dissipation | PD |  |  | 60 | W | TC = 25°C | 1 |
| Operating and Storage Temperature Range | TJ, TSTG | -25 |  | 150 | °C |  | 1 |
| Maximum lead temperature for soldering purposes | TL |  |  | 300 | °C | 1/8 from case for 5 seconds | 1 |
| Thermal Resistance, Junction-to-Case | RθJC |  |  | 2 | °C/W |  | 1 |
| Thermal Resistance, Junction-to-Ambient | RθJA |  |  | 62 | °C/W | Steady State | 1 |

## CAD (KiCad official)

- Symbol: `CMU4N65`
- Footprint: `Package_TO_SOT_THT:TO-251-3_Vertical`
- 3D model: TO-251 (KiCad packages3D, STEP)
- 3D model files: `cmu4n65-etched.step` / `cmu4n65-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `cmu4n65.step` / `cmu4n65.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [Cmos datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8590457572709720064) (2 pp, sha256 `289c42c0b2fa95b4`, retrieved 2026-11-06, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/cmu4n65-datasheet.pdf)