component
CMSA50N06N
Public Made by Adomby adom
Cmos(广东场效应半导体) , DFN-8(5x6). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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CMSA50N06N
Cmos(广东场效应半导体) · IC · DFN-8(5x6)
CMSA50N06N from Cmos(广东场效应半导体), in a DFN-8(5x6). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | S | passive | Source terminal of the N-channel MOSFET, one of three source pins tied together in the DFN-8 5x6 package; the datasheet gives no separate electrical limit for this pin beyond the absolute maximum ratings (VDS 60 V, IS 50 A continuous). |
| 2 | S | passive | Source terminal of the N-channel MOSFET, one of three source pins tied together in the DFN-8 5x6 package; the datasheet gives no separate electrical limit for this pin beyond the absolute maximum ratings (VDS 60 V, IS 50 A continuous). |
| 3 | S | passive | Source terminal of the N-channel MOSFET, one of three source pins tied together in the DFN-8 5x6 package; the datasheet gives no separate electrical limit for this pin beyond the absolute maximum ratings (VDS 60 V, IS 50 A continuous). |
| 4 | G | input | Gate terminal of the MOSFET, with a gate-source voltage limit of ±20 V and a typical gate resistance Rg of 2.1 Ω stated in the datasheet. |
| 5 | D | passive | Drain terminal of the N-channel MOSFET, one of four drain pins in the DFN-8 5x6 package, rated for 60 V drain-source voltage and 50 A continuous drain current at TC=25℃. |
| 6 | D | passive | Drain terminal of the N-channel MOSFET, one of four drain pins in the DFN-8 5x6 package, rated for 60 V drain-source voltage and 50 A continuous drain current at TC=25℃. |
| 7 | D | passive | Drain terminal of the N-channel MOSFET, one of four drain pins in the DFN-8 5x6 package, rated for 60 V drain-source voltage and 50 A continuous drain current at TC=25℃. |
| 8 | D | passive | Drain terminal of the N-channel MOSFET, one of four drain pins in the DFN-8 5x6 package, rated for 60 V drain-source voltage and 50 A continuous drain current at TC=25℃. |
| 9 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Cmos(广东场效应半导体) |
| Package | DFN-8(5x6) |
| Category | |
| Pins | 9 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Drain-Source Voltage | VDS | 60 | V | 1 | |||
| Gate-Source Voltage | VGS | -20 | 20 | V | 1 | ||
| Continuous Drain Current | ID | 50 | A | TC=25℃ | 1 | ||
| Continuous Drain Current | ID | 35 | A | TC=100℃ | 1 | ||
| Pulsed Drain Current | IDM | 150 | A | 1 | |||
| Single Pulse Avalanche Energy | EAS | 144 | mJ | VDD=30V, VGS=10V, L=1mH, IAS=17A (note 1) | 1 | ||
| Total Power Dissipation | PD | 70 | W | TC=25℃ | 1 | ||
| Storage Temperature Range | TSTG | -55 | 150 | ℃ | 1 | ||
| Operating Junction Temperature Range | TJ | -55 | 150 | ℃ | 1 | ||
| Thermal Resistance Junction-ambient | RθJA | 50 | ℃/W | 1 | |||
| Thermal Resistance Junction-Case | RθJC | 1.79 | ℃/W | 1 | |||
| Drain-Source Breakdown Voltage | BVDSS | 60 | V | VGS=0V, ID=250μA | 2 | ||
| Gate Threshold Voltage | VGS(th) | 1 | 3 | V | VGS=VDS, ID=250μA | 2 | |
| Drain-Source Leakage Current | IDSS | 1 | uA | VDS=60V, VGS=0V, TJ=25℃ | 2 | ||
| Drain-Source Leakage Current | IDSS | 100 | uA | VDS=60V, VGS=0V, TJ=100℃ | 2 | ||
| Gate-Source Leakage Current | IGSS | -100 | 100 | nA | VGS=±20V, VDS=0V | 2 | |
| Static Drain-Source On-Resistance | RDS(ON) | 12 | 14 | mΩ | VGS=10V, ID=25A | 2 | |
| Static Drain-Source On-Resistance | RDS(ON) | 13 | 16 | mΩ | VGS=4.5V, ID=20A | 2 | |
| Continuous Source Current | IS | 50 | A | 2 | |||
| Pulsed Source Current | ISM | 200 | A | VG=VD=0V, Force Current | 2 | ||
| Diode Forward Voltage | VSD | 0.84 | 1.25 | V | VGS=0V, IS=20A, TJ=25℃ | 2 |
CAD (KiCad official)
- Symbol:
CMSA50N06N - Footprint:
Package_DFN_QFN:DFN-S-8-1EP_6x5mm_P1.27mm - 3D model: DFN-8(5x6) (KiCad packages3D, STEP)
- 3D model files:
cmsa50n06n-etched.step/cmsa50n06n-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);cmsa50n06n.step/cmsa50n06n.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Cmos(广东场效应半导体) datasheet (3 pp, sha256
40610ef28e4ab2fd, retrieved 2026-10-18, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# CMSA50N06N
**Cmos(广东场效应半导体)** · IC · DFN-8(5x6)
CMSA50N06N from Cmos(广东场效应半导体), in a DFN-8(5x6). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | S | passive | Source terminal of the N-channel MOSFET, one of three source pins tied together in the DFN-8 5x6 package; the datasheet gives no separate electrical limit for this pin beyond the absolute maximum ratings (VDS 60 V, IS 50 A continuous). |
| 2 | S | passive | Source terminal of the N-channel MOSFET, one of three source pins tied together in the DFN-8 5x6 package; the datasheet gives no separate electrical limit for this pin beyond the absolute maximum ratings (VDS 60 V, IS 50 A continuous). |
| 3 | S | passive | Source terminal of the N-channel MOSFET, one of three source pins tied together in the DFN-8 5x6 package; the datasheet gives no separate electrical limit for this pin beyond the absolute maximum ratings (VDS 60 V, IS 50 A continuous). |
| 4 | G | input | Gate terminal of the MOSFET, with a gate-source voltage limit of ±20 V and a typical gate resistance Rg of 2.1 Ω stated in the datasheet. |
| 5 | D | passive | Drain terminal of the N-channel MOSFET, one of four drain pins in the DFN-8 5x6 package, rated for 60 V drain-source voltage and 50 A continuous drain current at TC=25℃. |
| 6 | D | passive | Drain terminal of the N-channel MOSFET, one of four drain pins in the DFN-8 5x6 package, rated for 60 V drain-source voltage and 50 A continuous drain current at TC=25℃. |
| 7 | D | passive | Drain terminal of the N-channel MOSFET, one of four drain pins in the DFN-8 5x6 package, rated for 60 V drain-source voltage and 50 A continuous drain current at TC=25℃. |
| 8 | D | passive | Drain terminal of the N-channel MOSFET, one of four drain pins in the DFN-8 5x6 package, rated for 60 V drain-source voltage and 50 A continuous drain current at TC=25℃. |
| 9 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Cmos(广东场效应半导体) |
| Package | DFN-8(5x6) |
| Category | |
| Pins | 9 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Drain-Source Voltage | VDS | | | 60 | V | | 1 |
| Gate-Source Voltage | VGS | -20 | | 20 | V | | 1 |
| Continuous Drain Current | ID | | | 50 | A | TC=25℃ | 1 |
| Continuous Drain Current | ID | | | 35 | A | TC=100℃ | 1 |
| Pulsed Drain Current | IDM | | | 150 | A | | 1 |
| Single Pulse Avalanche Energy | EAS | | | 144 | mJ | VDD=30V, VGS=10V, L=1mH, IAS=17A (note 1) | 1 |
| Total Power Dissipation | PD | | | 70 | W | TC=25℃ | 1 |
| Storage Temperature Range | TSTG | -55 | | 150 | ℃ | | 1 |
| Operating Junction Temperature Range | TJ | -55 | | 150 | ℃ | | 1 |
| Thermal Resistance Junction-ambient | RθJA | | | 50 | ℃/W | | 1 |
| Thermal Resistance Junction-Case | RθJC | | | 1.79 | ℃/W | | 1 |
| Drain-Source Breakdown Voltage | BVDSS | 60 | | | V | VGS=0V, ID=250μA | 2 |
| Gate Threshold Voltage | VGS(th) | 1 | | 3 | V | VGS=VDS, ID=250μA | 2 |
| Drain-Source Leakage Current | IDSS | | | 1 | uA | VDS=60V, VGS=0V, TJ=25℃ | 2 |
| Drain-Source Leakage Current | IDSS | | | 100 | uA | VDS=60V, VGS=0V, TJ=100℃ | 2 |
| Gate-Source Leakage Current | IGSS | -100 | | 100 | nA | VGS=±20V, VDS=0V | 2 |
| Static Drain-Source On-Resistance | RDS(ON) | | 12 | 14 | mΩ | VGS=10V, ID=25A | 2 |
| Static Drain-Source On-Resistance | RDS(ON) | | 13 | 16 | mΩ | VGS=4.5V, ID=20A | 2 |
| Continuous Source Current | IS | | | 50 | A | | 2 |
| Pulsed Source Current | ISM | | | 200 | A | VG=VD=0V, Force Current | 2 |
| Diode Forward Voltage | VSD | | 0.84 | 1.25 | V | VGS=0V, IS=20A, TJ=25℃ | 2 |
## CAD (KiCad official)
- Symbol: `CMSA50N06N`
- Footprint: `Package_DFN_QFN:DFN-S-8-1EP_6x5mm_P1.27mm`
- 3D model: DFN-8(5x6) (KiCad packages3D, STEP)
- 3D model files: `cmsa50n06n-etched.step` / `cmsa50n06n-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `cmsa50n06n.step` / `cmsa50n06n.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Cmos(广东场效应半导体) datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8603322274175209472) (3 pp, sha256 `40610ef28e4ab2fd`, retrieved 2026-10-18, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/cmsa50n06n-datasheet.pdf)