component
CMP840
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Cmos(广东场效应半导体) , TO-220. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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CMP840
Cmos(广东场效应半导体) · IC · TO-220
CMP840 from Cmos(广东场效应半导体), in a TO-220. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | G | input | Gate terminal; the gate-source voltage is rated at ±30 V (VGSS), and the datasheet gives gate-body leakage limits of 100 nA forward and -100 nA reverse at VGS = ±30 V. |
| 2 | D | passive | Drain terminal; the device is rated at 500 V VDSS and 8 A continuous drain current at TC = 25℃ (5 A at TC = 100℃), with 32 A pulsed drain current, and the datasheet notes that drain current is limited by maximum junction temperature. |
| 3 | S | passive | Source terminal; the body diode is rated at a maximum continuous forward current of 8 A and a maximum pulsed forward current of 32 A. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Cmos(广东场效应半导体) |
| Package | TO-220 |
| Category | |
| Pins | 3 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Drain-Source Breakdown Voltage | BVDSS | 500 | V | VGS = 0 V, ID = 250 µA | 2 | ||
| Zero Gate Voltage Drain Current | IDSS | 1 | µA | VDS = 500 V, VGS = 0 V | 2 | ||
| Zero Gate Voltage Drain Current | IDSS | 100 | µA | VDS = 400 V, TC = 125℃ | 2 | ||
| Gate-Body Leakage Current, Forward | IGSSF | 100 | nA | VGS = 30 V, VDS = 0 V | 2 | ||
| Gate-Body Leakage Current, Reverse | IGSSR | -100 | nA | VGS = -30 V, VDS = 0 V | 2 | ||
| Gate Threshold Voltage | VGS(th) | 2 | 4 | V | VDS = VGS, ID = 250 µA | 2 | |
| Static Drain-Source On-Resistance | RDS(on) | 0.92 | 1.1 | Ω | VGS = 10 V, ID = 3.5A | 2 | |
| Drain-Source Diode Forward Voltage | VSD | 0.87 | 1.4 | V | VGS = 0 V, IS = 7A | 2 | |
| Maximum Continuous Drain-Source Diode Forward Current | IS | 8 | A | 2 | |||
| Maximum Pulsed Drain-Source Diode Forward Current | ISM | 32 | A | 2 | |||
| Drain-Source Voltage | VDSS | 500 | V | 1 | |||
| Drain Current - Continuous | ID | 8 | A | TC = 25℃ | 1 | ||
| Drain Current - Continuous | ID | 5 | A | TC = 100℃ | 1 | ||
| Drain Current - Pulsed | IDM | 32 | A | 1 | |||
| Gate-Source Voltage | VGSS | -30 | 30 | V | 1 | ||
| Single Pulsed Avalanche Energy | EAS | 500 | mJ | VDS = 80 V, VGS = 10 V, L = 10 mH, IAS = 10 A (note b) | 1 | ||
| Peak Diode Recovery dv/dt | dv/dt | 4.5 | V/ns | 1 | |||
| Power Dissipation | PD | 140 | W | TC = 25℃ | 1 | ||
| Operating and Storage Temperature Range | TJ, TSTG | -55 | 150 | ℃ | 1 | ||
| Maximum Lead Temperature for Soldering Purposes | TL | 300 | ℃ | 1/8 from case for 5 seconds | 1 | ||
| Thermal Resistance, Junction-to-Case | RθJC | 0.89 | ℃/W | Max. | 1 | ||
| Thermal Resistance, Junction-to-Ambient | RθJA | 62.5 | ℃/W | Max. | 1 |
CAD (KiCad official)
- Symbol:
CMP840 - Footprint:
Package_TO_SOT_THT:TO-220-3_Vertical - 3D model: TO-220 (KiCad packages3D, STEP)
- 3D model files:
cmp840-etched.step/cmp840-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);cmp840.step/cmp840.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Cmos(广东场效应半导体) datasheet (3 pp, sha256
59c40dc62a3dde46, retrieved 2026-10-20, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# CMP840
**Cmos(广东场效应半导体)** · IC · TO-220
CMP840 from Cmos(广东场效应半导体), in a TO-220. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | G | input | Gate terminal; the gate-source voltage is rated at ±30 V (VGSS), and the datasheet gives gate-body leakage limits of 100 nA forward and -100 nA reverse at VGS = ±30 V. |
| 2 | D | passive | Drain terminal; the device is rated at 500 V VDSS and 8 A continuous drain current at TC = 25℃ (5 A at TC = 100℃), with 32 A pulsed drain current, and the datasheet notes that drain current is limited by maximum junction temperature. |
| 3 | S | passive | Source terminal; the body diode is rated at a maximum continuous forward current of 8 A and a maximum pulsed forward current of 32 A. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Cmos(广东场效应半导体) |
| Package | TO-220 |
| Category | |
| Pins | 3 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Drain-Source Breakdown Voltage | BVDSS | 500 | | | V | VGS = 0 V, ID = 250 µA | 2 |
| Zero Gate Voltage Drain Current | IDSS | | | 1 | µA | VDS = 500 V, VGS = 0 V | 2 |
| Zero Gate Voltage Drain Current | IDSS | | | 100 | µA | VDS = 400 V, TC = 125℃ | 2 |
| Gate-Body Leakage Current, Forward | IGSSF | | | 100 | nA | VGS = 30 V, VDS = 0 V | 2 |
| Gate-Body Leakage Current, Reverse | IGSSR | | | -100 | nA | VGS = -30 V, VDS = 0 V | 2 |
| Gate Threshold Voltage | VGS(th) | 2 | | 4 | V | VDS = VGS, ID = 250 µA | 2 |
| Static Drain-Source On-Resistance | RDS(on) | | 0.92 | 1.1 | Ω | VGS = 10 V, ID = 3.5A | 2 |
| Drain-Source Diode Forward Voltage | VSD | | 0.87 | 1.4 | V | VGS = 0 V, IS = 7A | 2 |
| Maximum Continuous Drain-Source Diode Forward Current | IS | | | 8 | A | | 2 |
| Maximum Pulsed Drain-Source Diode Forward Current | ISM | | | 32 | A | | 2 |
| Drain-Source Voltage | VDSS | | | 500 | V | | 1 |
| Drain Current - Continuous | ID | | | 8 | A | TC = 25℃ | 1 |
| Drain Current - Continuous | ID | | | 5 | A | TC = 100℃ | 1 |
| Drain Current - Pulsed | IDM | | | 32 | A | | 1 |
| Gate-Source Voltage | VGSS | -30 | | 30 | V | | 1 |
| Single Pulsed Avalanche Energy | EAS | | | 500 | mJ | VDS = 80 V, VGS = 10 V, L = 10 mH, IAS = 10 A (note b) | 1 |
| Peak Diode Recovery dv/dt | dv/dt | | | 4.5 | V/ns | | 1 |
| Power Dissipation | PD | | | 140 | W | TC = 25℃ | 1 |
| Operating and Storage Temperature Range | TJ, TSTG | -55 | | 150 | ℃ | | 1 |
| Maximum Lead Temperature for Soldering Purposes | TL | | | 300 | ℃ | 1/8 from case for 5 seconds | 1 |
| Thermal Resistance, Junction-to-Case | RθJC | | | 0.89 | ℃/W | Max. | 1 |
| Thermal Resistance, Junction-to-Ambient | RθJA | | | 62.5 | ℃/W | Max. | 1 |
## CAD (KiCad official)
- Symbol: `CMP840`
- Footprint: `Package_TO_SOT_THT:TO-220-3_Vertical`
- 3D model: TO-220 (KiCad packages3D, STEP)
- 3D model files: `cmp840-etched.step` / `cmp840-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `cmp840.step` / `cmp840.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Cmos(广东场效应半导体) datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8603347875845844992) (3 pp, sha256 `59c40dc62a3dde46`, retrieved 2026-10-20, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/cmp840-datasheet.pdf)