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CMP7N65A
Public Made by Adomby adom
Cmos(广东场效应半导体) MOSFETs, TO-220. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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CMP7N65A
Cmos(广东场效应半导体) · MOSFETs · TO-220
CMP7N65A from Cmos(广东场效应半导体), in a TO-220. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | G | input | Gate terminal of the MOSFET, with gate-source voltage rated at ±30 V (VGSS) and a gate threshold of 2 V to 4 V. |
| 2 | D | passive | Drain terminal, rated for 650 V drain-source voltage (VDSS) and 7 A continuous drain current per the product summary. |
| 3 | S | passive | Source terminal, the reference for VGS, with maximum continuous body-diode forward current of 7 A (IS). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Cmos(广东场效应半导体) |
| Package | TO-220 |
| Category | Transistors/Thyristors |
| Pins | 3 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Drain-Source Breakdown Voltage | BVDSS | 650 | V | VGS = 0 V, ID = 250 µA | 2 | ||
| Zero Gate Voltage Drain Current | IDSS | 1 | µA | VDS = 650 V, VGS = 0 V | 2 | ||
| Zero Gate Voltage Drain Current (high temperature) | IDSS | 10 | µA | VDS = 520 V, TC=125℃ | 2 | ||
| Gate-Body Leakage Current, Forward | IGSSF | 100 | nA | VGS = 30 V, VDS = 0 V | 2 | ||
| Gate-Body Leakage Current, Reverse | IGSSR | -100 | nA | VGS = -30 V, VDS = 0 V | 2 | ||
| Gate Threshold Voltage | VGS(th) | 2 | 4 | V | VDS = VGS, ID = 250 µA | 2 | |
| Static Drain-Source On-Resistance | RDS(on) | 1.3 | Ω | VGS = 10 V, ID = 3.5A | 2 | ||
| Maximum Continuous Drain-Source Diode Forward Current | IS | 7 | A | 2 | |||
| Maximum Pulsed Drain-Source Diode Forward Current | ISM | 28 | A | 2 | |||
| Drain-Source Diode Forward Voltage | VSD | 0.86 | 1.4 | V | VGS = 0 V, IS = 7A | 2 | |
| Drain-Source Voltage | VDSS | 650 | V | 1 | |||
| Drain Current - Continuous | ID | 7 | A | TC = 25℃ | 1 | ||
| Drain Current - Continuous | ID | 4.2 | A | TC = 100℃ | 1 | ||
| Drain Current - Pulsed | IDM | 28 | A | Pulsed, note 1 | 1 | ||
| Gate-Source Voltage | VGSS | 30 | V | 1 | |||
| Single Pulsed Avalanche Energy | EAS | 735 | mJ | 1 | |||
| Peak Diode Recovery dv/dt | dv/dt | 4.5 | V/ns | 1 | |||
| Power Dissipation | PD | 160 | W | TC = 25℃ | 1 | ||
| Operating and Storage Temperature Range | TJ, TSTG | -55 | 150 | ℃ | 1 | ||
| Maximum lead temperature for soldering purposes | TL | 300 | ℃ | 1/8 from case for 5 seconds | 1 | ||
| Thermal Resistance, Junction-to-Case | R JC | 0.78 | ℃/W | 1 | |||
| Thermal Resistance, Case-to-Sink | R CS | 0.5 | ℃/W | Typ. | 1 | ||
| Thermal Resistance, Junction-to-Ambient | R JA | 62.5 | ℃/W | 1 |
CAD (KiCad official)
- Symbol:
CMP7N65A - Footprint:
Package_TO_SOT_THT:TO-220-3_Vertical - 3D model: TO-220 (KiCad packages3D, STEP)
- 3D model files:
cmp7n65a-etched.step/cmp7n65a-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);cmp7n65a.step/cmp7n65a.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Cmos(广东场效应半导体) datasheet (3 pp, sha256
d32dd70b8f4586e4, retrieved 2026-10-20, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# CMP7N65A
**Cmos(广东场效应半导体)** · MOSFETs · TO-220
CMP7N65A from Cmos(广东场效应半导体), in a TO-220. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | G | input | Gate terminal of the MOSFET, with gate-source voltage rated at ±30 V (VGSS) and a gate threshold of 2 V to 4 V. |
| 2 | D | passive | Drain terminal, rated for 650 V drain-source voltage (VDSS) and 7 A continuous drain current per the product summary. |
| 3 | S | passive | Source terminal, the reference for VGS, with maximum continuous body-diode forward current of 7 A (IS). |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Cmos(广东场效应半导体) |
| Package | TO-220 |
| Category | Transistors/Thyristors |
| Pins | 3 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Drain-Source Breakdown Voltage | BVDSS | 650 | | | V | VGS = 0 V, ID = 250 µA | 2 |
| Zero Gate Voltage Drain Current | IDSS | | | 1 | µA | VDS = 650 V, VGS = 0 V | 2 |
| Zero Gate Voltage Drain Current (high temperature) | IDSS | | | 10 | µA | VDS = 520 V, TC=125℃ | 2 |
| Gate-Body Leakage Current, Forward | IGSSF | | | 100 | nA | VGS = 30 V, VDS = 0 V | 2 |
| Gate-Body Leakage Current, Reverse | IGSSR | | | -100 | nA | VGS = -30 V, VDS = 0 V | 2 |
| Gate Threshold Voltage | VGS(th) | 2 | | 4 | V | VDS = VGS, ID = 250 µA | 2 |
| Static Drain-Source On-Resistance | RDS(on) | | | 1.3 | Ω | VGS = 10 V, ID = 3.5A | 2 |
| Maximum Continuous Drain-Source Diode Forward Current | IS | | | 7 | A | | 2 |
| Maximum Pulsed Drain-Source Diode Forward Current | ISM | | | 28 | A | | 2 |
| Drain-Source Diode Forward Voltage | VSD | | 0.86 | 1.4 | V | VGS = 0 V, IS = 7A | 2 |
| Drain-Source Voltage | VDSS | | | 650 | V | | 1 |
| Drain Current - Continuous | ID | | | 7 | A | TC = 25℃ | 1 |
| Drain Current - Continuous | ID | | | 4.2 | A | TC = 100℃ | 1 |
| Drain Current - Pulsed | IDM | | | 28 | A | Pulsed, note 1 | 1 |
| Gate-Source Voltage | VGSS | | | 30 | V | | 1 |
| Single Pulsed Avalanche Energy | EAS | | | 735 | mJ | | 1 |
| Peak Diode Recovery dv/dt | dv/dt | | | 4.5 | V/ns | | 1 |
| Power Dissipation | PD | | | 160 | W | TC = 25℃ | 1 |
| Operating and Storage Temperature Range | TJ, TSTG | -55 | | 150 | ℃ | | 1 |
| Maximum lead temperature for soldering purposes | TL | | | 300 | ℃ | 1/8 from case for 5 seconds | 1 |
| Thermal Resistance, Junction-to-Case | R JC | | 0.78 | | ℃/W | | 1 |
| Thermal Resistance, Case-to-Sink | R CS | | 0.5 | | ℃/W | Typ. | 1 |
| Thermal Resistance, Junction-to-Ambient | R JA | | 62.5 | | ℃/W | | 1 |
## CAD (KiCad official)
- Symbol: `CMP7N65A`
- Footprint: `Package_TO_SOT_THT:TO-220-3_Vertical`
- 3D model: TO-220 (KiCad packages3D, STEP)
- 3D model files: `cmp7n65a-etched.step` / `cmp7n65a-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `cmp7n65a.step` / `cmp7n65a.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Cmos(广东场效应半导体) datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8590916646309605376) (3 pp, sha256 `d32dd70b8f4586e4`, retrieved 2026-10-20, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/cmp7n65a-datasheet.pdf)