component
CM2249-QFPTR
Public Made by Adomby adom
CIMO Analog To Digital Converters (ADC), LQFP-80(14x14). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
main
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{
"slug": "cm2249-qfptr",
"version": "0.1.0",
"type": "component",
"description": "CIMO Analog To Digital Converters (ADC), LQFP-80(14x14). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
"tags": [
"component",
"data acquisition",
"cm2249-qfptr",
"factory-2.0.0",
"extractor-text"
],
"dependencies": {},
"hero": {
"type": "image",
"path": "docs/hero.png"
},
"files": [
"page.json",
"README.md",
"cm2249-qfptr.kicad_sym",
"cm2249-qfptr.kicad_mod",
"cm2249-qfptr.glb",
"cm2249-qfptr.step",
"cm2249-qfptr.lbr",
"docs/hero.png",
"docs/cm2249-qfptr-datasheet.pdf",
"viewers/symbol.html",
"viewers/footprint.html",
"cm2249-qfptr-hero.glb",
"cm2249-qfptr-hero.overlay.json",
"cm2249-qfptr-etched.glb"
],
"component": {
"mpn": "CM2249-QFPTR",
"manufacturer": "CIMO",
"package": "LQFP-80(14x14)",
"pin_count": 80,
"category": "Data Acquisition",
"subcategory": "Analog To Digital Converters (ADC)",
"datasheet": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8618864843482800128",
"parts": {
"symbol": "cm2249-qfptr.kicad_sym",
"footprint": "cm2249-qfptr.kicad_mod",
"model_3d": "cm2249-qfptr-hero.glb",
"model_3d_plain": "cm2249-qfptr-etched.glb",
"model_3d_step": "cm2249-qfptr-etched.step",
"model_3d_step_plain": "cm2249-qfptr.step",
"lbr": "cm2249-qfptr.lbr"
},
"distributor_links": {
"lcsc": "C20606819"
},
"distributor_check": {
"checked_at": "2026-10-18T09:40:31Z",
"source": "Component Ocean /api/assign-pns",
"digikey": {
"pn": null,
"status": "quota"
},
"mouser": {
"pn": null,
"status": "quota"
}
},
"pins": [
{
"number": "1",
"name": "V4BGND",
"type": "power_in",
"description": "Analog input ground return for channel 4 input V4B (ADC B)."
},
{
"number": "2",
"name": "V4B",
"type": "passive",
"description": "Analog input for channel 4 on ADC B; input is bipolar ±10 V, ±5 V or ±2.5 V with 1 MΩ input impedance and clamp protection to ±19.5 V."
},
{
"number": "3",
"name": "V5BGND",
"type": "power_in",
"description": "Analog input ground return for channel 5 input V5B (ADC B)."
},
{
"number": "4",
"name": "V5B",
"type": "passive",
"description": "Analog input for channel 5 on ADC B; input is bipolar ±10 V, ±5 V or ±2.5 V with 1 MΩ input impedance and clamp protection to ±19.5 V."
},
{
"number": "5",
"name": "AGND",
"type": "power_in",
"description": "Analog power ground."
},
{
"number": "6",
"name": "VCC",
"type": "power_in",
"description": "Analog supply 4.75 V to 5.25 V for the front-end amplifiers and ADC core, decoupled to AGND with 0.1 µF in parallel with 10 µF."
},
{
"number": "7",
"name": "V6B",
"type": "passive",
"description": "Analog input for channel 6 on ADC B; input is bipolar ±10 V, ±5 V or ±2.5 V with 1 MΩ input impedance and clamp protection to ±19.5 V."
},
{
"number": "8",
"name": "V6BGND",
"type": "power_in",
"description": "Analog input ground return for channel 6 input V6B (ADC B)."
},
{
"number": "9",
"name": "V7B",
"type": "passive",
"description": "Analog input for channel 7 on ADC B; input is bipolar ±10 V, ±5 V or ±2.5 V with 1 MΩ input impedance and clamp protection to ±19.5 V."
},
{
"number": "10",
"name": "V7BGND",
"type": "power_in",
"description": "Analog input ground return for channel 7 input V7B (ADC B)."
},
{
"number": "11",
"name": "V7AGND",
"type": "power_in",
"description": "Analog input ground return for channel 7 input V7A (ADC A)."
},
{
"number": "12",
"name": "V7A",
"type": "passive",
"description": "Analog input for channel 7 on ADC A; input is bipolar ±10 V, ±5 V or ±2.5 V with 1 MΩ input impedance and clamp protection to ±19.5 V."
},
{
"number": "13",
"name": "V6AGND",
"type": "power_in",
"description": "Analog input ground return for channel 6 input V6A (ADC A)."
},
{
"number": "14",
"name": "V6A",
"type": "passive",
"description": "Analog input for channel 6 on ADC A; input is bipolar ±10 V, ±5 V or ±2.5 V with 1 MΩ input impedance and clamp protection to ±19.5 V."
},
{
"number": "15",
"name": "VCC",
"type": "power_in",
"description": "Analog supply 4.75 V to 5.25 V for the front-end amplifiers and ADC core, decoupled to AGND with 0.1 µF in parallel with 10 µF."
},
{
"number": "16",
"name": "AGND",
"type": "power_in",
"description": "Analog power ground."
},
{
"number": "17",
"name": "V5A",
"type": "passive",
"description": "Analog input for channel 5 on ADC A; input is bipolar ±10 V, ±5 V or ±2.5 V with 1 MΩ input impedance and clamp protection to ±19.5 V."
},
{
"number": "18",
"name": "V5AGND",
"type": "power_in",
"description": "Analog input ground return for channel 5 input V5A (ADC A)."
},
{
"number": "19",
"name": "V4A",
"type": "passive",
"description": "Analog input for channel 4 on ADC A; input is bipolar ±10 V, ±5 V or ±2.5 V with 1 MΩ input impedance and clamp protection to ±19.5 V."
},
{
"number": "20",
"name": "V4AGND",
"type": "power_in",
"description": "Analog input ground return for channel 4 input V4A (ADC A)."
},
{
"number": "21",
"name": "V3AGND",
"type": "power_in",
"description": "Analog input ground return for channel 3 input V3A (ADC A)."
},
{
"number": "22",
"name": "V3A",
"type": "passive",
"description": "Analog input for channel 3 on ADC A; input is bipolar ±10 V, ±5 V or ±2.5 V with 1 MΩ input impedance and clamp protection to ±19.5 V."
},
{
"number": "23",
"name": "V2AGND",
"type": "power_in",
"description": "Analog input ground return for channel 2 input V2A (ADC A)."
},
{
"number": "24",
"name": "V2A",
"type": "passive",
"description": "Analog input for channel 2 on ADC A; input is bipolar ±10 V, ±5 V or ±2.5 V with 1 MΩ input impedance and clamp protection to ±19.5 V."
},
{
"number": "25",
"name": "V1AGND",
"type": "power_in",
"description": "Analog input ground return for channel 1 input V1A (ADC A)."
},
{
"number": "26",
"name": "V1A",
"type": "passive",
"description": "Analog input for channel 1 on ADC A; input is bipolar ±10 V, ±5 V or ±2.5 V with 1 MΩ input impedance and clamp protection to ±19.5 V."
},
{
"number": "27",
"name": "V0AGND",
"type": "power_in",
"description": "Analog input ground return for channel 0 input V0A (ADC A)."
},
{
"number": "28",
"name": "V0A",
"type": "passive",
"description": "Analog input for channel 0 on ADC A; input is bipolar ±10 V, ±5 V or ±2.5 V with 1 MΩ input impedance and clamp protection to ±19.5 V."
},
{
"number": "29",
"name": "AGND",
"type": "power_in",
"description": "Analog power ground."
},
{
"number": "30",
"name": "VCC",
"type": "power_in",
"description": "Analog supply 4.75 V to 5.25 V for the front-end amplifiers and ADC core, decoupled to AGND with 0.1 µF in parallel with 10 µF."
},
{
"number": "31",
"name": "REFCAP",
"type": "passive",
"description": "Reference buffer output, typically 4 V; connect to AGND with a 10 µF low-ESR ceramic capacitor placed as close as possible to the pin."
},
{
"number": "32",
"name": "REFGND",
"type": "power_in",
"description": "Reference ground; must be connected to AGND."
},
{
"number": "33",
"name": "REFINOUT",
"type": "passive",
"description": "Reference input/output: provides the 2.5 V internal reference when REFSEL is high, or accepts an external 2.5 V reference when REFSEL is low; requires a 10 µF X5R capacitor to REFINOUTGND."
},
{
"number": "34",
"name": "REFINOUTGND",
"type": "power_in",
"description": "Ground for the REFINOUT reference pin."
},
{
"number": "35",
"name": "REFSEL",
"type": "input",
"description": "Selects internal (logic high, reference enabled) or external (logic low, internal reference disabled) 2.5 V reference; latched at full-reset release."
},
{
"number": "36",
"name": "RESET",
"type": "input",
"description": "Reset input: a low pulse of 200 ns to 1100 ns gives a partial reset, longer than 1250 ns gives a full reset, and holding it low powers the device down; after power-up a high pulse longer than 50 ns is required."
},
{
"number": "37",
"name": "SEQEN",
"type": "input",
"description": "Channel sequencer enable in hardware mode (high enables, low disables); must be tied to DGND in software mode and is latched at full-reset release."
},
{
"number": "38",
"name": "HW_RNGSEL1",
"type": "input",
"description": "Hardware/software mode select and hardware input range select (together with HW_RNGSEL0): 00 = software mode, 01 = ±2.5 V, 10 = ±5 V, 11 = ±10 V; mode is latched at full reset."
},
{
"number": "39",
"name": "HW_RNGSEL0",
"type": "input",
"description": "Hardware/software mode select and hardware input range select (together with HW_RNGSEL1): 00 = software mode, 01 = ±2.5 V, 10 = ±5 V, 11 = ±10 V; mode is latched at full reset."
},
{
"number": "40",
"name": "SER/PAR",
"type": "input",
"description": "Interface select: low selects the parallel interface, high selects the serial interface; latched at power-up or full-reset release."
},
{
"number": "41",
"name": "DB0",
"type": "bidirectional",
"description": "Parallel data bit 0 (output/input); must be tied to DGND in serial mode."
},
{
"number": "42",
"name": "DB1",
"type": "bidirectional",
"description": "Parallel data bit 1 (output/input); must be tied to DGND in serial mode."
},
{
"number": "43",
"name": "DB2",
"type": "bidirectional",
"description": "Parallel data bit 2 (output/input); must be tied to DGND in serial mode."
},
{
"number": "44",
"name": "DB3",
"type": "bidirectional",
"description": "Parallel data bit 3 (output/input); must be tied to DGND in serial mode."
},
{
"number": "45",
"name": "DB4/SER1W",
"type": "bidirectional",
"description": "Parallel data bit 4 (tri-state); in serial mode selects 2-wire (high, SDOA and SDOB) or 1-wire (low, SDOA only) output and is latched at full reset."
},
{
"number": "46",
"name": "DB5/CRCEN",
"type": "bidirectional",
"description": "Parallel data bit 5 (tri-state); in serial mode it is the CRC enable input (high appends a CRC word after conversion results), latched at full reset release and tied to DGND in software mode."
},
{
"number": "47",
"name": "DB6",
"type": "bidirectional",
"description": "Parallel data bit 6 (tri-state); must be tied to DGND in serial mode."
},
{
"number": "48",
"name": "DB7",
"type": "bidirectional",
"description": "Parallel data bit 7 (tri-state); must be tied to DGND in serial mode."
},
{
"number": "49",
"name": "VDRIVE",
"type": "power_in",
"description": "Logic supply 2.3 V to 3.6 V that sets the logic interface voltage; decoupled to DGND with 0.1 µF in parallel with 10 µF."
},
{
"number": "50",
"name": "DGND",
"type": "power_in",
"description": "Digital ground."
},
{
"number": "51",
"name": "REGGNDD",
"type": "power_in",
"description": "Ground for the digital LDO."
},
{
"number": "52",
"name": "REGCAPD",
"type": "passive",
"description": "Digital LDO output, typically 1.9 V; decouple to REGGNDD with a 1 µF capacitor."
},
{
"number": "53",
"name": "DB8",
"type": "bidirectional",
"description": "Parallel data bit 8 (tri-state); must be tied to DGND in serial mode."
},
{
"number": "54",
"name": "DB9",
"type": "bidirectional",
"description": "Parallel data bit 9 (tri-state); must be tied to DGND in serial mode."
},
{
"number": "55",
"name": "DB10/SDI",
"type": "bidirectional",
"description": "Parallel data bit 10 (tri-state); in serial mode it is the SPI data input SDI."
},
{
"number": "56",
"name": "DB11/SDOB",
"type": "bidirectional",
"description": "Parallel data bit 11 (tri-state); in serial mode it is the serial data output SDOB for channel B."
},
{
"number": "57",
"name": "DB12/SDOA",
"type": "bidirectional",
"description": "Parallel data bit 12 (tri-state); in serial mode it is the serial data output SDOA for channel A."
},
{
"number": "58",
"name": "DB13/OS0",
"type": "bidirectional",
"description": "Parallel data bit 13 (tri-state); in hardware serial mode it is oversampling control OS0, latched at full reset release."
},
{
"number": "59",
"name": "DB14/OS1",
"type": "bidirectional",
"description": "Parallel data bit 14 (tri-state); in hardware serial mode it is oversampling control OS1, latched at full reset release."
},
{
"number": "60",
"name": "DB15/OS2",
"type": "bidirectional",
"description": "Parallel data bit 15 (tri-state); in hardware serial mode it is oversampling control OS2, latched at full reset release."
},
{
"number": "61",
"name": "WR/BURST",
"type": "input",
"description": "Write strobe in software parallel mode; in hardware parallel or serial mode it enables burst sequencer mode, latched at full reset release."
},
{
"number": "62",
"name": "SCLK/RD",
"type": "input",
"description": "Serial clock input in serial mode, or read strobe (active low with CS) in parallel mode for reading the conversion data bus."
},
{
"number": "63",
"name": "CS",
"type": "input",
"description": "Chip select: low enables the DBx output bus in parallel mode and enables serial read frames in serial mode."
},
{
"number": "64",
"name": "CHSEL0",
"type": "input",
"description": "Channel select bit 0 for the next conversion pair in hardware mode (channel pair V0A/V0B to V7A/V7B); must be tied to DGND in software mode."
},
{
"number": "65",
"name": "CHSEL1",
"type": "input",
"description": "Channel select bit 1 for the next conversion pair in hardware mode (channel pair V0A/V0B to V7A/V7B); must be tied to DGND in software mode."
},
{
"number": "66",
"name": "CHSEL2",
"type": "input",
"description": "Channel select bit 2 for the next conversion pair in hardware mode (channel pair V0A/V0B to V7A/V7B); must be tied to DGND in software mode."
},
{
"number": "67",
"name": "BUSY",
"type": "output",
"description": "Conversion status output: goes high after the CONVST rising edge and returns low when conversion completes; data must be read after BUSY falls."
},
{
"number": "68",
"name": "CONVST",
"type": "input",
"description": "Conversion start: a low-to-high transition starts conversion of the selected analog input pair; ignored while BUSY is high."
},
{
"number": "69",
"name": "REGGND",
"type": "power_in",
"description": "Ground for the internal analog LDO."
},
{
"number": "70",
"name": "REGCAP",
"type": "passive",
"description": "Internal analog LDO output, typically 1.9 V; decouple to REGGND with a 1 µF capacitor."
},
{
"number": "71",
"name": "VCC",
"type": "power_in",
"description": "Analog supply 4.75 V to 5.25 V for the front-end amplifiers and ADC core, decoupled to AGND with 0.1 µF in parallel with 10 µF."
},
{
"number": "72",
"name": "AGND",
"type": "power_in",
"description": "Analog power ground."
},
{
"number": "73",
"name": "V0B",
"type": "passive",
"description": "Analog input for channel 0 on ADC B; input is bipolar ±10 V, ±5 V or ±2.5 V with 1 MΩ input impedance and clamp protection to ±19.5 V."
},
{
"number": "74",
"name": "V0BGND",
"type": "power_in",
"description": "Analog input ground return for channel 0 input V0B (ADC B)."
},
{
"number": "75",
"name": "V1B",
"type": "passive",
"description": "Analog input for channel 1 on ADC B; input is bipolar ±10 V, ±5 V or ±2.5 V with 1 MΩ input impedance and clamp protection to ±19.5 V."
},
{
"number": "76",
"name": "V1BGND",
"type": "power_in",
"description": "Analog input ground return for channel 1 input V1B (ADC B)."
},
{
"number": "77",
"name": "V2B",
"type": "passive",
"description": "Analog input for channel 2 on ADC B; input is bipolar ±10 V, ±5 V or ±2.5 V with 1 MΩ input impedance and clamp protection to ±19.5 V."
},
{
"number": "78",
"name": "V2BGND",
"type": "power_in",
"description": "Analog input ground return for channel 2 input V2B (ADC B)."
},
{
"number": "79",
"name": "V3B",
"type": "passive",
"description": "Analog input for channel 3 on ADC B; input is bipolar ±10 V, ±5 V or ±2.5 V with 1 MΩ input impedance and clamp protection to ±19.5 V."
},
{
"number": "80",
"name": "V3BGND",
"type": "power_in",
"description": "Analog input ground return for channel 3 input V3B (ADC B)."
}
],
"provenance": {
"extractor": "extract_pins 0.3",
"factory_chain": {
"factory": "2.0.0",
"extractor": "extract_pins 0.3",
"primary_model": "claude-haiku-5-5",
"primary_mode": "text",
"consensus_model": "claude-sonnet-5-5",
"consensus": "agreed",
"guards": "pin_guards 0.1: passed",
"guard_notes": [
"extractor flagged: Ordering table lists CM2249-QFPTR with packing 'Tray', quantity 900; the 'TR' suffix suggests tape-a; The pin 1-80 figure text is garbled in the extraction; pin numbers and names were taken from Table 1; Analog pins (AI in the datasheet) are mapped to KiCad 'passive'; REFCAP, REFINOUT, REGCAPD and REGCA",
"2/80 pins cited to the wrong page (name found elsewhere): ['59:DB14/OS1@p7', '65:CHSEL1@p7']"
],
"pages_sent": 28,
"cost_usd": 0.1748,
"at": "2026-10-18T09:38:44"
},
"datasheet": {
"url": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8618864843482800128",
"pages": 41,
"sha256": "fc28061c8cda7505",
"source_tier": "lcsc"
},
"cad": "KiCad official (CC-BY-SA 4.0)",
"pins": {
"total": 80,
"described": 80,
"cites_pages": true,
"refuses_to_fabricate": true
}
},
"viewers": {
"symbol": "viewers/symbol.html",
"footprint": "viewers/footprint.html"
},
"models_3d": [
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"file": "cm2249-qfptr.step",
"role": "plain",
"up": "Z",
"units": "mm",
"origin": "footprint origin = pad-pattern centre",
"seat": "z = 0",
"extents_mm": [
16.4,
16.4,
1.6
],
"zmin_mm": -0.0,
"centre_offset_mm": 0.0,
"footprint_binding": "identity",
"sha256": "477979184005b1973cf4f2ae93e03c5a50342504190416921945164d4f1db58d",
"checked": "2026-10-18",
"checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
},
{
"file": "cm2249-qfptr-etched.step",
"role": "eda",
"up": "Z",
"units": "mm",
"origin": "footprint origin = pad-pattern centre",
"seat": "z = 0",
"extents_mm": [
16.4,
16.4,
1.6
],
"zmin_mm": -0.0,
"centre_offset_mm": 0.0,
"footprint_binding": "identity",
"sha256": "1e9e944c410b1cdfb74429022743e39f5de2facecd877cee9d40e92d2b034b94",
"checked": "2026-10-18",
"checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
}
]
}
}